void main(void)
{
Sys_Init();
putchar(' ');
XBR0_Init();
SMB_Init();
PCA_Init();
Drive_Init();
Port_Init();
ADC_Init();
ranger_pd_init();
//fan angle initialization code goes here
while(1)
{
voltage_update();
if(SS)
{
Range_Update(); //update the range
Drive_Motor(ranger_pd());
}
else
Drive_Motor(PW_NEUT); //if ss is not flipped, put it in neutral
}
}
void sched_update (void)
{
t1ms_cnt++;
if (t1ms_cnt == 10000)
t1ms_cnt = 0;
if (t1ms_cnt % 20 == 0) /* each 20 ms */
{
wheel_update_ticks_buffers();
}
if (t1ms_cnt % pid_interval == 0) /* motor controller update */
{
if (pid_enable)
wheel_update_pid(); /* update PID motor controller */
else
wheel_update_open_loop(); /* update open loop motor controller */
}
if (t1ms_cnt % pfbst_interval == 0) /* send $PFBST */
{
nmea_tx_status();
}
/* each 10 ms */
if (t1ms_cnt % 10 == 0) /* each 10 ms */
{
if (t1ms_cnt % 20 == 0) /* each 20 ms */
{
}
if (t1ms_cnt % 50 == 0) /* each 50 ms */
{
}
if (t1ms_cnt % 100 == 0) /* each 100 ms */
{
if (nmea_wd_timeout)
nmea_wd++; /* increase watchdog timeout */
else
nmea_wd = 0;
voltage = adc_data[0]; /* request voltage measurement */
state_update();
}
if (t1ms_cnt % 200 == 0) /* each 200 ms */
{
button_update();
led_update();
voltage_update();
}
}
}
void am33xx_spl_board_init(void)
{
if (!strncmp("A335BONE", header.name, 8)) {
/* BeagleBone PMIC Code */
uchar pmic_status_reg;
if (i2c_probe(TPS65217_CHIP_PM))
return;
if (tps65217_reg_read(STATUS, &pmic_status_reg))
return;
/* Increase USB current limit to 1300mA */
if (tps65217_reg_write(PROT_LEVEL_NONE, POWER_PATH,
USB_INPUT_CUR_LIMIT_1300MA,
USB_INPUT_CUR_LIMIT_MASK))
printf("tps65217_reg_write failure\n");
/* Only perform PMIC configurations if board rev > A1 */
if (!strncmp(header.version, "00A1", 4))
return;
/* Set DCDC2 (MPU) voltage to 1.275V */
if (tps65217_voltage_update(DEFDCDC2,
DCDC_VOLT_SEL_1275MV)) {
printf("tps65217_voltage_update failure\n");
return;
}
/* Set LDO3, LDO4 output voltage to 3.3V */
if (tps65217_reg_write(PROT_LEVEL_2, DEFLS1,
LDO_VOLTAGE_OUT_3_3, LDO_MASK))
printf("tps65217_reg_write failure\n");
if (tps65217_reg_write(PROT_LEVEL_2, DEFLS2,
LDO_VOLTAGE_OUT_3_3, LDO_MASK))
printf("tps65217_reg_write failure\n");
if (!(pmic_status_reg & PWR_SRC_AC_BITMASK)) {
printf("No AC power, disabling frequency switch\n");
return;
}
/* Set MPU Frequency to 720MHz */
mpu_pll_config(MPUPLL_M_720);
} else {
uchar buf[4];
/*
* EVM PMIC code. All boards currently want an MPU voltage
* of 1.2625V and CORE voltage of 1.1375V to operate at
* 720MHz.
*/
if (i2c_probe(PMIC_CTRL_I2C_ADDR))
return;
/* VDD1/2 voltage selection register access by control i/f */
if (i2c_read(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1))
return;
buf[0] |= PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
if (i2c_write(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1))
return;
if (!voltage_update(MPU, PMIC_OP_REG_SEL_1_2_6) &&
!voltage_update(CORE, PMIC_OP_REG_SEL_1_1_3)) {
if (board_is_evm_15_or_later())
mpu_pll_config(MPUPLL_M_800);
else
mpu_pll_config(MPUPLL_M_720);
}
}
}
static void board_init_ddr(void)
{
struct emif_regs pxm2_ddr3_emif_reg_data = {
.sdram_config = 0x41805332,
.sdram_tim1 = 0x666b3c9,
.sdram_tim2 = 0x243631ca,
.sdram_tim3 = 0x33f,
.emif_ddr_phy_ctlr_1 = 0x100005,
.zq_config = 0,
.ref_ctrl = 0x81a,
};
struct ddr_data pxm2_ddr3_data = {
.datardsratio0 = 0x81204812,
.datawdsratio0 = 0,
.datafwsratio0 = 0x8020080,
.datawrsratio0 = 0x4010040,
.datauserank0delay = 1,
.datadldiff0 = PHY_DLL_LOCK_DIFF,
};
struct cmd_control pxm2_ddr3_cmd_ctrl_data = {
.cmd0csratio = 0x80,
.cmd0dldiff = 0,
.cmd0iclkout = 0,
.cmd1csratio = 0x80,
.cmd1dldiff = 0,
.cmd1iclkout = 0,
.cmd2csratio = 0x80,
.cmd2dldiff = 0,
.cmd2iclkout = 0,
};
config_ddr(DDR_PLL_FREQ, DXR2_IOCTRL_VAL, &pxm2_ddr3_data,
&pxm2_ddr3_cmd_ctrl_data, &pxm2_ddr3_emif_reg_data, 0);
}
/*
* voltage switching for MPU frequency switching.
* @module = mpu - 0, core - 1
* @vddx_op_vol_sel = vdd voltage to set
*/
#define MPU 0
#define CORE 1
int voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)
{
uchar buf[4];
unsigned int reg_offset;
if (module == MPU)
reg_offset = PMIC_VDD1_OP_REG;
else
reg_offset = PMIC_VDD2_OP_REG;
/* Select VDDx OP */
if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1))
return 1;
buf[0] &= ~PMIC_OP_REG_CMD_MASK;
if (i2c_write(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1))
return 1;
/* Configure VDDx OP Voltage */
if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1))
return 1;
buf[0] &= ~PMIC_OP_REG_SEL_MASK;
buf[0] |= vddx_op_vol_sel;
if (i2c_write(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1))
return 1;
if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1))
return 1;
if ((buf[0] & PMIC_OP_REG_SEL_MASK) != vddx_op_vol_sel)
return 1;
return 0;
}
#define OSC (V_OSCK/1000000)
const struct dpll_params dpll_mpu_pxm2 = {
720, OSC-1, 1, -1, -1, -1, -1};
void spl_siemens_board_init(void)
{
uchar buf[4];
/*
* pxm2 PMIC code. All boards currently want an MPU voltage
* of 1.2625V and CORE voltage of 1.1375V to operate at
* 720MHz.
*/
if (i2c_probe(PMIC_CTRL_I2C_ADDR))
return;
/* VDD1/2 voltage selection register access by control i/f */
if (i2c_read(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1))
return;
buf[0] |= PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
if (i2c_write(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1))
return;
/* Frequency switching for OPP 120 */
if (voltage_update(MPU, PMIC_OP_REG_SEL_1_2_6) ||
voltage_update(CORE, PMIC_OP_REG_SEL_1_1_3)) {
printf("voltage update failed\n");
}
}
#endif /* if def CONFIG_SPL_BUILD */
int read_eeprom(void)
{
/* nothing ToDo here for this board */
return 0;
}
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
{
.slave_reg_ofs = 0x308,
