static int wm8400_ldo_set_voltage(struct regulator_dev *dev,
int min_uV, int max_uV, unsigned *selector)
{
struct wm8400 *wm8400 = rdev_get_drvdata(dev);
u16 val;
if (min_uV < 900000 || min_uV > 3300000)
return -EINVAL;
if (min_uV < 1700000) {
/* Steps of 50mV from 900mV; */
val = (min_uV - 850001) / 50000;
if ((val * 50000) + 900000 > max_uV)
return -EINVAL;
BUG_ON((val * 50000) + 900000 < min_uV);
} else {
/* Steps of 100mV from 1700mV */
val = ((min_uV - 1600001) / 100000);
if ((val * 100000) + 1700000 > max_uV)
return -EINVAL;
BUG_ON((val * 100000) + 1700000 < min_uV);
val += 0xf;
}
*selector = val;
return wm8400_set_bits(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev),
WM8400_LDO1_VSEL_MASK, val);
}
static int wm8400_ldo_disable(struct regulator_dev *dev)
{
struct wm8400 *wm8400 = rdev_get_drvdata(dev);
return wm8400_set_bits(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev),
WM8400_LDO1_ENA, 0);
}
static int wm8400_dcdc_disable(struct regulator_dev *dev)
{
struct wm8400 *wm8400 = rdev_get_drvdata(dev);
int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;
return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,
WM8400_DC1_ENA, 0);
}
/*
* write to the wm8400 register space
*/
static int wm8400_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
struct wm8400_priv *wm8400 = snd_soc_codec_get_drvdata(codec);
if (reg == WM8400_INTDRIVBITS) {
wm8400->fake_register = value;
return 0;
} else
return wm8400_set_bits(wm8400->wm8400, reg, 0xffff, value);
}
static int wm8400_dcdc_set_mode(struct regulator_dev *dev, unsigned int mode)
{
struct wm8400 *wm8400 = rdev_get_drvdata(dev);
int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;
int ret;
switch (mode) {
case REGULATOR_MODE_FAST:
/* Datasheet: active with force PWM */
ret = wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_2 + offset,
WM8400_DC1_FRC_PWM, WM8400_DC1_FRC_PWM);
if (ret != 0)
return ret;
return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,
WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP,
WM8400_DC1_ACTIVE);
case REGULATOR_MODE_NORMAL:
/* Datasheet: active */
ret = wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_2 + offset,
WM8400_DC1_FRC_PWM, 0);
if (ret != 0)
return ret;
return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,
WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP,
WM8400_DC1_ACTIVE);
case REGULATOR_MODE_IDLE:
/* Datasheet: standby */
return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,
WM8400_DC1_ACTIVE | WM8400_DC1_SLEEP, 0);
default:
return -EINVAL;
}
}
static int wm8400_dcdc_set_voltage(struct regulator_dev *dev,
int min_uV, int max_uV)
{
struct wm8400 *wm8400 = rdev_get_drvdata(dev);
u16 val;
int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;
if (min_uV < 850000)
return -EINVAL;
val = (min_uV - 825001) / 25000;
if (850000 + (25000 * val) > max_uV)
return -EINVAL;
BUG_ON(850000 + (25000 * val) < min_uV);
return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,
WM8400_DC1_VSEL_MASK, val);
}
int wm8400_start_codec(struct wm8400 *wm8400)
{
return wm8400_set_bits(wm8400, WM8400_POWER_MANAGEMENT_1,
WM8400_CODEC_ENA, WM8400_CODEC_ENA);
}
