void wpalPacketStallUpdateInfo
(
v_U32_t *powerState,
v_U32_t *numFreeBd,
wpt_log_data_stall_channel_type *channelInfo,
v_U8_t channelNum
)
{
/* */
if(NULL != powerState)
{
wpalTrasportStallInfo.PowerState = *powerState;
}
/* */
if(NULL != numFreeBd)
{
wpalTrasportStallInfo.numFreeBd = *numFreeBd;
}
/* */
if(NULL != channelInfo)
{
wpalMemoryCopy(&wpalTrasportStallInfo.dxeChannelInfo[channelNum],
channelInfo,
sizeof(wpt_log_data_stall_channel_type));
}
return;
}
/*---------------------------------------------------------------------------
wpalPacketStallUpdateInfo – Update each channel information when stall
detected, also power state and free resource count
Param:
powerState ? WLAN system power state when stall detected
numFreeBd ? Number of free resource count in HW
channelInfo ? Each channel specific information when stall happen
channelNum ? Channel number update information
Return:
NONE
---------------------------------------------------------------------------*/
void wpalPacketStallUpdateInfo
(
v_U32_t *powerState,
v_U32_t *numFreeBd,
wpt_log_data_stall_channel_type *channelInfo,
v_U8_t channelNum
)
{
/* Update power state when stall detected */
if(NULL != powerState)
{
wpalTrasportStallInfo.PowerState = *powerState;
}
/* Update HW free resource count */
if(NULL != numFreeBd)
{
wpalTrasportStallInfo.numFreeBd = *numFreeBd;
}
/* Update channel information */
if(NULL != channelInfo)
{
wpalMemoryCopy(&wpalTrasportStallInfo.dxeChannelInfo[channelNum],
channelInfo,
sizeof(wpt_log_data_stall_channel_type));
}
return;
}
/*==========================================================================
@ Function Name
dxeCommonDefaultConfig
@ Description
@ Parameters
WLANDXE_CtrlBlkType *dxeCtrlBlk,
DXE host driver main control block
@ Return
void
===========================================================================*/
void dxeCommonDefaultConfig
(
WLANDXE_CtrlBlkType *dxeCtrlBlk
)
{
dxeCtrlBlk->rxReadyCB = NULL;
dxeCtrlBlk->txCompCB = NULL;
dxeCtrlBlk->lowResourceCB = NULL;
wpalMemoryCopy(&dxeCtrlBlk->txCompInt,
&txCompInt,
sizeof(WLANDXE_TxCompIntConfigType));
}
/**
@brief WDI_STATableSetBSSID - set station corresponding BSSID
@param pWDICtx: WDI Context pointer
ucSTAIdx: station index
pStaAddr: output station address
@see
@return Result of the function call
*/
WDI_Status
WDI_STATableSetBSSID
(
WDI_ControlBlockType* pWDICtx,
wpt_uint8 ucSTAIdx,
wpt_macAddr macBSSID
)
{
WDI_StaStruct* pSTATable = (WDI_StaStruct*) pWDICtx->staTable;
if ((ucSTAIdx < pWDICtx->ucMaxStations) && (pSTATable[ucSTAIdx].valid))
{
wpalMemoryCopy (pSTATable[ucSTAIdx].macBSSID, macBSSID, 6);
return WDI_STATUS_SUCCESS;
}
else
return WDI_STATUS_E_FAILURE;
}/*WDI_STATableSetBSSID*/
/*==========================================================================
@ Function Name
dxeCommonDefaultConfig
@ Description
@ Parameters
WLANDXE_CtrlBlkType *dxeCtrlBlk,
DXE host driver main control block
@ Return
wpt_status
===========================================================================*/
wpt_status dxeCommonDefaultConfig
(
WLANDXE_CtrlBlkType *dxeCtrlBlk
)
{
wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
dxeCtrlBlk->rxReadyCB = NULL;
dxeCtrlBlk->txCompCB = NULL;
dxeCtrlBlk->lowResourceCB = NULL;
wpalMemoryCopy(&dxeCtrlBlk->txCompInt,
&txCompInt,
sizeof(WLANDXE_TxCompIntConfigType));
return status;
}
/**
@brief WDI_STATableGetStaMacAddr - get station MAC address
@param pWDICtx: WDI Context pointer
ucSTAIdx: station index
pStaAddr: output station MAC address
@see
@return Result of the function call
*/
WDI_Status
WDI_STATableGetStaMacAddr
(
WDI_ControlBlockType* pWDICtx,
wpt_uint8 ucSTAIdx,
wpt_macAddr* staMacAddr
)
{
WDI_StaStruct* pSTATable = (WDI_StaStruct*) pWDICtx->staTable;
if ((ucSTAIdx < pWDICtx->ucMaxStations) && (pSTATable[ucSTAIdx].valid))
{
wpalMemoryCopy(staMacAddr, pSTATable[ucSTAIdx].staAddr,
WDI_MAC_ADDR_LEN);
return WDI_STATUS_SUCCESS;
}
else
return WDI_STATUS_E_FAILURE;
}/*WDI_STATableGetStaMacAddr*/
/**
@brief WDI_STATableGetStaBSSIDAddr - Gets the BSSID associated
with this station
@param pWDICtx: pointer to the WLAN DAL context
ucSTAIdx: station index
pmacBSSID: out BSSID for this STA
@see
@return Result of the function call
*/
WDI_Status
WDI_STATableGetStaBSSIDAddr
(
WDI_ControlBlockType* pWDICtx,
wpt_uint8 ucSTAIdx,
wpt_macAddr* pmacBSSID
)
{
WDI_StaStruct* pSTATable = (WDI_StaStruct*) pWDICtx->staTable;
/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
if ((ucSTAIdx < pWDICtx->ucMaxStations) && (pSTATable[ucSTAIdx].valid))
{
wpalMemoryCopy(*pmacBSSID, pSTATable[ucSTAIdx].macBSSID, WDI_MAC_ADDR_LEN);
return WDI_STATUS_SUCCESS;
}
else
return WDI_STATUS_E_FAILURE;
}/*WDI_STATableGetStaQosEnabled*/
/*---------------------------------------------------------------------------
wpalPacketStallDumpLog – Trigger to send log packet to DIAG
Updated transport system information will be sent to DIAG
Param:
NONE
Return:
NONE
---------------------------------------------------------------------------*/
void wpalPacketStallDumpLog
(
void
)
{
vos_log_data_stall_type *log_ptr = NULL;
WLAN_VOS_DIAG_LOG_ALLOC(log_ptr, vos_log_data_stall_type, LOG_TRSP_DATA_STALL_C);
if(log_ptr)
{
log_ptr->PowerState = wpalTrasportStallInfo.PowerState;
log_ptr->numFreeBd = wpalTrasportStallInfo.numFreeBd;
wpalMemoryCopy(&log_ptr->dxeChannelInfo[0],
&wpalTrasportStallInfo.dxeChannelInfo[0],
WPT_NUM_TRPT_CHANNEL * sizeof(vos_log_data_stall_channel_type));
pr_info("Stall log dump");
WLAN_VOS_DIAG_LOG_REPORT(log_ptr);
}
return;
}
/**
@brief WDI_STATableAddSta - Function to Add Station
@param pWDICtx: pointer to the WLAN DAL context
pwdiParam: station parameters
@see
@return Result of the function call
*/
WDI_Status
WDI_STATableAddSta
(
WDI_ControlBlockType* pWDICtx,
WDI_AddStaParams* pwdiParam
)
{
wpt_uint8 ucSTAIdx = 0;
WDI_StaStruct* pSTATable = (WDI_StaStruct*) pWDICtx->staTable;
/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
/*-----------------------------------------------------------------------
Sanity check
- station ids are allocated by the HAL located on RIVA SS - they must
always be valid
-----------------------------------------------------------------------*/
if (( pwdiParam->ucSTAIdx == WDI_STA_INVALID_IDX) ||
( pwdiParam->ucSTAIdx >= pWDICtx->ucMaxStations ))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Station id sent by HAL is invalid - not OK");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
ucSTAIdx = pwdiParam->ucSTAIdx;
/*Since we are not the allocator of STA Ids but HAL is - just set flag to
valid*/
pSTATable[ucSTAIdx].valid = 1;
// Save the STA type - this is used for lookup
WDI_STATableSetStaType(pWDICtx, ucSTAIdx, pwdiParam->ucStaType);
WDI_STATableSetStaQosEnabled(pWDICtx, ucSTAIdx,
(wpt_uint8)(pwdiParam->ucWmmEnabled | pwdiParam->ucHTCapable) );
#ifdef WLAN_PERF
pWDICtx->uBdSigSerialNum ++;
#endif
wpalMemoryCopy(pSTATable[ucSTAIdx].macBSSID,
pwdiParam->macBSSID, WDI_MAC_ADDR_LEN);
/*------------------------------------------------------------------------
Set DPU Related Information
------------------------------------------------------------------------*/
pSTATable[ucSTAIdx].dpuIndex = pwdiParam->dpuIndex;
pSTATable[ucSTAIdx].dpuSig = pwdiParam->dpuSig;
pSTATable[ucSTAIdx].bcastDpuIndex = pwdiParam->bcastDpuIndex;
pSTATable[ucSTAIdx].bcastDpuSignature = pwdiParam->bcastDpuSignature;
pSTATable[ucSTAIdx].bcastMgmtDpuIndex = pwdiParam->bcastMgmtDpuIndex;
pSTATable[ucSTAIdx].bcastMgmtDpuSignature = pwdiParam->bcastMgmtDpuSignature;
/*Robust Mgmt Frame enabled */
pSTATable[ucSTAIdx].rmfEnabled = pwdiParam->ucRmfEnabled;
pSTATable[ucSTAIdx].bssIdx = pwdiParam->ucBSSIdx;
/* Now update the STA entry with the new MAC address */
if(WDI_STATUS_SUCCESS != WDI_STATableSetStaAddr( pWDICtx,
ucSTAIdx,
pwdiParam->staMacAddr))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Failed to update station entry - internal failure");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
/* Now update the STA entry with the new BSSID address */
if(WDI_STATUS_SUCCESS != WDI_STATableSetBSSID( pWDICtx,
ucSTAIdx,
pwdiParam->macBSSID))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Failed to update station entry - internal failure");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
return WDI_STATUS_SUCCESS;
}/*WDI_AddSta*/
/*==========================================================================
@ Function Name
dxeChannelDefaultConfig
@ Description
Get defualt configuration values from pre defined structure
All the channels must have it's own configurations
@ Parameters
WLANDXE_CtrlBlkType: *dxeCtrlBlk,
DXE host driver main control block
WLANDXE_ChannelCBType *channelEntry
Channel specific control block
@ Return
wpt_status
===========================================================================*/
wpt_status dxeChannelDefaultConfig
(
WLANDXE_CtrlBlkType *dxeCtrlBlk,
WLANDXE_ChannelCBType *channelEntry
)
{
wpt_status status = eWLAN_PAL_STATUS_SUCCESS;
wpt_uint32 baseAddress;
wpt_uint32 dxeControlRead = 0;
wpt_uint32 dxeControlWrite = 0;
wpt_uint32 dxeControlWriteValid = 0;
wpt_uint32 dxeControlWriteEop = 0;
wpt_uint32 dxeControlWriteEopInt = 0;
wpt_uint32 idx;
wpt_uint32 rxResourceCount = 0;
WLANDXE_ChannelMappingType *mappedChannel = NULL;
/* Sanity Check */
if((NULL == dxeCtrlBlk) || (NULL == channelEntry))
{
HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
"dxeLinkDescAndCtrlBlk Channel Entry is not valid");
return eWLAN_PAL_STATUS_E_INVAL;
}
for(idx = 0; idx < WDTS_CHANNEL_MAX; idx++)
{
if(channelEntry->channelType == channelList[idx].wlanChannel)
{
mappedChannel = &channelList[idx];
break;
}
}
if((NULL == mappedChannel) || (WDTS_CHANNEL_MAX == idx))
{
HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_ERROR,
"%s Failed to map channel", __func__);
return eWLAN_PAL_STATUS_E_INVAL;
}
wpalMemoryCopy(&channelEntry->channelConfig,
mappedChannel->channelConfig,
sizeof(WLANDXE_ChannelConfigType));
baseAddress = channelBaseAddressList[mappedChannel->DMAChannel];
channelEntry->channelRegister.chDXEBaseAddr = baseAddress;
channelEntry->channelRegister.chDXEStatusRegAddr = baseAddress + WLANDXE_DMA_CH_STATUS_REG;
channelEntry->channelRegister.chDXEDesclRegAddr = baseAddress + WLANDXE_DMA_CH_DESCL_REG;
channelEntry->channelRegister.chDXEDeschRegAddr = baseAddress + WLANDXE_DMA_CH_DESCH_REG;
channelEntry->channelRegister.chDXELstDesclRegAddr = baseAddress + WLANDXE_DMA_CH_LST_DESCL_REG;
channelEntry->channelRegister.chDXECtrlRegAddr = baseAddress + WLANDXE_DMA_CH_CTRL_REG;
channelEntry->channelRegister.chDXESzRegAddr = baseAddress + WLANDXE_DMA_CH_SZ_REG;
channelEntry->channelRegister.chDXEDadrlRegAddr = baseAddress + WLANDXE_DMA_CH_DADRL_REG;
channelEntry->channelRegister.chDXEDadrhRegAddr = baseAddress + WLANDXE_DMA_CH_DADRH_REG;
channelEntry->channelRegister.chDXESadrlRegAddr = baseAddress + WLANDXE_DMA_CH_SADRL_REG;
channelEntry->channelRegister.chDXESadrhRegAddr = baseAddress + WLANDXE_DMA_CH_SADRH_REG;
/* Channel Mask?
* This value will control channel control register.
* This register will be set to trigger actual DMA transfer activate
* CH_N_CTRL */
channelEntry->extraConfig.chan_mask = 0;
/* Check VAL bit before processing descriptor */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_EDVEN_MASK;
/* Use External Descriptor Linked List */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_EDEN_MASK;
/* Enable Channel Interrupt on error */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_INE_ERR_MASK;
/* Enable INT after XFER done */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_INE_DONE_MASK;
/* Enable INT External Descriptor */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_INE_ED_MASK;
/* Set Channel This is not channel, event counter, somthing wrong */
channelEntry->extraConfig.chan_mask |=
mappedChannel->DMAChannel << WLANDXE_CH_CTRL_CTR_SEL_OFFSET;
/* Transfer Type */
channelEntry->extraConfig.chan_mask |= mappedChannel->channelConfig->xfrType;
/* Use Short Descriptor, THIS LOOKS SOME WIERD, REVISIT */
if(!channelEntry->channelConfig.useShortDescFmt)
{
channelEntry->extraConfig.chan_mask |= WLANDXE_DESC_CTRL_DFMT;
}
/* TX Channel, Set DIQ bit, Clear SIQ bit since source is not WQ */
if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
(WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType))
{
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_DIQ_MASK;
if (wpalWcnssIsProntoHwVer3())
{
HDXE_MSG(eWLAN_MODULE_DAL_DATA, eWLAN_PAL_TRACE_LEVEL_INFO,
"Using WQ 6 for TX Low/High PRI Channel");
channelEntry->channelConfig.refWQ = WLANDXE_PRONTO_TX_WQ;
}
}
/* RX Channel, Set SIQ bit, Clear DIQ bit since source is not WQ */
else if((WDTS_CHANNEL_RX_LOW_PRI == channelEntry->channelType) ||
(WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType) ||
(WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
{
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_SIQ_MASK;
}
else
{
/* This is H2H channel, TX, RX not use work Q
* Do Nothing */
}
if (WDTS_CHANNEL_RX_FW_LOG != channelEntry->channelType)
{
/* Frame Contents Swap */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_SWAP_MASK;
}
/* Host System Using Little Endian */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_ENDIAN_MASK;
/* BMU Threshold select */
channelEntry->extraConfig.chan_mask |=
channelEntry->channelConfig.bmuThdSel << WLANDXE_CH_CTRL_BTHLD_SEL_OFFSET;
/* EOP for control register ??? */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_EOP_MASK;
/* Channel Priority */
channelEntry->extraConfig.chan_mask |= channelEntry->channelConfig.chPriority << WLANDXE_CH_CTRL_PRIO_OFFSET;
/* PDU REL */
channelEntry->extraConfig.chan_mask |= WLANDXE_DESC_CTRL_PDU_REL;
/* Disable DMA transfer on this channel */
channelEntry->extraConfig.chan_mask_read_disable = channelEntry->extraConfig.chan_mask;
/* Enable DMA transfer on this channel */
channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_EN_MASK;
/* Channel Mask done */
/* Control Read
* Default Descriptor control Word value for RX ready DXE descriptor
* DXE engine will reference this value before DMA transfer */
dxeControlRead = 0;
/* Source is a Queue ID, not flat memory address */
if (WDTS_CHANNEL_RX_FW_LOG != channelEntry->channelType)
dxeControlRead |= WLANDXE_DESC_CTRL_SIQ;
/* Transfer direction is BMU 2 Host */
if (WDTS_CHANNEL_RX_FW_LOG != channelEntry->channelType)
dxeControlRead |= WLANDXE_DESC_CTRL_XTYPE_B2H;
else
dxeControlRead |= WLANDXE_DESC_CTRL_XTYPE_H2H;
/* End of Packet, RX is single fragment */
dxeControlRead |= WLANDXE_DESC_CTRL_EOP;
/* BD Present, default YES, B2H case it must be 0 to insert BD */
if(!channelEntry->channelConfig.bdPresent)
{
dxeControlRead |= WLANDXE_DESC_CTRL_BDH;
}
/* Channel Priority */
dxeControlRead |= channelEntry->channelConfig.chPriority << WLANDXE_CH_CTRL_PRIO_OFFSET;
/* BMU Threshold select, only used H2B, not this case??? */
dxeControlRead |= channelEntry->channelConfig.bmuThdSel << WLANDXE_CH_CTRL_BTHLD_SEL_OFFSET;
/* PDU Release, Release BD/PDU when DMA done */
dxeControlRead |= WLANDXE_DESC_CTRL_PDU_REL;
/* Use Short Descriptor, THIS LOOKS SOME WIERD, REVISIT */
if(!channelEntry->channelConfig.useShortDescFmt)
{
dxeControlRead |= WLANDXE_DESC_CTRL_DFMT;
}
/* Interrupt on Descriptor done */
dxeControlRead |= WLANDXE_DESC_CTRL_INT;
/* For ready status, this Control WORD must be VALID */
dxeControlRead |= WLANDXE_DESC_CTRL_VALID;
/* Frame Contents Swap */
if (WDTS_CHANNEL_RX_FW_LOG != channelEntry->channelType)
dxeControlRead |= WLANDXE_DESC_CTRL_BDT_SWAP;
/* Host Little Endian */
if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
(WDTS_CHANNEL_TX_HIGH_PRI == channelEntry->channelType) ||
(WDTS_CHANNEL_RX_FW_LOG == channelEntry->channelType))
{
dxeControlRead |= WLANDXE_DESC_CTRL_ENDIANNESS;
}
/* SWAP if needed */
channelEntry->extraConfig.cw_ctrl_read = WLANDXE_U32_SWAP_ENDIAN(dxeControlRead);
/* Control Read Done */
/* Control Write
* Write into DXE descriptor control word to TX frame
* DXE engine will reference this word to contorl TX DMA channel */
channelEntry->extraConfig.cw_ctrl_write = 0;
/* Transfer type, from Host 2 BMU */
dxeControlWrite |= mappedChannel->channelConfig->xfrType;
/* BD Present, this looks some weird ??? */
if(!channelEntry->channelConfig.bdPresent)
{
dxeControlWrite |= WLANDXE_DESC_CTRL_BDH;
}
/* Channel Priority */
dxeControlWrite |= channelEntry->channelConfig.chPriority << WLANDXE_CH_CTRL_PRIO_OFFSET;
/* Use Short Descriptor, THIS LOOKS SOME WIERD, REVISIT */
if(!channelEntry->channelConfig.useShortDescFmt)
{
dxeControlWrite |= WLANDXE_DESC_CTRL_DFMT;
}
/* BMU Threshold select, only used H2B, not this case??? */
dxeControlWrite |= channelEntry->channelConfig.bmuThdSel << WLANDXE_CH_CTRL_BTHLD_SEL_OFFSET;
/* Destination is WQ */
dxeControlWrite |= WLANDXE_DESC_CTRL_DIQ;
/* Frame Contents Swap */
dxeControlWrite |= WLANDXE_DESC_CTRL_BDT_SWAP;
/* Host Little Endian */
dxeControlWrite |= WLANDXE_DESC_CTRL_ENDIANNESS;
/* Interrupt Enable */
dxeControlWrite |= WLANDXE_DESC_CTRL_INT;
dxeControlWriteValid = dxeControlWrite | WLANDXE_DESC_CTRL_VALID;
dxeControlWriteEop = dxeControlWriteValid | WLANDXE_DESC_CTRL_EOP;
dxeControlWriteEopInt = dxeControlWriteEop | WLANDXE_DESC_CTRL_INT;
/* DXE Descriptor must has Endian swapped value */
channelEntry->extraConfig.cw_ctrl_write = WLANDXE_U32_SWAP_ENDIAN(dxeControlWrite);
/* Control Write DONE */
/* Control Write include VAL bit
* This Control word used to set valid bit and
* trigger DMA transfer for specific descriptor */
channelEntry->extraConfig.cw_ctrl_write_valid =
WLANDXE_U32_SWAP_ENDIAN(dxeControlWriteValid);
/* Control Write include EOP
* End of Packet */
channelEntry->extraConfig.cw_ctrl_write_eop =
WLANDXE_U32_SWAP_ENDIAN(dxeControlWriteEop);
/* Control Write include EOP and INT
* indicate End Of Packet and generate interrupt on descriptor Done */
channelEntry->extraConfig.cw_ctrl_write_eop_int =
WLANDXE_U32_SWAP_ENDIAN(dxeControlWriteEopInt);
/* size mask???? */
channelEntry->extraConfig.chk_size_mask =
mappedChannel->channelConfig->chk_size << 10;
channelEntry->extraConfig.refWQ_swapped =
WLANDXE_U32_SWAP_ENDIAN(channelEntry->channelConfig.refWQ);
/* Set Channel specific Interrupt mask */
channelEntry->extraConfig.intMask = channelInterruptMask[mappedChannel->DMAChannel];
wpalGetNumRxRawPacket(&rxResourceCount);
if((WDTS_CHANNEL_TX_LOW_PRI == channelEntry->channelType) ||
(0 == rxResourceCount))
{
channelEntry->numDesc = mappedChannel->channelConfig->nDescs;
}
else if(WDTS_CHANNEL_RX_LOG == channelEntry->channelType)
{
channelEntry->numDesc = mappedChannel->channelConfig->nDescs;
}
else if(WDTS_CHANNEL_RX_FW_LOG == channelEntry->channelType)
{
channelEntry->numDesc = mappedChannel->channelConfig->nDescs;
}
else
{
channelEntry->numDesc = rxResourceCount / 4;
}
channelEntry->assignedDMAChannel = mappedChannel->DMAChannel;
channelEntry->numFreeDesc = 0;
channelEntry->numRsvdDesc = 0;
channelEntry->desc_write_fail_count = 0;
channelEntry->numFragmentCurrentChain = 0;
channelEntry->numTotalFrame = 0;
channelEntry->hitLowResource = eWLAN_PAL_FALSE;
return status;
}
WDI_Status
WDI_STATableAddSta
(
WDI_ControlBlockType* pWDICtx,
WDI_AddStaParams* pwdiParam
)
{
wpt_uint8 ucSTAIdx = 0;
WDI_StaStruct* pSTATable = (WDI_StaStruct*) pWDICtx->staTable;
if (( pwdiParam->ucSTAIdx == WDI_STA_INVALID_IDX) ||
( pwdiParam->ucSTAIdx >= pWDICtx->ucMaxStations ))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Station id sent by HAL is invalid - not OK");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
ucSTAIdx = pwdiParam->ucSTAIdx;
pSTATable[ucSTAIdx].valid = 1;
WDI_STATableSetStaType(pWDICtx, ucSTAIdx, pwdiParam->ucStaType);
WDI_STATableSetStaQosEnabled(pWDICtx, ucSTAIdx,
(wpt_uint8)(pwdiParam->ucWmmEnabled | pwdiParam->ucHTCapable) );
#ifdef WLAN_PERF
pWDICtx->uBdSigSerialNum ++;
#endif
wpalMemoryCopy(pSTATable[ucSTAIdx].macBSSID,
pwdiParam->macBSSID, WDI_MAC_ADDR_LEN);
pSTATable[ucSTAIdx].dpuIndex = pwdiParam->dpuIndex;
pSTATable[ucSTAIdx].dpuSig = pwdiParam->dpuSig;
pSTATable[ucSTAIdx].bcastDpuIndex = pwdiParam->bcastDpuIndex;
pSTATable[ucSTAIdx].bcastDpuSignature = pwdiParam->bcastDpuSignature;
pSTATable[ucSTAIdx].bcastMgmtDpuIndex = pwdiParam->bcastMgmtDpuIndex;
pSTATable[ucSTAIdx].bcastMgmtDpuSignature = pwdiParam->bcastMgmtDpuSignature;
pSTATable[ucSTAIdx].rmfEnabled = pwdiParam->ucRmfEnabled;
pSTATable[ucSTAIdx].bssIdx = pwdiParam->ucBSSIdx;
if(WDI_STATUS_SUCCESS != WDI_STATableSetStaAddr( pWDICtx,
ucSTAIdx,
pwdiParam->staMacAddr))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Failed to update station entry - internal failure");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
if(WDI_STATUS_SUCCESS != WDI_STATableSetBSSID( pWDICtx,
ucSTAIdx,
pwdiParam->macBSSID))
{
WPAL_TRACE(eWLAN_MODULE_DAL_CTRL, eWLAN_PAL_TRACE_LEVEL_ERROR,
"Failed to update station entry - internal failure");
WDI_ASSERT(0);
return WDI_STATUS_E_FAILURE;
}
return WDI_STATUS_SUCCESS;
}