/*********************************************************************************************************
** 函数名称: armL2x0Enable
** 功能描述: 使能 L2 CACHE 控制器
** 输 入 : pl2cdrv 驱动结构
** 输 出 : NONE
** 全局变量:
** 调用模块:
** 注 意 : 如果有 lockdown 必须首先 unlock & invalidate 才能启动 L2.
*********************************************************************************************************/
static VOID armL2x0Enable (L2C_DRVIER *pl2cdrv)
{
while (!(read32_le(L2C_BASE(pl2cdrv) + L2C_CTRL) & 0x01)) {
write32_le(L2C_AUX(pl2cdrv), L2C_BASE(pl2cdrv) + L2C_AUX_CTRL); /* 有些处理器需要此操作 */
armL2x0InvalidateAll(pl2cdrv);
write32_le(0x01, L2C_BASE(pl2cdrv) + L2C_CTRL);
armL2x0Sync(pl2cdrv);
}
}
/*********************************************************************************************************
** 函数名称: armL2x0Disable
** 功能描述: 禁能 L2 CACHE 控制器
** 输 入 : pl2cdrv 驱动结构
** 输 出 : NONE
** 全局变量:
** 调用模块:
*********************************************************************************************************/
static VOID armL2x0Disable (L2C_DRVIER *pl2cdrv)
{
while (read32_le(L2C_BASE(pl2cdrv) + L2C_CTRL) & 0x01) {
armL2x0ClearAll(pl2cdrv);
write32_le(0x00, L2C_BASE(pl2cdrv) + L2C_CTRL);
}
}
/*********************************************************************************************************
** 函数名称: armL2x0Init
** 功能描述: 初始化 L2 CACHE 控制器
** 输 入 : pl2cdrv 驱动结构
** uiInstruction 指令 CACHE 类型
** uiData 数据 CACHE 类型
** pcMachineName 机器名称
** uiAux L2C_AUX_CTRL
** 输 出 : NONE
** 全局变量:
** 调用模块:
*********************************************************************************************************/
VOID armL2x0Init (L2C_DRVIER *pl2cdrv,
CACHE_MODE uiInstruction,
CACHE_MODE uiData,
CPCHAR pcMachineName,
UINT32 uiAux)
{
pl2cdrv->L2CD_pfuncEnable = armL2x0Enable;
pl2cdrv->L2CD_pfuncDisable = armL2x0Disable;
pl2cdrv->L2CD_pfuncIsEnable = armL2x0IsEnable;
pl2cdrv->L2CD_pfuncSync = armL2x0Sync;
pl2cdrv->L2CD_pfuncFlush = armL2x0Flush;
pl2cdrv->L2CD_pfuncFlushAll = armL2x0FlushAll;
pl2cdrv->L2CD_pfuncInvalidate = armL2x0Invalidate;
pl2cdrv->L2CD_pfuncInvalidateAll = armL2x0InvalidateAll;
pl2cdrv->L2CD_pfuncClear = armL2x0Clear;
pl2cdrv->L2CD_pfuncClearAll = armL2x0ClearAll;
if (!(read32_le(L2C_BASE(pl2cdrv) + L2C_CTRL) & 0x01)) {
write32_le(uiAux, L2C_BASE(pl2cdrv) + L2C_AUX_CTRL); /* l2x0 controller is disabled */
armL2x0InvalidateAll(pl2cdrv);
}
}
void cf_salsa20_core(const uint8_t key0[16],
const uint8_t key1[16],
const uint8_t nonce[16],
const uint8_t constant[16],
uint8_t out[64])
{
/* unpack sequence is:
*
* c0
* key0
* c1
* nonce
* c2
* key1
* c3
*
* where c0, c1, c2, c3 = constant
*/
uint32_t z0, z1, z2, z3, z4, z5, z6, z7,
z8, z9, za, zb, zc, zd, ze, zf;
uint32_t x0 = z0 = read32_le(constant + 0),
x1 = z1 = read32_le(key0 + 0),
x2 = z2 = read32_le(key0 + 4),
x3 = z3 = read32_le(key0 + 8),
x4 = z4 = read32_le(key0 + 12),
x5 = z5 = read32_le(constant + 4),
x6 = z6 = read32_le(nonce + 0),
x7 = z7 = read32_le(nonce + 4),
x8 = z8 = read32_le(nonce + 8),
x9 = z9 = read32_le(nonce + 12),
xa = za = read32_le(constant + 8),
xb = zb = read32_le(key1 + 0),
xc = zc = read32_le(key1 + 4),
xd = zd = read32_le(key1 + 8),
xe = ze = read32_le(key1 + 12),
xf = zf = read32_le(constant + 12);
#define QUARTER(v0, v1, v2, v3) \
v1 ^= rotl32(v0 + v3, 7); \
v2 ^= rotl32(v1 + v0, 9); \
v3 ^= rotl32(v2 + v1, 13);\
v0 ^= rotl32(v3 + v2, 18)
#define ROW \
QUARTER(z0, z1, z2, z3); \
QUARTER(z5, z6, z7, z4); \
QUARTER(za, zb, z8, z9); \
QUARTER(zf, zc, zd, ze)
#define COLUMN\
QUARTER(z0, z4, z8, zc); \
QUARTER(z5, z9, zd, z1); \
QUARTER(za, ze, z2, z6); \
QUARTER(zf, z3, z7, zb)
for (int i = 0; i < 10; i++)
{
COLUMN;
ROW;
}
x0 += z0;
x1 += z1;
x2 += z2;
x3 += z3;
x4 += z4;
x5 += z5;
x6 += z6;
x7 += z7;
x8 += z8;
x9 += z9;
xa += za;
xb += zb;
xc += zc;
xd += zd;
xe += ze;
xf += zf;
write32_le(x0, out + 0);
write32_le(x1, out + 4);
write32_le(x2, out + 8);
write32_le(x3, out + 12);
write32_le(x4, out + 16);
write32_le(x5, out + 20);
write32_le(x6, out + 24);
write32_le(x7, out + 28);
write32_le(x8, out + 32);
write32_le(x9, out + 36);
write32_le(xa, out + 40);
write32_le(xb, out + 44);
write32_le(xc, out + 48);
write32_le(xd, out + 52);
write32_le(xe, out + 56);
write32_le(xf, out + 60);
}
/*********************************************************************************************************
** 函数名称: armPl310ClearAll
** 功能描述: L2 CACHE 控制器回写并无效所有数据
** 输 入 : pl2cdrv 驱动结构
** 输 出 : NONE
** 全局变量:
** 调用模块:
*********************************************************************************************************/
static VOID armL2x0ClearAll (L2C_DRVIER *pl2cdrv)
{
write32_le(L2C_WAYMASK(pl2cdrv), L2C_BASE(pl2cdrv) + L2C_CLEAN_INV_WAY);
while (read32_le(L2C_BASE(pl2cdrv) + L2C_CLEAN_INV_WAY));
armL2x0Sync(pl2cdrv);
}
/*********************************************************************************************************
** 函数名称: armPl310ClearLine
** 功能描述: L2 CACHE 控制器回写并无效一行数据
** 输 入 : pl2cdrv 驱动结构
** ulPhyAddr 物理地址
** 输 出 : NONE
** 全局变量:
** 调用模块:
*********************************************************************************************************/
static VOID armL2x0ClearLine (L2C_DRVIER *pl2cdrv, addr_t ulPhyAddr)
{
while (read32_le(L2C_BASE(pl2cdrv) + L2C_CLEAN_INV_LINE_PA) & 1);
write32_le((UINT32)ulPhyAddr, L2C_BASE(pl2cdrv) + L2C_CLEAN_INV_LINE_PA);
}
/*********************************************************************************************************
** 函数名称: armPl310InvalidateAll
** 功能描述: L2 CACHE 控制器无效所有数据
** 输 入 : pl2cdrv 驱动结构
** 输 出 : NONE
** 全局变量:
** 调用模块:
*********************************************************************************************************/
static VOID armL2x0InvalidateAll (L2C_DRVIER *pl2cdrv)
{
write32_le(L2C_WAYMASK(pl2cdrv), L2C_BASE(pl2cdrv) + L2C_INV_WAY);
while (read32_le(L2C_BASE(pl2cdrv) + L2C_INV_WAY));
armL2x0Sync(pl2cdrv);
}
