/**
* xilinx_drm_plane_manager_dpms - Set DPMS for the Xilinx plane manager
* @manager: Xilinx plane manager object
* @dpms: requested DPMS
*
* Set the Xilinx plane manager to the given DPMS state. This function is
* usually called from the CRTC driver with calling xilinx_drm_plane_dpms().
*/
void xilinx_drm_plane_manager_dpms(struct xilinx_drm_plane_manager *manager,
int dpms)
{
switch (dpms) {
case DRM_MODE_DPMS_ON:
if (manager->dp_sub) {
xilinx_drm_dp_sub_set_bg_color(manager->dp_sub,
0, 0, 0);
xilinx_drm_dp_sub_enable(manager->dp_sub);
}
if (manager->osd) {
xilinx_osd_disable_rue(manager->osd);
xilinx_osd_enable(manager->osd);
xilinx_osd_enable_rue(manager->osd);
}
break;
default:
if (manager->osd)
xilinx_osd_reset(manager->osd);
if (manager->dp_sub)
xilinx_drm_dp_sub_disable(manager->dp_sub);
break;
}
}
/* set plane dpms */
void xilinx_drm_plane_dpms(struct drm_plane *base_plane, int dpms)
{
struct xilinx_drm_plane *plane = to_xilinx_plane(base_plane);
struct xilinx_drm_plane_manager *manager = plane->manager;
DRM_DEBUG_KMS("plane->id: %d\n", plane->id);
DRM_DEBUG_KMS("dpms: %d -> %d\n", plane->dpms, dpms);
if (plane->dpms == dpms)
return;
plane->dpms = dpms;
switch (dpms) {
case DRM_MODE_DPMS_ON:
/* start dma engine */
dma_async_issue_pending(plane->dma.chan);
if (plane->rgb2yuv)
xilinx_rgb2yuv_enable(plane->rgb2yuv);
if (plane->cresample)
xilinx_cresample_enable(plane->cresample);
/* enable osd */
if (manager->osd) {
xilinx_osd_disable_rue(manager->osd);
xilinx_osd_layer_set_priority(plane->osd_layer,
plane->prio);
xilinx_osd_layer_set_alpha(plane->osd_layer, 1,
plane->alpha);
xilinx_osd_layer_enable(plane->osd_layer);
if (plane->priv) {
/* set background color as black */
xilinx_osd_set_color(manager->osd, 0x0, 0x0,
0x0);
xilinx_osd_enable(manager->osd);
}
xilinx_osd_enable_rue(manager->osd);
}
break;
default:
/* disable/reset osd */
if (manager->osd) {
xilinx_osd_disable_rue(manager->osd);
xilinx_osd_layer_set_dimension(plane->osd_layer,
0, 0, 0, 0);
xilinx_osd_layer_disable(plane->osd_layer);
if (plane->priv)
xilinx_osd_reset(manager->osd);
xilinx_osd_enable_rue(manager->osd);
}
if (plane->cresample) {
xilinx_cresample_disable(plane->cresample);
xilinx_cresample_reset(plane->cresample);
}
if (plane->rgb2yuv) {
xilinx_rgb2yuv_disable(plane->rgb2yuv);
xilinx_rgb2yuv_reset(plane->rgb2yuv);
}
/* stop dma engine and release descriptors */
dmaengine_terminate_all(plane->dma.chan);
break;
}
}
