int domain_init(struct grid *phi, int imax, int jmax, int kmax, double north, double south, double east, double west, double top, double bottom) { size_t n = 0; int ierr = 0; if (phi->data) { warnx("Domain is already initialized"); return(EXIT_FAILURE); } n = imax * jmax * kmax; phi->imax = imax; phi->jmax = jmax; phi->kmax = kmax; phi->data = xmemalign(n * sizeof(double)); ierr = domain_bc(phi, north, south, east, west, top, bottom); if (ierr) { warnx("Unable to set boundary conditions"); return(EXIT_FAILURE); } return(EXIT_SUCCESS); }
SpiFlash *new_spi_flash(SpiOps *spi) { uint32_t rom_size = lib_sysinfo.spi_flash.size; uint32_t sector_size = lib_sysinfo.spi_flash.sector_size; uint8_t erase_cmd = lib_sysinfo.spi_flash.erase_cmd; SpiFlash *flash = xmalloc(sizeof(*flash)); memset(flash, 0, sizeof(*flash)); flash->ops.read = spi_flash_read; flash->ops.write = spi_flash_write; flash->ops.erase = spi_flash_erase; flash->ops.write_status = spi_flash_write_status; flash->ops.read_status = spi_flash_read_status; flash->ops.is_wp_enabled = spi_flash_is_wp_enabled; flash->ops.sector_size = sector_size; assert(rom_size == ALIGN_DOWN(rom_size, sector_size)); flash->ops.sector_count = rom_size / sector_size; flash->spi = spi; flash->rom_size = rom_size; flash->erase_cmd = erase_cmd; /* Provide sufficient alignment on the cache buffer so that the * underlying SPI controllers can perform optimal DMA transfers. */ flash->cache = xmemalign(1*KiB, rom_size); return flash; }
static int nommu_v7_vectors_init(void) { void *vectors; u32 cr; if (cpu_architecture() < CPU_ARCH_ARMv7) return 0; /* * High vectors cannot be re-mapped, so we have to use normal * vectors */ cr = get_cr(); cr &= ~CR_V; set_cr(cr); arm_fixup_vectors(); vectors = xmemalign(PAGE_SIZE, PAGE_SIZE); memset(vectors, 0, PAGE_SIZE); memcpy(vectors, __exceptions_start, __exceptions_size); set_vbar((unsigned int)vectors); return 0; }
/* * Initialize device structure. Returns success if * initialization succeeded. */ static int gfar_probe(struct device_d *dev) { struct gfar_info_struct *gfar_info = dev->platform_data; struct eth_device *edev; struct gfar_private *priv; size_t size; char *p; priv = xzalloc(sizeof(struct gfar_private)); if (NULL == priv) return -ENODEV; edev = &priv->edev; priv->regs = dev_request_mem_region(dev, 0); priv->phyregs = dev_request_mem_region(dev, 1); priv->phyregs_sgmii = dev_request_mem_region(dev, 2); priv->phyaddr = gfar_info->phyaddr; priv->tbicr = gfar_info->tbicr; priv->tbiana = gfar_info->tbiana; /* * Allocate descriptors 64-bit aligned. Descriptors * are 8 bytes in size. */ size = ((TX_BUF_CNT * sizeof(struct txbd8)) + (RX_BUF_CNT * sizeof(struct rxbd8))) + BUF_ALIGN; p = (char *)xmemalign(BUF_ALIGN, size); priv->txbd = (struct txbd8 *)p; priv->rxbd = (struct rxbd8 *)(p + (TX_BUF_CNT * sizeof(struct txbd8))); edev->priv = priv; edev->init = gfar_init; edev->open = gfar_open; edev->halt = gfar_halt; edev->send = gfar_send; edev->recv = gfar_recv; edev->get_ethaddr = gfar_get_ethaddr; edev->set_ethaddr = gfar_set_ethaddr; edev->parent = dev; setbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET); udelay(2); clrbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET); priv->miibus.read = gfar_miiphy_read; priv->miibus.write = gfar_miiphy_write; priv->miibus.priv = priv; priv->miibus.parent = dev; gfar_init_phy(edev); mdiobus_register(&priv->miibus); return eth_register(edev); }
int csc_image_yuv2rgb(struct x264lib_ctx *ctx, uint8_t *in[3], const int stride[3], uint8_t **out, int *outsz, int *outstride) { AVPicture pic; if (!ctx->yuv2rgb) return 1; avpicture_fill(&pic, xmemalign(ctx->height * ctx->width * 3), PIX_FMT_RGB24, ctx->width, ctx->height); sws_scale(ctx->yuv2rgb, (const uint8_t * const*) in, stride, 0, ctx->height, pic.data, pic.linesize); /* Output (must be freed!) */ *out = pic.data[0]; *outsz = pic.linesize[0] * ctx->height; *outstride = pic.linesize[0]; return 0; }
/* * Initialize device structure. Returns success if * initialization succeeded. */ static int gfar_probe(struct device_d *dev) { struct gfar_info_struct *gfar_info = dev->platform_data; struct eth_device *edev; struct gfar_private *priv; struct device_d *mdev; size_t size; char devname[16]; char *p; priv = xzalloc(sizeof(struct gfar_private)); edev = &priv->edev; priv->mdiobus_tbi = gfar_info->mdiobus_tbi; priv->regs = dev_get_mem_region(dev, 0); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); priv->phyaddr = gfar_info->phyaddr; priv->tbicr = gfar_info->tbicr; priv->tbiana = gfar_info->tbiana; mdev = get_device_by_name("gfar-mdio0"); if (mdev == NULL) { pr_err("gfar-mdio0 was not found\n"); return -ENODEV; } priv->gfar_mdio = mdev->priv; if (priv->mdiobus_tbi != 0) { sprintf(devname, "%s%d", "gfar-tbiphy", priv->mdiobus_tbi); mdev = get_device_by_name(devname); if (mdev == NULL) { pr_err("%s was not found\n", devname); return -ENODEV; } } priv->gfar_tbi = mdev->priv; /* * Allocate descriptors 64-bit aligned. Descriptors * are 8 bytes in size. */ size = ((TX_BUF_CNT * sizeof(struct txbd8)) + (RX_BUF_CNT * sizeof(struct rxbd8))) + BUF_ALIGN; p = (char *)xmemalign(BUF_ALIGN, size); priv->txbd = (struct txbd8 __iomem *)p; priv->rxbd = (struct rxbd8 __iomem *)(p + (TX_BUF_CNT * sizeof(struct txbd8))); edev->priv = priv; edev->init = gfar_init; edev->open = gfar_open; edev->halt = gfar_halt; edev->send = gfar_send; edev->recv = gfar_recv; edev->get_ethaddr = gfar_get_ethaddr; edev->set_ethaddr = gfar_set_ethaddr; edev->parent = dev; setbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET); udelay(2); clrbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET); gfar_init_phy(edev); return eth_register(edev); }
/* * Remember all NFS typed partitions. */ void init_nfs(void) { struct stat st; struct mntent * ent; FILE * mnt; nlist = (NFS*)0; if (stat("/proc/version", &st) < 0) return; if ((mnt = setmntent("/proc/mounts", "r")) == (FILE*)0) return; while ((ent = getmntent(mnt))) { if (isnetfs(ent->mnt_type)) { size_t nlen = strlen(ent->mnt_dir); NFS *restrict p; xmemalign((void*)&p, sizeof(void*), alignof(NFS)+(nlen+1)); p->name = ((char*)p)+alignof(NFS); p->nlen = nlen; p->shadow = (SHADOW*)0; strcpy(p->name, ent->mnt_dir); if (nlist) nlist->prev = p; p->next = nlist; p->prev = (NFS*)0; nlist = p; } } endmntent(mnt); if ((mnt = setmntent("/proc/mounts", "r")) == (FILE*)0) return; while ((ent = getmntent(mnt))) { NFS *p; for (p = nlist; p; p = p->next) { SHADOW * restrict s; size_t nlen; if (strcmp(ent->mnt_dir, p->name) == 0) continue; if (strncmp(ent->mnt_dir, p->name, p->nlen) != 0) continue; nlen = strlen(ent->mnt_dir); xmemalign((void*)&s, sizeof(void*), alignof(SHADOW)+(nlen+1)); s->name = ((char*)s)+alignof(SHADOW); s->nlen = nlen; strcpy(s->name, ent->mnt_dir); if (p->shadow) p->shadow->prev = s; s->next = p->shadow; s->prev = (SHADOW*)0; p->shadow = s; } } endmntent(mnt); }
static int davinci_emac_probe(struct device_d *dev) { struct davinci_emac_platform_data *pdata; struct davinci_emac_priv *priv; uint64_t start; uint32_t phy_mask; dev_dbg(dev, "+ emac_probe\n"); if (!dev->platform_data) { dev_err(dev, "no platform_data\n"); return -ENODEV; } pdata = dev->platform_data; priv = xzalloc(sizeof(*priv)); dev->priv = priv; priv->dev = dev; priv->adap_emac = dev_request_mem_region(dev, 0); priv->adap_ewrap = dev_request_mem_region(dev, 1); priv->adap_mdio = dev_request_mem_region(dev, 2); priv->emac_desc_base = dev_request_mem_region(dev, 3); /* EMAC descriptors */ priv->emac_rx_desc = priv->emac_desc_base + EMAC_RX_DESC_BASE; priv->emac_tx_desc = priv->emac_desc_base + EMAC_TX_DESC_BASE; priv->emac_rx_active_head = NULL; priv->emac_rx_active_tail = NULL; priv->emac_rx_queue_active = 0; /* Receive packet buffers */ priv->emac_rx_buffers = xmemalign(4096, EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)); priv->edev.priv = priv; priv->edev.init = davinci_emac_init; priv->edev.open = davinci_emac_open; priv->edev.halt = davinci_emac_halt; priv->edev.send = davinci_emac_send; priv->edev.recv = davinci_emac_recv; priv->edev.get_ethaddr = davinci_emac_get_ethaddr; priv->edev.set_ethaddr = davinci_emac_set_ethaddr; priv->edev.parent = dev; davinci_eth_mdio_enable(priv); start = get_time_ns(); while (1) { phy_mask = readl(priv->adap_mdio + EMAC_MDIO_ALIVE); if (phy_mask) { dev_info(dev, "detected phy mask 0x%x\n", phy_mask); phy_mask = ~phy_mask; break; } if (is_timeout(start, 256 * MSECOND)) { dev_err(dev, "no live phy, scanning all\n"); phy_mask = 0; break; } } if (pdata->interface_rmii) priv->interface = PHY_INTERFACE_MODE_RMII; else priv->interface = PHY_INTERFACE_MODE_MII; priv->phy_addr = pdata->phy_addr; priv->phy_flags = pdata->force_link ? PHYLIB_FORCE_LINK : 0; priv->miibus.read = davinci_miibus_read; priv->miibus.write = davinci_miibus_write; priv->miibus.priv = priv; priv->miibus.parent = dev; priv->miibus.phy_mask = phy_mask; mdiobus_register(&priv->miibus); eth_register(&priv->edev); dev_dbg(dev, "- emac_probe\n"); return 0; }
static int do_bootm_efi(struct image_data *data) { void *tmp; void *initrd = NULL; size_t size; efi_handle_t handle; int ret; const char *options; efi_loaded_image_t *loaded_image; struct linux_kernel_header *image_header, *boot_header; ret = efi_load_image(data->os_file, &loaded_image, &handle); if (ret) return ret; image_header = (struct linux_kernel_header *)loaded_image->image_base; if (image_header->boot_flag != 0xAA55 || image_header->header != 0x53726448 || image_header->version < 0x20b || !image_header->relocatable_kernel) { pr_err("Not a valid kernel image!\n"); BS->unload_image(handle); return -EINVAL; } boot_header = xmalloc(0x4000); memset(boot_header, 0, 0x4000); memcpy(boot_header, image_header, sizeof(*image_header)); boot_header->type_of_loader = 0xff; if (data->initrd_file) { tmp = read_file(data->initrd_file, &size); initrd = xmemalign(PAGE_SIZE, PAGE_ALIGN(size)); memcpy(initrd, tmp, size); memset(initrd + size, 0, PAGE_ALIGN(size) - size); free(tmp); boot_header->ramdisk_image = (uint64_t)initrd; boot_header->ramdisk_size = PAGE_ALIGN(size); } options = linux_bootargs_get(); boot_header->cmd_line_ptr = (uint64_t)options; boot_header->cmdline_size = strlen(options); boot_header->code32_start = (uint64_t)loaded_image->image_base + (image_header->setup_sects+1) * 512; if (bootm_verbose(data)) { printf("\nStarting kernel at 0x%p", loaded_image->image_base); if (data->initrd_file) printf(", initrd at 0x%08x", boot_header->ramdisk_image); printf("...\n"); } if (data->dryrun) { BS->unload_image(handle); free(boot_header); free(initrd); return 0; } efi_set_variable_usec("LoaderTimeExecUSec", &efi_systemd_vendor_guid, get_time_ns()/1000); linux_efi_handover(handle, boot_header); return 0; }