예제 #1
0
  static RegSet range(Register start, Register end) {
    uint32_t bits = ~0;
    bits <<= start->encoding();
    bits <<= 31 - end->encoding();
    bits >>= 31 - end->encoding();

    return RegSet(bits);
  }
예제 #2
0
void C1_MacroAssembler::initialize_body(Register objectFields, Register len_in_bytes, Register Rzero) {
  Label done;
  assert_different_registers(objectFields, len_in_bytes, Rzero);

  // Initialize object fields.
  // See documentation for MVCLE instruction!!!
  assert(objectFields->encoding()%2==0, "objectFields must be an even register");
  assert(len_in_bytes->encoding() == (objectFields->encoding()+1), "objectFields and len_in_bytes must be a register pair");
  assert(Rzero->encoding()%2==1, "Rzero must be an odd register");

  // Use Rzero as src length, then mvcle will copy nothing
  // and fill the object with the padding value 0.
  move_long_ext(objectFields, as_Register(Rzero->encoding()-1), 0);
  bind(done);
}
예제 #3
0
void VMRegImpl::set_regName() {
  Register reg = ::as_Register(0);
  int i;
  for (i = 0; i < ConcreteRegisterImpl::max_gpr; ) {
    regName[i++] = reg->name();
    regName[i++] = reg->name();
    if (reg->encoding() < RegisterImpl::number_of_registers-1)
      reg = reg->successor();
  }

  FloatRegister freg = ::as_FloatRegister(0);
  for ( ; i < ConcreteRegisterImpl::max_fpr; ) {
    regName[i++] = freg->name();
    regName[i++] = freg->name();
    if (reg->encoding() < FloatRegisterImpl::number_of_registers-1)
      freg = freg->successor();
  }
  for ( ; i < ConcreteRegisterImpl::number_of_registers; i++) {
    regName[i] = "NON-GPR-FPR";
  }
}
void NativePopReg::insert(address code_pos, Register reg) {
  assert(NativePopReg::instruction_size == sizeof(char), "right address unit for update");
  *code_pos = (char)(instruction_code | reg->encoding())&0xFF;  
  ICache::invalidate_range(code_pos, instruction_size);
}