// This function returns true if the triples match.
static bool triplesMatch(const Triple &T0, const Triple &T1) {
// If vendor is apple, ignore the version number.
if (T0.getVendor() == Triple::Apple)
return T0.getArch() == T1.getArch() && T0.getSubArch() == T1.getSubArch() &&
T0.getVendor() == T1.getVendor() && T0.getOS() == T1.getOS();
return T0 == T1;
}
std::string ARM_MC::ParseARMTriple(const Triple &TT, StringRef CPU) {
bool isThumb =
TT.getArch() == Triple::thumb || TT.getArch() == Triple::thumbeb;
bool NoCPU = CPU == "generic" || CPU.empty();
std::string ARMArchFeature;
switch (TT.getSubArch()) {
default:
llvm_unreachable("invalid sub-architecture for ARM");
case Triple::ARMSubArch_v8:
if (NoCPU)
// v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
// FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
// FeatureT2XtPk, FeatureCrypto, FeatureCRC
ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
"+trustzone,+t2xtpk,+crypto,+crc";
else
// Use CPU to figure out the exact features
ARMArchFeature = "+v8";
break;
case Triple::ARMSubArch_v8_1a:
if (NoCPU)
// v8.1a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
// FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
// FeatureT2XtPk, FeatureCrypto, FeatureCRC, FeatureV8_1a
ARMArchFeature = "+v8.1a,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
"+trustzone,+t2xtpk,+crypto,+crc";
else
// Use CPU to figure out the exact features
ARMArchFeature = "+v8.1a";
break;
case Triple::ARMSubArch_v7m:
isThumb = true;
if (NoCPU)
// v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
else
// Use CPU to figure out the exact features.
ARMArchFeature = "+v7";
break;
case Triple::ARMSubArch_v7em:
if (NoCPU)
// v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
// FeatureT2XtPk, FeatureMClass
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,+t2xtpk,+mclass";
else
// Use CPU to figure out the exact features.
ARMArchFeature = "+v7";
break;
case Triple::ARMSubArch_v7s:
if (NoCPU)
// v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
// Swift
ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
else
// Use CPU to figure out the exact features.
ARMArchFeature = "+v7";
break;
case Triple::ARMSubArch_v7:
// v7 CPUs have lots of different feature sets. If no CPU is specified,
// then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
// the "minimum" feature set and use CPU string to figure out the exact
// features.
if (NoCPU)
// v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
else
// Use CPU to figure out the exact features.
ARMArchFeature = "+v7";
break;
case Triple::ARMSubArch_v6t2:
ARMArchFeature = "+v6t2";
break;
case Triple::ARMSubArch_v6k:
ARMArchFeature = "+v6k";
break;
case Triple::ARMSubArch_v6m:
isThumb = true;
if (NoCPU)
// v6m: FeatureNoARM, FeatureMClass
ARMArchFeature = "+v6m,+noarm,+mclass";
else
ARMArchFeature = "+v6";
break;
case Triple::ARMSubArch_v6:
ARMArchFeature = "+v6";
break;
case Triple::ARMSubArch_v5te:
ARMArchFeature = "+v5te";
break;
case Triple::ARMSubArch_v5:
ARMArchFeature = "+v5t";
break;
case Triple::ARMSubArch_v4t:
ARMArchFeature = "+v4t";
break;
case Triple::NoSubArch:
break;
}
if (isThumb) {
if (ARMArchFeature.empty())
ARMArchFeature = "+thumb-mode";
else
ARMArchFeature += ",+thumb-mode";
}
if (TT.isOSNaCl()) {
if (ARMArchFeature.empty())
ARMArchFeature = "+nacl-trap";
else
ARMArchFeature += ",+nacl-trap";
}
return ARMArchFeature;
}
// FIXME Encode from a tablegen description or target parser.
void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
if (TheTriple.getSubArch() != Triple::NoSubArch)
return;
ARMAttributeParser Attributes;
std::error_code EC = getBuildAttributes(Attributes);
if (EC)
return;
std::string Triple;
// Default to ARM, but use the triple if it's been set.
if (TheTriple.getArch() == Triple::thumb ||
TheTriple.getArch() == Triple::thumbeb)
Triple = "thumb";
else
Triple = "arm";
if (Attributes.hasAttribute(ARMBuildAttrs::CPU_arch)) {
switch(Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch)) {
case ARMBuildAttrs::v4:
Triple += "v4";
break;
case ARMBuildAttrs::v4T:
Triple += "v4t";
break;
case ARMBuildAttrs::v5T:
Triple += "v5t";
break;
case ARMBuildAttrs::v5TE:
Triple += "v5te";
break;
case ARMBuildAttrs::v5TEJ:
Triple += "v5tej";
break;
case ARMBuildAttrs::v6:
Triple += "v6";
break;
case ARMBuildAttrs::v6KZ:
Triple += "v6kz";
break;
case ARMBuildAttrs::v6T2:
Triple += "v6t2";
break;
case ARMBuildAttrs::v6K:
Triple += "v6k";
break;
case ARMBuildAttrs::v7:
Triple += "v7";
break;
case ARMBuildAttrs::v6_M:
Triple += "v6m";
break;
case ARMBuildAttrs::v6S_M:
Triple += "v6sm";
break;
case ARMBuildAttrs::v7E_M:
Triple += "v7em";
break;
}
}
if (!isLittleEndian())
Triple += "eb";
TheTriple.setArchName(Triple);
}
