예제 #1
0
void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
                               SelectionDAG *DAG) {
  Fn = &fn;
  MF = &mf;
  TLI = MF->getSubtarget().getTargetLowering();
  RegInfo = &MF->getRegInfo();
  MachineModuleInfo &MMI = MF->getMMI();
  const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
  unsigned StackAlign = TFI->getStackAlignment();

  // Check whether the function can return without sret-demotion.
  SmallVector<ISD::OutputArg, 4> Outs;
  GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
                mf.getDataLayout());
  CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
                                       Fn->isVarArg(), Outs, Fn->getContext());

  // If this personality uses funclets, we need to do a bit more work.
  DenseMap<const AllocaInst *, int *> CatchObjects;
  EHPersonality Personality = classifyEHPersonality(
      Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
  if (isFuncletEHPersonality(Personality)) {
    // Calculate state numbers if we haven't already.
    WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
    if (Personality == EHPersonality::MSVC_CXX)
      calculateWinCXXEHStateNumbers(&fn, EHInfo);
    else if (isAsynchronousEHPersonality(Personality))
      calculateSEHStateNumbers(&fn, EHInfo);
    else if (Personality == EHPersonality::CoreCLR)
      calculateClrEHStateNumbers(&fn, EHInfo);

    // Map all BB references in the WinEH data to MBBs.
    for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
      for (WinEHHandlerType &H : TBME.HandlerArray) {
        if (const AllocaInst *AI = H.CatchObj.Alloca)
          CatchObjects.insert({AI, &H.CatchObj.FrameIndex});
        else
          H.CatchObj.FrameIndex = INT_MAX;
      }
    }
  }

  // Initialize the mapping of values to registers.  This is only set up for
  // instruction values that are used outside of the block that defines
  // them.
  Function::const_iterator BB = Fn->begin(), EB = Fn->end();
  for (; BB != EB; ++BB)
    for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
         I != E; ++I) {
      if (const AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
        Type *Ty = AI->getAllocatedType();
        unsigned Align =
          std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
                   AI->getAlignment());

        // Static allocas can be folded into the initial stack frame
        // adjustment. For targets that don't realign the stack, don't
        // do this if there is an extra alignment requirement.
        if (AI->isStaticAlloca() && 
            (TFI->isStackRealignable() || (Align <= StackAlign))) {
          const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
          uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);

          TySize *= CUI->getZExtValue();   // Get total allocated size.
          if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
          int FrameIndex = INT_MAX;
          auto Iter = CatchObjects.find(AI);
          if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
            FrameIndex = MF->getFrameInfo().CreateFixedObject(
                TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
            MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
          } else {
            FrameIndex =
                MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
          }

          StaticAllocaMap[AI] = FrameIndex;
          // Update the catch handler information.
          if (Iter != CatchObjects.end())
            *Iter->second = FrameIndex;
        } else {
          // FIXME: Overaligned static allocas should be grouped into
          // a single dynamic allocation instead of using a separate
          // stack allocation for each one.
          if (Align <= StackAlign)
            Align = 0;
          // Inform the Frame Information that we have variable-sized objects.
          MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
        }
      }

      // Look for inline asm that clobbers the SP register.
      if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
        ImmutableCallSite CS(&*I);
        if (isa<InlineAsm>(CS.getCalledValue())) {
          unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
          const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
          std::vector<TargetLowering::AsmOperandInfo> Ops =
              TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
          for (size_t I = 0, E = Ops.size(); I != E; ++I) {
            TargetLowering::AsmOperandInfo &Op = Ops[I];
            if (Op.Type == InlineAsm::isClobber) {
              // Clobbers don't have SDValue operands, hence SDValue().
              TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
              std::pair<unsigned, const TargetRegisterClass *> PhysReg =
                  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
                                                    Op.ConstraintVT);
              if (PhysReg.first == SP)
                MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
            }
          }
        }
      }

      // Look for calls to the @llvm.va_start intrinsic. We can omit some
      // prologue boilerplate for variadic functions that don't examine their
      // arguments.
      if (const auto *II = dyn_cast<IntrinsicInst>(I)) {
        if (II->getIntrinsicID() == Intrinsic::vastart)
          MF->getFrameInfo().setHasVAStart(true);
      }

      // If we have a musttail call in a variadic function, we need to ensure we
      // forward implicit register parameters.
      if (const auto *CI = dyn_cast<CallInst>(I)) {
        if (CI->isMustTailCall() && Fn->isVarArg())
          MF->getFrameInfo().setHasMustTailInVarArgFunc(true);
      }

      // Mark values used outside their block as exported, by allocating
      // a virtual register for them.
      if (isUsedOutsideOfDefiningBlock(&*I))
        if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(I)))
          InitializeRegForValue(&*I);

      // Collect llvm.dbg.declare information. This is done now instead of
      // during the initial isel pass through the IR so that it is done
      // in a predictable order.
      if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
        assert(DI->getVariable() && "Missing variable");
        assert(DI->getDebugLoc() && "Missing location");
        if (MMI.hasDebugInfo()) {
          // Don't handle byval struct arguments or VLAs, for example.
          // Non-byval arguments are handled here (they refer to the stack
          // temporary alloca at this point).
          const Value *Address = DI->getAddress();
          if (Address) {
            if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
              Address = BCI->getOperand(0);
            if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
              DenseMap<const AllocaInst *, int>::iterator SI =
                StaticAllocaMap.find(AI);
              if (SI != StaticAllocaMap.end()) { // Check for VLAs.
                int FI = SI->second;
                MMI.setVariableDbgInfo(DI->getVariable(), DI->getExpression(),
                                       FI, DI->getDebugLoc());
              }
            }
          }
        }
      }

      // Decide the preferred extend type for a value.
      PreferredExtendType[&*I] = getPreferredExtendForValue(&*I);
    }

  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F.  This
  // also creates the initial PHI MachineInstrs, though none of the input
  // operands are populated.
  for (BB = Fn->begin(); BB != EB; ++BB) {
    // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
    // are really data, and no instructions can live here.
    if (BB->isEHPad()) {
      const Instruction *I = BB->getFirstNonPHI();
      // If this is a non-landingpad EH pad, mark this function as using
      // funclets.
      // FIXME: SEH catchpads do not create funclets, so we could avoid setting
      // this in such cases in order to improve frame layout.
      if (!isa<LandingPadInst>(I)) {
        MMI.setHasEHFunclets(true);
        MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
      }
      if (isa<CatchSwitchInst>(I)) {
        assert(&*BB->begin() == I &&
               "WinEHPrepare failed to remove PHIs from imaginary BBs");
        continue;
      }
      if (isa<FuncletPadInst>(I))
        assert(&*BB->begin() == I && "WinEHPrepare failed to demote PHIs");
    }

    MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&*BB);
    MBBMap[&*BB] = MBB;
    MF->push_back(MBB);

    // Transfer the address-taken flag. This is necessary because there could
    // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
    // the first one should be marked.
    if (BB->hasAddressTaken())
      MBB->setHasAddressTaken();

    // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
    // appropriate.
    for (BasicBlock::const_iterator I = BB->begin();
         const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
      if (PN->use_empty()) continue;

      // Skip empty types
      if (PN->getType()->isEmptyTy())
        continue;

      DebugLoc DL = PN->getDebugLoc();
      unsigned PHIReg = ValueMap[PN];
      assert(PHIReg && "PHI node does not have an assigned virtual register!");

      SmallVector<EVT, 4> ValueVTs;
      ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
      for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
        EVT VT = ValueVTs[vti];
        unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
        const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
        for (unsigned i = 0; i != NumRegisters; ++i)
          BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
        PHIReg += NumRegisters;
      }
    }
  }

  // Mark landing pad blocks.
  SmallVector<const LandingPadInst *, 4> LPads;
  for (BB = Fn->begin(); BB != EB; ++BB) {
    const Instruction *FNP = BB->getFirstNonPHI();
    if (BB->isEHPad() && MBBMap.count(&*BB))
      MBBMap[&*BB]->setIsEHPad();
    if (const auto *LPI = dyn_cast<LandingPadInst>(FNP))
      LPads.push_back(LPI);
  }

  if (!isFuncletEHPersonality(Personality))
    return;

  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();

  // Map all BB references in the WinEH data to MBBs.
  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
    for (WinEHHandlerType &H : TBME.HandlerArray) {
      if (H.Handler)
        H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
    }
  }
  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
    if (UME.Cleanup)
      UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
    const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
    UME.Handler = MBBMap[BB];
  }
  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
    const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
    CME.Handler = MBBMap[BB];
  }
}
예제 #2
0
void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
                               SelectionDAG *DAG) {
    Fn = &fn;
    MF = &mf;
    TLI = MF->getSubtarget().getTargetLowering();
    RegInfo = &MF->getRegInfo();
    MachineModuleInfo &MMI = MF->getMMI();

    // Check whether the function can return without sret-demotion.
    SmallVector<ISD::OutputArg, 4> Outs;
    GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
                  mf.getDataLayout());
    CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
                                         Fn->isVarArg(), Outs, Fn->getContext());

    // Initialize the mapping of values to registers.  This is only set up for
    // instruction values that are used outside of the block that defines
    // them.
    Function::const_iterator BB = Fn->begin(), EB = Fn->end();
    for (; BB != EB; ++BB)
        for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
                I != E; ++I) {
            if (const AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
                // Static allocas can be folded into the initial stack frame adjustment.
                if (AI->isStaticAlloca()) {
                    const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
                    Type *Ty = AI->getAllocatedType();
                    uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
                    unsigned Align =
                        std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
                                 AI->getAlignment());

                    TySize *= CUI->getZExtValue();   // Get total allocated size.
                    if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.

                    StaticAllocaMap[AI] =
                        MF->getFrameInfo()->CreateStackObject(TySize, Align, false, AI);

                } else {
                    unsigned Align =
                        std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(
                                     AI->getAllocatedType()),
                                 AI->getAlignment());
                    unsigned StackAlign =
                        MF->getSubtarget().getFrameLowering()->getStackAlignment();
                    if (Align <= StackAlign)
                        Align = 0;
                    // Inform the Frame Information that we have variable-sized objects.
                    MF->getFrameInfo()->CreateVariableSizedObject(Align ? Align : 1, AI);
                }
            }

            // Look for inline asm that clobbers the SP register.
            if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
                ImmutableCallSite CS(I);
                if (isa<InlineAsm>(CS.getCalledValue())) {
                    unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
                    const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
                    std::vector<TargetLowering::AsmOperandInfo> Ops =
                        TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
                    for (size_t I = 0, E = Ops.size(); I != E; ++I) {
                        TargetLowering::AsmOperandInfo &Op = Ops[I];
                        if (Op.Type == InlineAsm::isClobber) {
                            // Clobbers don't have SDValue operands, hence SDValue().
                            TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
                            std::pair<unsigned, const TargetRegisterClass *> PhysReg =
                                TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
                                                                  Op.ConstraintVT);
                            if (PhysReg.first == SP)
                                MF->getFrameInfo()->setHasOpaqueSPAdjustment(true);
                        }
                    }
                }
            }

            // Look for calls to the @llvm.va_start intrinsic. We can omit some
            // prologue boilerplate for variadic functions that don't examine their
            // arguments.
            if (const auto *II = dyn_cast<IntrinsicInst>(I)) {
                if (II->getIntrinsicID() == Intrinsic::vastart)
                    MF->getFrameInfo()->setHasVAStart(true);
            }

            // If we have a musttail call in a variadic funciton, we need to ensure we
            // forward implicit register parameters.
            if (const auto *CI = dyn_cast<CallInst>(I)) {
                if (CI->isMustTailCall() && Fn->isVarArg())
                    MF->getFrameInfo()->setHasMustTailInVarArgFunc(true);
            }

            // Mark values used outside their block as exported, by allocating
            // a virtual register for them.
            if (isUsedOutsideOfDefiningBlock(I))
                if (!isa<AllocaInst>(I) ||
                        !StaticAllocaMap.count(cast<AllocaInst>(I)))
                    InitializeRegForValue(I);

            // Collect llvm.dbg.declare information. This is done now instead of
            // during the initial isel pass through the IR so that it is done
            // in a predictable order.
            if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
                assert(DI->getVariable() && "Missing variable");
                assert(DI->getDebugLoc() && "Missing location");
                if (MMI.hasDebugInfo()) {
                    // Don't handle byval struct arguments or VLAs, for example.
                    // Non-byval arguments are handled here (they refer to the stack
                    // temporary alloca at this point).
                    const Value *Address = DI->getAddress();
                    if (Address) {
                        if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
                            Address = BCI->getOperand(0);
                        if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
                            DenseMap<const AllocaInst *, int>::iterator SI =
                                StaticAllocaMap.find(AI);
                            if (SI != StaticAllocaMap.end()) { // Check for VLAs.
                                int FI = SI->second;
                                MMI.setVariableDbgInfo(DI->getVariable(), DI->getExpression(),
                                                       FI, DI->getDebugLoc());
                            }
                        }
                    }
                }
            }

            // Decide the preferred extend type for a value.
            PreferredExtendType[I] = getPreferredExtendForValue(I);
        }

    // Create an initial MachineBasicBlock for each LLVM BasicBlock in F.  This
    // also creates the initial PHI MachineInstrs, though none of the input
    // operands are populated.
    for (BB = Fn->begin(); BB != EB; ++BB) {
        MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
        MBBMap[BB] = MBB;
        MF->push_back(MBB);

        // Transfer the address-taken flag. This is necessary because there could
        // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
        // the first one should be marked.
        if (BB->hasAddressTaken())
            MBB->setHasAddressTaken();

        // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
        // appropriate.
        for (BasicBlock::const_iterator I = BB->begin();
                const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
            if (PN->use_empty()) continue;

            // Skip empty types
            if (PN->getType()->isEmptyTy())
                continue;

            DebugLoc DL = PN->getDebugLoc();
            unsigned PHIReg = ValueMap[PN];
            assert(PHIReg && "PHI node does not have an assigned virtual register!");

            SmallVector<EVT, 4> ValueVTs;
            ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
            for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
                EVT VT = ValueVTs[vti];
                unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
                const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
                for (unsigned i = 0; i != NumRegisters; ++i)
                    BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
                PHIReg += NumRegisters;
            }
        }
    }

    // Mark landing pad blocks.
    SmallVector<const LandingPadInst *, 4> LPads;
    for (BB = Fn->begin(); BB != EB; ++BB) {
        if (BB->isEHPad())
            MBBMap[BB]->setIsEHPad();
        const Instruction *FNP = BB->getFirstNonPHI();
        if (const auto *LPI = dyn_cast<LandingPadInst>(FNP))
            LPads.push_back(LPI);
    }

    // If this is an MSVC EH personality, we need to do a bit more work.
    if (!Fn->hasPersonalityFn())
        return;
    EHPersonality Personality = classifyEHPersonality(Fn->getPersonalityFn());
    if (!isMSVCEHPersonality(Personality))
        return;

    if (Personality == EHPersonality::MSVC_Win64SEH ||
            Personality == EHPersonality::MSVC_X86SEH) {
        addSEHHandlersForLPads(LPads);
    }

    WinEHFuncInfo &EHInfo = MMI.getWinEHFuncInfo(&fn);
    if (Personality == EHPersonality::MSVC_CXX) {
        // Calculate state numbers and then map from funclet BBs to MBBs.
        const Function *WinEHParentFn = MMI.getWinEHParent(&fn);
        calculateWinCXXEHStateNumbers(WinEHParentFn, EHInfo);
        for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap)
            for (WinEHHandlerType &H : TBME.HandlerArray)
                if (const auto *BB = dyn_cast<BasicBlock>(H.Handler))
                    H.HandlerMBB = MBBMap[BB];
    }

    // Copy the state numbers to LandingPadInfo for the current function, which
    // could be a handler or the parent. This should happen for 32-bit SEH and
    // C++ EH.
    if (Personality == EHPersonality::MSVC_CXX ||
            Personality == EHPersonality::MSVC_X86SEH) {
        for (const LandingPadInst *LP : LPads) {
            MachineBasicBlock *LPadMBB = MBBMap[LP->getParent()];
            MMI.addWinEHState(LPadMBB, EHInfo.EHPadStateMap[LP]);
        }
    }
}