void GCMachineCodeAnalysis::FindRegisterRoots(MachineFunction &MF) {
const TargetFrameLowering *TFI = TM->getFrameLowering();
assert(TFI && "TargetRegisterInfo not available!");
unsigned PointIndex = 0;
for (MachineFunction::iterator BBI = MF.begin(),
BBE = MF.end(); BBI != BBE; ++BBI) {
for (MachineBasicBlock::iterator MI = BBI->begin(),
ME = BBI->end(); MI != ME; ++MI) {
if (MI->isGCLabel())
PointIndex = FI->getPointIndex(MI->getOperand(0).getMCSymbol());
if (!MI->isGCRegRoot())
continue;
unsigned RootIndex = MI->getOperand(MI->getNumOperands() - 1).getImm();
if (FI->isRootGlobal(RootIndex))
continue;
FI->setLive(PointIndex, RootIndex, true);
if (!FI->getRoot(RootIndex).isReg())
continue;
GCRootLoc Loc;
Loc.PhysReg = MI->getOperand(0).getReg();
FI->setRootLoc(RootIndex, Loc);
}
}
}
bool GCMachineCodeFixup::runOnMachineFunction(MachineFunction &MF) {
// Quick exit for functions that do not use GC.
if (!MF.getFunction()->hasGC())
return false;
const TargetMachine &TM = MF.getTarget();
const TargetInstrInfo *TII = TM.getInstrInfo();
GCModuleInfo &GMI = getAnalysis<GCModuleInfo>();
GCFunctionInfo &GCFI = GMI.getFunctionInfo(*MF.getFunction());
for (MachineFunction::iterator MBBI = MF.begin(),
MBBE = MF.end(); MBBI != MBBE; ++MBBI) {
for (MachineBasicBlock::iterator MII = MBBI->begin(),
MIE = MBBI->end(); MII != MIE;) {
if (!MII->isGCRegRoot() || !MII->getOperand(0).isReg()) {
++MII;
continue;
}
// Trace the register back to its location at the site of the call (either
// a physical reg or a frame index).
bool TracingReg = true;
unsigned TracedReg = MII->getOperand(0).getReg();
int FrameIndex;
MachineBasicBlock::iterator PrevII = MII;
for (--PrevII;; --PrevII) {
if (PrevII->isGCRegRoot() && PrevII->getOperand(0).isReg())
break;
if (PrevII->isCall())
break;
int FI;
// Trace back through register reloads.
unsigned Reg =
TM.getInstrInfo()->isLoadFromStackSlotPostFE(&*PrevII, FI);
if (Reg) {
// This is a reload. If we're tracing this register, start tracing the
// frame index instead.
if (TracingReg && TracedReg == Reg) {
TracingReg = false;
FrameIndex = FI;
}
continue;
}
// Trace back through spills.
if (TM.getInstrInfo()->isStoreToStackSlotPostFE(&*PrevII, FI))
continue;
// Trace back through register-to-register copies.
if (PrevII->isCopy()) {
if (TracingReg && TracedReg == PrevII->getOperand(0).getReg())
TracedReg = PrevII->getOperand(1).getReg();
continue;
}
// Trace back through non-register GC_REG_ROOT instructions.
if (PrevII->isGCRegRoot() && !PrevII->getOperand(0).isReg())
continue;
DEBUG(dbgs() << "Bad instruction: " << *PrevII);
llvm_unreachable("GC_REG_ROOT found in an unexpected location!");
}
// Now we've reached either a call or another GC_REG_ROOT instruction.
// Move the GC_REG_ROOT instruction we're considering to the right place,
// and rewrite it if necessary.
//
// Also, tell the GCFunctionInfo about the frame index, since this is
// our only chance -- the frame indices will be deleted by the time
// GCMachineCodeAnalysis runs.
++PrevII;
unsigned RootIndex = MII->getOperand(1).getImm();
MachineInstr *NewMI;
if (TracingReg) {
MachineInstrBuilder MIB = BuildMI(MF, MII->getDebugLoc(),
TII->get(TargetOpcode::GC_REG_ROOT));
MIB.addReg(TracedReg).addImm(RootIndex);
NewMI = MIB;
} else {
NewMI = TII->emitFrameIndexGCRegRoot(MF, FrameIndex, RootIndex,
MII->getDebugLoc());
GCFI.spillRegRoot(RootIndex, FrameIndex);
}
MBBI->insert(PrevII, NewMI);
MachineBasicBlock::iterator NextII = MII;
++NextII;
MII->eraseFromParent();
MII = NextII;
}
}
return true;
}