int runOnCPU(void *cpu, void *memory, ulong byteSize, ulong minAddr, ulong minWriteMaxExecAddr, ARMword (*run)(ARMul_State*)) { ARMul_State* state = (ARMul_State*) cpu; lastCPU = state; // test whether the supplied instance is an ARMul type? state->MemDataPtr = (unsigned char*) memory; state->MemSize = byteSize; minReadAddress = minAddr; minWriteAddress = minWriteMaxExecAddr; gdblog_index = 0; state->EndCondition = NoError; state->NextInstr = RESUME; state->Reg[15] = run(state); // collect the PSR from their dedicated flags to have easy access from the image. ARMul_SetCPSR(state, ARMul_GetCPSR(state)); if(state->EndCondition != NoError){ return state->EndCondition; } return gdblog_index == 0 ? 0 : SomethingLoggedError; }
ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode) { ARMword bank = ModeToBank (mode & MODEBITS); if (!BANK_CAN_ACCESS_SPSR (bank)) return ARMul_GetCPSR (state); return state->Spsr[bank]; }
void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); //chy 2006-02-16 , should not consider system mode, don't conside 26bit mode if (state->Mode != USER26MODE && state->Mode != USER32MODE ) { /* In user mode, only write flags. */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); if (BIT (17)) SETPSR_X (state->Cpsr, rhs); if (BIT (18)) SETPSR_S (state->Cpsr, rhs); } if (BIT (19)) SETPSR_F (state->Cpsr, rhs); ARMul_CPSRAltered (state); }
void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); if (state->Mode != USER26MODE && state->Mode != USER32MODE) { /* In user mode, only write flags. */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); if (BIT (17)) SETPSR_X (state->Cpsr, rhs); if (BIT (18)) SETPSR_S (state->Cpsr, rhs); } if (BIT (19)) SETPSR_F (state->Cpsr, rhs); ARMul_CPSRAltered (state); }