void
ar5416AdcDcCalCollect(struct ath_hal *ah)
{
struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
int i;
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
cal->totalAdcDcOffsetIOddPhase(i) += (int32_t)
OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
cal->totalAdcDcOffsetIEvenPhase(i) += (int32_t)
OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
cal->totalAdcDcOffsetQOddPhase(i) += (int32_t)
OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
cal->totalAdcDcOffsetQEvenPhase(i) += (int32_t)
OS_REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n",
cal->calSamples, i,
cal->totalAdcDcOffsetIOddPhase(i),
cal->totalAdcDcOffsetIEvenPhase(i),
cal->totalAdcDcOffsetQOddPhase(i),
cal->totalAdcDcOffsetQEvenPhase(i));
}
}
/*
* Collect data from HW to later perform ADC Gain Calibration
*/
void
ar5416AdcGainCalCollect(struct ath_hal *ah)
{
struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
int i;
/*
* Accumulate ADC Gain cal measures for active chains
*/
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
cal->totalAdcIOddPhase(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
cal->totalAdcIEvenPhase(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
cal->totalAdcQOddPhase(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
cal->totalAdcQEvenPhase(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n",
cal->calSamples, i, cal->totalAdcIOddPhase(i),
cal->totalAdcIEvenPhase(i), cal->totalAdcQOddPhase(i),
cal->totalAdcQEvenPhase(i));
}
}
static void ath9k_hw_adc_dccal_collect(struct ath_hal *ah)
{
struct ath_hal_5416 *ahp = AH5416(ah);
int i;
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
ahp->ah_totalAdcDcOffsetIOddPhase[i] +=
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
ahp->ah_totalAdcDcOffsetIEvenPhase[i] +=
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
ahp->ah_totalAdcDcOffsetQOddPhase[i] +=
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
ahp->ah_totalAdcDcOffsetQEvenPhase[i] +=
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
"oddq=0x%08x; evenq=0x%08x;\n",
ahp->ah_CalSamples, i,
ahp->ah_totalAdcDcOffsetIOddPhase[i],
ahp->ah_totalAdcDcOffsetIEvenPhase[i],
ahp->ah_totalAdcDcOffsetQOddPhase[i],
ahp->ah_totalAdcDcOffsetQEvenPhase[i]);
}
}
static void ath9k_hw_iqcal_collect(struct ath_hw *ah)
{
int i;
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
ah->totalPowerMeasI[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
ah->totalPowerMeasQ[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
ah->totalIqCorrMeas[i] +=
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
ah->cal_samples, i, ah->totalPowerMeasI[i],
ah->totalPowerMeasQ[i],
ah->totalIqCorrMeas[i]);
}
}
/*
* Collect data from HW to later perform IQ Mismatch Calibration
*/
void
ar5416IQCalCollect(struct ath_hal *ah)
{
struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
int i;
/*
* Accumulate IQ cal measures for active chains
*/
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
cal->totalPowerMeasI(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
cal->totalPowerMeasQ(i) +=
OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
cal->totalIqCorrMeas(i) += (int32_t)
OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
cal->calSamples, i, cal->totalPowerMeasI(i),
cal->totalPowerMeasQ(i), cal->totalIqCorrMeas(i));
}
}
static void ath9k_hw_adc_gaincal_collect(struct ath_hw *ah)
{
int i;
for (i = 0; i < AR5416_MAX_CHAINS; i++) {
ah->totalAdcIOddPhase[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
ah->totalAdcIEvenPhase[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
ah->totalAdcQOddPhase[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
ah->totalAdcQEvenPhase[i] +=
REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
"oddq=0x%08x; evenq=0x%08x;\n",
ah->cal_samples, i,
ah->totalAdcIOddPhase[i],
ah->totalAdcIEvenPhase[i],
ah->totalAdcQOddPhase[i],
ah->totalAdcQEvenPhase[i]);
}
}
