RTDECL(bool) RTSystemIsInsideVM(void)
{
if (ASMHasCpuId())
{
if (ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_HVP)
return true;
}
return false;
}
RTDECL(int) RTMpGetDescription(RTCPUID idCpu, char *pszBuf, size_t cbBuf)
{
/*
* Check that the specified cpu is valid & online.
*/
if (idCpu != NIL_RTCPUID && !RTMpIsCpuOnline(idCpu))
return RTMpIsCpuPossible(idCpu)
? VERR_CPU_OFFLINE
: VERR_CPU_NOT_FOUND;
/*
* Construct the description string in a temporary buffer.
*/
char szString[4*4*3+1];
RT_ZERO(szString);
#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
if (!ASMHasCpuId())
return rtMpGetDescriptionUnknown(pszBuf, cbBuf);
uint32_t uMax;
uint32_t uEBX, uECX, uEDX;
ASMCpuId(0x80000000, &uMax, &uEBX, &uECX, &uEDX);
if (uMax >= 0x80000002)
{
ASMCpuId(0x80000002, &szString[0 + 0], &szString[0 + 4], &szString[0 + 8], &szString[0 + 12]);
if (uMax >= 0x80000003)
ASMCpuId(0x80000003, &szString[16 + 0], &szString[16 + 4], &szString[16 + 8], &szString[16 + 12]);
if (uMax >= 0x80000004)
ASMCpuId(0x80000004, &szString[32 + 0], &szString[32 + 4], &szString[32 + 8], &szString[32 + 12]);
}
else
{
ASMCpuId(0x00000000, &uMax, &uEBX, &uECX, &uEDX);
((uint32_t *)&szString[0])[0] = uEBX;
((uint32_t *)&szString[0])[1] = uEDX;
((uint32_t *)&szString[0])[2] = uECX;
}
#else
# error "PORTME or use RTMpGetDescription-generic-stub.cpp."
#endif
/*
* Copy it out into the buffer supplied by the caller.
*/
char *pszSrc = RTStrStrip(szString);
size_t cchSrc = strlen(pszSrc);
if (cchSrc >= cbBuf)
return VERR_BUFFER_OVERFLOW;
memcpy(pszBuf, pszSrc, cchSrc + 1);
return VINF_SUCCESS;
}
/**
* Checks whether the CPU advertises an invariant TSC or not.
*
* @returns true if invariant, false otherwise.
*/
bool tstIsInvariantTsc(void)
{
if (ASMHasCpuId())
{
uint32_t uEax, uEbx, uEcx, uEdx;
ASMCpuId(0x80000000, &uEax, &uEbx, &uEcx, &uEdx);
if (uEax >= 0x80000007)
{
ASMCpuId(0x80000007, &uEax, &uEbx, &uEcx, &uEdx);
if (uEdx & X86_CPUID_AMD_ADVPOWER_EDX_TSCINVAR)
return true;
}
}
return false;
}
