void _fw_usb_suspend_reboot()
{
/* reset usb/wlan dma */
_fw_reset_dma_fifo();
/* restore gpio setting and usb/wlan dma state */
_fw_restore_dma_fifo();
/* set clock to bypass mode - 40Mhz from XTAL */
iowrite32(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, BIT0 | BIT4);
A_DELAY_USECS(100); /* wait for stable */
iowrite32(MAGPIE_REG_CPU_PLL_ADDR, BIT16);
A_DELAY_USECS(100); /* wait for stable */
A_UART_HWINIT((40*1000*1000), 19200);
A_CLOCK_INIT(40);
if (!bEepromExist) { /* jump to flash boot (eeprom data in flash) */
bJumptoFlash = TRUE;
A_PRINTF("Jump to Flash BOOT\n");
app_start();
} else {
A_PRINTF("receive the suspend command...\n");
/* reboot..... */
A_USB_JUMP_BOOT();
}
}
extern "C" void
ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID, WMI_PMKID *pmkidList,
A_UINT8 *bssidList)
{
#if 0 //bluebird
A_UINT8 i, j;
A_PRINTF("Number of Cached PMKIDs is %d\n", numPMKID);
for (i = 0; i < numPMKID; i++) {
A_PRINTF("\nBSSID %d ", i);
for (j = 0; j < ATH_MAC_LEN; j++) {
A_PRINTF("%2.2x", bssidList[j]);
}
bssidList += (ATH_MAC_LEN + WMI_PMKID_LEN);
A_PRINTF("\nPMKID %d ", i);
for (j = 0; j < WMI_PMKID_LEN; j++) {
A_PRINTF("%2.2x", pmkidList->pmkid[j]);
}
pmkidList = (WMI_PMKID *)((A_UINT8 *)pmkidList + ATH_MAC_LEN +
WMI_PMKID_LEN);
}
#else
NDIS_DEBUG_PRINTF(DBG_TRACE, " %s() is not ready yet~ \r\n", __FUNCTION__);
#endif //bluebird
}
/*
* -- urn_off_merlin --
* . values suggested from Lalit
*
*/
static void turn_off_merlin()
{
volatile uint32_t default_data[9];
uint32_t i=0;
if(1)
{
A_PRINTF("turn_off_merlin_ep_start ......\n");
A_DELAY_USECS(measure_time);
default_data[0] = 0x9248fd00;
default_data[1] = 0x24924924;
default_data[2] = 0xa8000019;
default_data[3] = 0x17160820;
default_data[4] = 0x25980560;
default_data[5] = 0xc1c00000;
default_data[6] = 0x1aaabe40;
default_data[7] = 0xbe105554;
default_data[8] = 0x00043007;
for(i=0; i<9; i++)
{
A_DELAY_USECS(10);
iowrite32(0x10ff4040, default_data[i]);
}
A_DELAY_USECS(10);
iowrite32(0x10ff4044, BIT0);
A_PRINTF("turn_off_merlin_ep_end ......\n");
}
}
void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription)
{
A_CHAR stream[60];
A_CHAR byteOffsetStr[10];
A_UINT32 i;
A_UINT16 offset, count, byteOffset;
A_PRINTF("<---------Dumping %d Bytes : %s ------>\n", length, pDescription);
count = 0;
offset = 0;
byteOffset = 0;
for(i = 0; i < length; i++) {
A_SNPRINTF(stream + offset, (sizeof(stream) - offset),
"%02X ", buffer[i]);
count ++;
offset += 3;
if(count == 16) {
count = 0;
offset = 0;
A_SNPRINTF(byteOffsetStr, sizeof(byteOffset), "%4.4X",byteOffset);
A_PRINTF("[%s]: %s\n", byteOffsetStr, stream);
A_MEMZERO(stream, 60);
byteOffset += 16;
}
}
if(offset != 0) {
A_SNPRINTF(byteOffsetStr, sizeof(byteOffset), "%4.4X",byteOffset);
A_PRINTF("[%s]: %s\n", byteOffsetStr, stream);
}
A_PRINTF("<------------------------------------------------->\n");
}
/*!
* otp_get_usb_info
*
*/
LOCAL u8 *otp_get_usb_info(void)
{
u8 *pData = NULL;
u8 off_tbl[4] = {0};
long i=0;
struct otp_usb_hdr img_hdr;
/* Assume the offset table is at the first data region */
DV_DBG_RECORD_LOCATION(OTP_C);
DV_DBG_RECORD_DATA(OTP_USB_TBL_OFFSET);
DV_DBG_RECORD_DATA(A_OTP_READ(OTP_USB_TBL_OFFSET));
if( 0xdeadbeef == A_OTP_COPY((u32 *)off_tbl, (u32*)OTP_USB_TBL_OFFSET, 4) )
goto ERR_DONE;
DV_DBG_RECORD_DATA(off_tbl[0]);
DV_DBG_RECORD_DATA(off_tbl[1]);
DV_DBG_RECORD_DATA(off_tbl[2]);
DV_DBG_RECORD_DATA(off_tbl[3]);
/* Check if the offset table exist */
for(i=1; i>-1; i--) {
if(off_tbl[i]!=0xff && off_tbl[i]!=0x0) {
/* Inspect the information header */
A_PRINTF("offset[%d]: %d\n\r", i, off_tbl[i]*2);
if( 0xdeadbeef == A_OTP_COPY((u32 *)&img_hdr, (u32 *)(OTP_BASE+(off_tbl[i]*2)), sizeof(struct otp_usb_hdr)) )
goto ERR_DONE;
if( img_hdr.len!=0 && img_hdr.len!=0xff ) {
unsigned long sum = 0;
pData = (u8 *)OTP_SRAM_BASE;
//Copy Data include header
if( 0xdeadbeef == A_OTP_COPY((u32 *)pData, (u32 *)(OTP_BASE+(off_tbl[i]*2)), img_hdr.len) ){
pData = NULL;
goto ERR_DONE;
}
//Calculate Checksum including header
sum = A_CHKSUM((u32 *)pData, img_hdr.len);
if(sum) {
pData = NULL;
A_PRINTF("checksum fail: %08x\n\r", sum);
DV_DBG_RECORD_LOCATION(OTP_C);
DV_DBG_RECORD_DATA(sum);
}
else
{
//Return pointer to USB info starting address (not include header)
pData+=4;
break;
}
}
}
}
ERR_DONE:
return pData;
}
/*
* support more than 64 bytes command on ep4
*/
void usb_reg_out_patch(void)
{
uint16_t usbfifolen;
uint16_t ii;
uint32_t ep4_data;
static volatile uint32_t *regaddr;
static uint16_t cmd_len;
static VBUF *buf;
BOOLEAN cmd_is_last = FALSE;
static BOOLEAN cmd_is_new = TRUE;
/* get the size of this transcation */
usbfifolen = USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_LOW_OFFSET);
if (usbfifolen > USB_EP4_MAX_PKT_SIZE) {
A_PRINTF("EP4 FIFO Bug? Buffer is too big: %x\n", usbfifolen);
cold_reboot();
}
/* check is command is new */
if(cmd_is_new) {
buf = usbFifoConf.get_command_buf();
cmd_len = 0;
if(!buf) {
A_PRINTF("%s: Filed to get new buffer.\n", __func__);
goto err;
}
/* copy free, assignment buffer of the address */
regaddr = (uint32_t *)buf->desc_list->buf_addr;
cmd_is_new = FALSE;
}
/* just in case, suppose should not happen */
if(!buf)
goto err;
/* if size is smaller, this is the last command!
* zero-length supposed should be set through 0x27/bit7->0x19/bit4, not here
*/
if(usbfifolen < USB_EP4_MAX_PKT_SIZE)
cmd_is_last = TRUE;
/* accumulate the size */
cmd_len += usbfifolen;
if (cmd_len > buf->desc_list->buf_size) {
A_PRINTF("%s: Data length on EP4 FIFO is bigger as "
"allocated buffer data! Drop it!\n", __func__);
goto err;
}
/* round it to alignment */
if(usbfifolen % 4)
usbfifolen = (usbfifolen >> 2) + 1;
else
/*
* -- patch zfResetUSBFIFO_patch --
*
* . clear ep3/ep4 fifo
* . set suspend magic pattern
* . reset pcie ep phy
* . reset pcie rc phy
* . turn off pcie pll
* . reset all pcie/gmac related registers
* . reset usb dma
*/
void zfResetUSBFIFO_patch(void)
{
A_PRINTF("0x9808 0x%x ......\n", ioread32(0x10ff9808));
A_PRINTF("0x7890 0x%x ......\n", ioread32(0x10ff7890));
A_PRINTF("0x7890 0x%x ......\n", ioread32(0x10ff7890));
A_PRINTF("0x4088 0x%x ......\n", ioread32(0x10ff4088));
_fw_reset_dma_fifo();
}
/****************************************************************************
*
* NAME: cbToCoNet_vNwkEvent
*
* DESCRIPTION:
*
* PARAMETERS: Name RW Usage
*
* RETURNS:
*
* NOTES:
****************************************************************************/
void cbToCoNet_vNwkEvent(teEvent eEvent, uint32 u32arg) {
switch(eEvent) {
case E_EVENT_TOCONET_NWK_START:
A_PRINTF( LB"[E_EVENT_TOCONET_NWK_START]");
break;
case E_EVENT_TOCONET_NWK_DISCONNECT:
A_PRINTF( LB"[E_EVENT_TOCONET_NWK_DISCONNECT]");
break;
case E_EVENT_TOCONET_NWK_ROUTE_PKT:
if (u32arg) {
tsRoutePktInfo *pInfo = (void*)u32arg;
if (pInfo->bUpstream) {
sAppData.u32LedCt = u32TickCount_ms;
}
}
break;
case E_EVENT_TOCONET_NWK_MESSAGE_POOL_REQUEST:
sAppData.u32LedCt = u32TickCount_ms;
break;
case E_EVENT_TOCONET_NWK_MESSAGE_POOL:
if (u32arg) {
tsToCoNet_MsgPl_Entity *pInfo = (void*)u32arg;
int i;
uint8 u8buff[TOCONET_MOD_MESSAGE_POOL_MAX_MESSAGE+1];
memcpy(u8buff, pInfo->au8Message, pInfo->u8MessageLen);
u8buff[pInfo->u8MessageLen] = 0;
A_PRINTF( "[MSGPOOL sl=%d ln=%d msg=",
pInfo->u8Slot,
pInfo->u8MessageLen
);
for (i = 0; i < pInfo->u8MessageLen; i++) {
A_PRINTF("%02X", u8buff[i]);
}
A_PRINTF("]"LB);
}
break;
case E_EVENT_TOCONET_PANIC:
if (u32arg) {
tsPanicEventInfo *pInfo = (void*)u32arg;
V_PRINTF( "PANIC DETECTED!");
pInfo->bCancelReset = TRUE;
}
break;
default:
break;
}
}
void
dfs_print_filters(struct ath_dfs_host *dfs)
{
struct dfs_filtertype *ft = NULL;
struct dfs_filter *rf;
int i,j;
if (dfs == NULL) {
A_PRINTF("%s: sc_dfs is NULL\n", __func__);
return;
}
for (i=0; i<DFS_MAX_RADAR_TYPES; i++) {
if (dfs->dfs_radarf[i] != NULL) {
ft = dfs->dfs_radarf[i];
if((ft->ft_numfilters > DFS_MAX_NUM_RADAR_FILTERS) || (!ft->ft_numfilters))
continue;
printk("===========ft->ft_numfilters=%u===========\n", ft->ft_numfilters);
for (j=0; j<ft->ft_numfilters; j++) {
rf = &(ft->ft_filters[j]);
printk("filter[%d] filterID = %d rf_numpulses=%u; rf->rf_minpri=%u; rf->rf_maxpri=%u; rf->rf_threshold=%u; rf->rf_filterlen=%u; rf->rf_mindur=%u; rf->rf_maxdur=%u\n",j, rf->rf_pulseid,
rf->rf_numpulses, rf->rf_minpri, rf->rf_maxpri, rf->rf_threshold, rf->rf_filterlen, rf->rf_mindur, rf->rf_maxdur);
}
}
}
}
static void turn_off_phy_rc()
{
volatile uint32_t default_data[9];
uint32_t i=0;
A_PRINTF("turn_off_phy_rc\n");
default_data[0] = 0x9248fd00;
default_data[1] = 0x24924924;
default_data[2] = 0xa8000019;
default_data[3] = 0x13160820;//PwdClk1MHz=0
default_data[4] = 0x25980560;
default_data[5] = 0xc1c00000;
default_data[6] = 0x1aaabe40;
default_data[7] = 0xbe105554;
default_data[8] = 0x00043007;
for(i=0; i<9; i++)
{
// check for the done bit to be set
while (1)
{
if (ioread32(0x40028) & BIT31)
break;
}
A_DELAY_USECS(1);
iowrite32(0x40024, default_data[i]);
}
iowrite32(0x40028, BIT0);
}
/*
* -- patch zfTurnOffPower --
*
* . set suspend counter to non-zero value
* .
*/
void zfTurnOffPower_patch(void)
{
A_PRINTF("+++ goto suspend ......\n");
/* setting the go suspend here, power down right away */
io32_set(0x10000, BIT3);
A_DELAY_USECS(100);
// TURN OFF ETH PLL
_fw_power_off();
//32clk wait for External ETH PLL stable
A_DELAY_USECS(100);
iowrite32(0x52000, 0x70303); /* read back 0x703f7 */
iowrite32(0x52008, 0x0e91c); /* read back 0x1e948 */
io32_set(MAGPIE_REG_SUSPEND_ENABLE_ADDR, BIT0);
// wake up, and turn on cpu, eth, pcie and usb pll
_fw_power_on();
// restore gpio and other settings
_fw_restore_dma_fifo();
/* clear suspend */
io32_clr(MAGPIE_REG_SUSPEND_ENABLE_ADDR, BIT0);
io32_clr(0x52028, BIT8 | BIT12 | BIT16);
}
/**
* @brief PCI reset
* XXX: Move this to RAM
*/
void
__pci_reset(void)
{
volatile A_UINT32 r_data;
/**
* Poll until the Host has reset
*/
A_PRINTF("Waiting for host reset..");
for (;;) {
r_data = __pci_reg_read(MAG_REG_AHB_RESET);
if ( r_data & PCI_AHB_RESET_DMA_HST_RAW)
break;
}
A_PRINTF("received.\n");
/**
* Pull the AHB out of reset
*/
r_data = __pci_reg_read(MAG_REG_AHB_RESET);
r_data &= ~PCI_AHB_RESET_DMA;
__pci_reg_write(MAG_REG_AHB_RESET, r_data);
A_DELAY_USECS(10);
/**
* Put the AHB into reset
*/
r_data = __pci_reg_read(MAG_REG_AHB_RESET);
r_data |= PCI_AHB_RESET_DMA;
__pci_reg_write(MAG_REG_AHB_RESET, r_data);
A_DELAY_USECS(10);
/**
* Pull the AHB out of reset
*/
r_data = __pci_reg_read(MAG_REG_AHB_RESET);
r_data &= ~PCI_AHB_RESET_DMA;
__pci_reg_write(MAG_REG_AHB_RESET, r_data);
A_DELAY_USECS(10);
}
/****************************************************
* Invoked from bluetooth stack via hdev->send()
* to send the packet out via ar6k to PAL firmware.
*
* For HCI command packet wmi_send_hci_cmd() is invoked.
* wmi_send_hci_cmd adds WMI_CMD_HDR and sends the packet
* to PAL firmware.
*
* For HCI ACL data packet wmi_data_hdr_add is invoked
* to add WMI_DATA_HDR to the packet. ar6000_acl_data_tx
* is then invoked to send the packet to PAL firmware.
******************************************************/
static int btpal_send_frame(struct sk_buff *skb)
{
struct hci_dev *hdev = (struct hci_dev *)skb->dev;
HCI_TRANSPORT_PACKET_TYPE type;
ar6k_hci_pal_info_t *pHciPalInfo;
A_STATUS status = A_OK;
struct sk_buff *txSkb = NULL;
AR_SOFTC_DEV_T *ar;
if (!hdev) {
PRIN_LOG("HCI PAL: btpal_send_frame - no device\n");
return -ENODEV;
}
if (!test_bit(HCI_RUNNING, &hdev->flags)) {
PRIN_LOG("HCI PAL: btpal_send_frame - not open\n");
return -EBUSY;
}
pHciPalInfo = (ar6k_hci_pal_info_t *)hdev->driver_data;
A_ASSERT(pHciPalInfo != NULL);
ar = pHciPalInfo->ar;
PRIN_LOG("+btpal_send_frame type: %d \n",bt_cb(skb)->pkt_type);
type = HCI_COMMAND_TYPE;
switch (bt_cb(skb)->pkt_type) {
case HCI_COMMAND_PKT:
type = HCI_COMMAND_TYPE;
hdev->stat.cmd_tx++;
break;
case HCI_ACLDATA_PKT:
type = HCI_ACL_TYPE;
hdev->stat.acl_tx++;
break;
case HCI_SCODATA_PKT:
/* we don't support SCO over the pal */
kfree_skb(skb);
return 0;
default:
A_ASSERT(FALSE);
kfree_skb(skb);
return 0;
}
if(loghci) {
A_PRINTF(">>> Send HCI %s packet len: %d\n",
(type == HCI_COMMAND_TYPE) ? "COMMAND" : "ACL",
skb->len);
if (type == HCI_COMMAND_TYPE) {
A_PRINTF("HCI Command: OGF:0x%X OCF:0x%X \r\n",
(HCI_GET_OP_CODE(skb->data)) >> 10,
(HCI_GET_OP_CODE(skb->data)) & 0x3FF);
}
DebugDumpBytes(skb->data,skb->len,"BT HCI SEND Packet Dump");
}
void cold_reboot(void)
{
A_PRINTF("Cold reboot initiated.");
#if defined(PROJECT_MAGPIE)
HAL_WORD_REG_WRITE(WATCH_DOG_MAGIC_PATTERN_ADDR, 0);
#elif defined(PROJECT_K2)
HAL_WORD_REG_WRITE(MAGPIE_REG_RST_STATUS_ADDR, 0);
#endif /* #if defined(PROJECT_MAGPIE) */
A_USB_JUMP_BOOT();
}
StopCompilingDueBUG
#endif
int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size)
{
unsigned char prop0;
if (size < LZMA_PROPERTIES_SIZE)
{
A_PRINTF("ERROR: %s, %d\n", __FILE__, __LINE__);
return LZMA_RESULT_DATA_ERROR;
}
prop0 = propsData[0];
if (prop0 >= (9 * 5 * 5))
{
A_PRINTF("ERROR: %s, %d\n", __FILE__, __LINE__);
return LZMA_RESULT_DATA_ERROR;
}
{
for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5));
for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9);
propsRes->lc = prop0;
/*
unsigned char remainder = (unsigned char)(prop0 / 9);
propsRes->lc = prop0 % 9;
propsRes->pb = remainder / 5;
propsRes->lp = remainder % 5;
*/
}
#ifdef _LZMA_OUT_READ
{
int i;
propsRes->DictionarySize = 0;
for (i = 0; i < 4; i++)
propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8);
if (propsRes->DictionarySize == 0)
propsRes->DictionarySize = 1;
}
#endif
return LZMA_RESULT_OK;
}
/**
* @brief reap the receive queue for vbuf's on the specified
* engine number
*
* @param sc
* @param eng_no
*/
void
__pci_reap_recv(__pci_softc_t *sc, dma_engine_t eng_no)
{
VBUF *vbuf = NULL;
vbuf = dma_lib_reap_recv(eng_no);
if(vbuf)
sc->indicate_pkt(NULL, vbuf, sc->htc_ctx);
else
A_PRINTF("Empty TX Reap \n");
}
int ar6000_htc_raw_close(AR_SOFTC_T *ar)
{
A_PRINTF("ar6000_htc_raw_close called \n");
HTCStop(ar->arHtcTarget);
/* reset the device */
ar6000_reset_device(ar->arHifDevice, ar->arTargetType, TRUE, FALSE);
/* Initialize the BMI component */
BMIInit();
return 0;
}
A_STATUS a_set_module_mask(A_CHAR *module_name, A_UINT32 Mask)
{
ATH_DEBUG_MODULE_DBG_INFO *pInfo = FindModule(module_name);
if (NULL == pInfo) {
return A_ERROR;
}
pInfo->CurrentMask = Mask;
A_PRINTF("Module %s, new mask: 0x%8.8X \n",module_name,pInfo->CurrentMask);
return A_OK;
}
void _fw_usbfifo_recv_command(VBUF *buf)
{
A_UINT8 *cmd_data;
A_UINT32 tmp;
cmd_data = (A_UINT8 *)(buf->desc_list->buf_addr + buf->desc_list->data_offset);
tmp = *((A_UINT32 *)cmd_data);
if ( tmp == 0xFFFFFFFF ) {
// reset usb/wlan dma
_fw_reset_dma_fifo();
// restore gpio setting and usb/wlan dma state
_fw_restore_dma_fifo();
// set clock to bypass mode - 40Mhz from XTAL
HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, (BIT0|BIT4));
A_DELAY_USECS(100); // wait for stable
HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_ADDR, (BIT16));
A_DELAY_USECS(100); // wait for stable
A_UART_HWINIT((40*1000*1000), 19200);
A_CLOCK_INIT(40);
if (!bEepromExist) { //jump to flash boot (eeprom data in flash)
bJumptoFlash = TRUE;
A_PRINTF("Jump to Flash BOOT\n");
app_start();
}else{
A_PRINTF("receive the suspend command...\n");
// reboot.....
A_USB_JUMP_BOOT();
}
} else {
m_origUsbfifoRecvCmd(buf);
}
}
void _DMAengine_desc_dump(struct zsDmaQueue *q)
{
u32_t i=0;
struct zsDmaDesc* tmpDesc;
tmpDesc = q->head;
do {
if( tmpDesc == q->terminator )
{
#ifdef DESC_DUMP_BOTH_DESCnDATA
A_PRINTF("0x%08x(0x%08x,T)]", tmpDesc, tmpDesc->dataAddr);
#else
A_PRINTF("0x%08x(T)]", tmpDesc);
#endif
break;
}
else
#ifdef DESC_DUMP_BOTH_DESCnDATA
A_PRINTF("0x%08x(0x%08x,%c)->", tmpDesc, tmpDesc->dataAddr, (tmpDesc->status&ZM_OWN_BITS_HW)?'H':'S');
#else
A_PRINTF("0x%08x(%c)->", tmpDesc, (tmpDesc->status&ZM_OWN_BITS_HW)?'H':'S');
#endif
if( (++i%5)==0 )
{
A_PRINTF("\n\r ");
}
tmpDesc = tmpDesc->nextAddr;
}while(1);
A_PRINTF("\n\r");
}
void dfs_reset_ar(struct ath_dfs_host *dfs)
{
if (dfs == NULL) {
A_PRINTF("%s: sc_dfs is NULL\n", __func__);
return;
}
OS_MEMZERO(&dfs->dfs_ar_state, sizeof(dfs->dfs_ar_state));
dfs->dfs_ar_state.ar_packetthreshold = DFS_AR_PKT_COUNT_THRESH;
dfs->dfs_ar_state.ar_parthreshold = DFS_AR_ACK_DETECT_PAR_THRESH;
dfs->dfs_ar_state.ar_radarrssi = DFS_AR_RADAR_RSSI_THR;
}
/**
* @brief transmit the vbuf from the specified pipe
*
* @param hdl
* @param pipe
* @param buf
*
* @return int
*/
int
__pci_xmit_buf(hif_handle_t hdl, int pipe, VBUF *vbuf)
{
dma_engine_t eng;
eng = __pci_get_tx_eng(pipe);
if (eng == DMA_ENGINE_MAX) {
A_PRINTF("Invalid Pipe number\n");
return -1;
}
return dma_lib_hard_xmit(eng, vbuf);
}
/**
* @brief reap the transmit queue for trasnmitted packets
*
* @param sc
* @param eng_no
*/
void
__pci_reap_xmitted(__pci_softc_t *sc, dma_engine_t eng_no)
{
VBUF *vbuf = NULL;
A_UINT8 pipe;
pipe = __pci_get_pipe(eng_no);
vbuf = dma_lib_reap_xmitted(eng_no);
if ( vbuf )
sc->ret_pkt(vbuf, sc->htc_ctx);
else
A_PRINTF("Empty RX Reap\n");
}
/*
* Allocate nbytes from the arena. At this point, which_arena should
* be set to 0 for the default (and only) arena. A future allocation
* module may support multiple separate arenas.
*/
LOCAL void *
cmnos_allocram(void * which_arena, A_UINT32 nbytes)
{
void *ptr = (void *)allocram_current_addr;
//nbytes = A_ROUND_UP(nbytes, A_CACHE_LINE_SIZE);
nbytes = A_ROUND_UP(nbytes, 4);
if (nbytes <= allocram_remaining_bytes) {
allocram_remaining_bytes -= nbytes;
allocram_current_addr += nbytes;
} else {
A_PRINTF("RAM allocation (%d bytes) failed!\n", nbytes);
//A_ASSERT(0);
adf_os_assert(0);
}
return ptr;
}
/**
* @brief Configure the receive pipe
*
* @param hdl
* @param pipe
* @param num_desc
*/
void
__pci_cfg_pipe(hif_handle_t hdl, int pipe, int num_desc)
{
dma_engine_t eng;
A_UINT16 desc_len;
eng = __pci_get_rx_eng(pipe);
if (eng == DMA_ENGINE_MAX) {
A_PRINTF("Bad Engine number\n");
return;
}
desc_len = __pci_get_max_msg_len(hdl, pipe);
dma_lib_rx_config(eng, num_desc, desc_len);
}
void dfs_reset_arq(struct ath_dfs_host *dfs)
{
struct dfs_event *event;
if (dfs == NULL) {
A_PRINTF("%s: sc_dfs is NULL\n", __func__);
return;
}
ATH_ARQ_LOCK(dfs);
ATH_DFSEVENTQ_LOCK(dfs);
while (!STAILQ_EMPTY(&(dfs->dfs_arq))) {
event = STAILQ_FIRST(&(dfs->dfs_arq));
STAILQ_REMOVE_HEAD(&(dfs->dfs_arq), re_list);
OS_MEMZERO(event, sizeof(struct dfs_event));
STAILQ_INSERT_TAIL(&(dfs->dfs_eventq), event, re_list);
}
ATH_DFSEVENTQ_UNLOCK(dfs);
ATH_ARQ_UNLOCK(dfs);
}
extern "C" void
ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters, WMI_GET_WOW_LIST_REPLY *wow_reply)
{
#if 0 //bluebird
A_UINT8 i,j;
/*Each event now contains exactly one filter, see bug 26613*/
A_PRINTF("WOW pattern %d of %d patterns\n", wow_reply->this_filter_num, wow_reply->num_filters);
A_PRINTF("wow mode = %s host mode = %s\n",
(wow_reply->wow_mode == 0? "disabled":"enabled"),
(wow_reply->host_mode == 1 ? "awake":"asleep"));
/*If there are no patterns, the reply will only contain generic
WoW information. Pattern information will exist only if there are
patterns present. Bug 26716*/
/* If this event contains pattern information, display it*/
if (wow_reply->this_filter_num) {
i=0;
A_PRINTF("id=%d size=%d offset=%d\n",
wow_reply->wow_filters[i].wow_filter_id,
wow_reply->wow_filters[i].wow_filter_size,
wow_reply->wow_filters[i].wow_filter_offset);
A_PRINTF("wow pattern = ");
for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_pattern[j]);
}
A_PRINTF("\nwow mask = ");
for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_mask[j]);
}
A_PRINTF("\n");
}
#else
NDIS_DEBUG_PRINTF(DBG_TRACE, " %s() is not ready yet~ \r\n", __FUNCTION__);
#endif //bluebird
}
/*
* Clear all delay lines for all filter types
*/
void dfs_reset_alldelaylines(struct ath_dfs_host *dfs)
{
struct dfs_filtertype *ft = NULL;
struct dfs_filter *rf;
struct dfs_delayline *dl;
struct dfs_pulseline *pl;
int i,j;
if (dfs == NULL) {
A_PRINTF("%s: sc_dfs is NULL\n", __func__);
return;
}
pl = dfs->pulses;
/* reset the pulse log */
pl->pl_firstelem = pl->pl_numelems = 0;
pl->pl_lastelem = DFS_MAX_PULSE_BUFFER_MASK;
for (i=0; i<DFS_MAX_RADAR_TYPES; i++) {
if (dfs->dfs_radarf[i] != NULL) {
ft = dfs->dfs_radarf[i];
for (j=0; j<ft->ft_numfilters; j++) {
rf = &(ft->ft_filters[j]);
dl = &(rf->rf_dl);
if(dl != NULL) {
OS_MEMZERO(dl, sizeof(struct dfs_delayline));
dl->dl_lastelem = (0xFFFFFFFF) & DFS_MAX_DL_MASK;
}
}
}
}
for (i=0; i<dfs->dfs_rinfo.rn_numbin5radars; i++) {
OS_MEMZERO(&(dfs->dfs_b5radars[i].br_elems[0]), sizeof(struct dfs_bin5elem)*DFS_MAX_B5_SIZE);
dfs->dfs_b5radars[i].br_firstelem = 0;
dfs->dfs_b5radars[i].br_numelems = 0;
dfs->dfs_b5radars[i].br_lastelem = (0xFFFFFFFF)&DFS_MAX_B5_MASK;
}
}
static A_STATUS
__HIFReadWrite(HIF_DEVICE *device,
A_UINT32 address,
A_UCHAR *buffer,
A_UINT32 length,
A_UINT32 request,
void *context)
{
A_UINT8 opcode;
A_STATUS status = A_OK;
int ret;
A_UINT8 *tbuffer;
A_BOOL bounced = FALSE;
AR_DEBUG_ASSERT(device != NULL);
AR_DEBUG_ASSERT(device->func != NULL);
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Device: 0x%p, buffer:0x%p (addr:0x%X)\n",
device, buffer, address));
do {
if (request & HIF_EXTENDED_IO) {
//AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Command type: CMD53\n"));
} else {
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
("AR6000: Invalid command type: 0x%08x\n", request));
status = A_EINVAL;
break;
}
if (request & HIF_BLOCK_BASIS) {
/* round to whole block length size */
length = (length / HIF_MBOX_BLOCK_SIZE) * HIF_MBOX_BLOCK_SIZE;
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
("AR6000: Block mode (BlockLen: %d)\n",
length));
} else if (request & HIF_BYTE_BASIS) {
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
("AR6000: Byte mode (BlockLen: %d)\n",
length));
} else {
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
("AR6000: Invalid data mode: 0x%08x\n", request));
status = A_EINVAL;
break;
}
#if 0
/* useful for checking register accesses */
if (length & 0x3) {
A_PRINTF(KERN_ALERT"AR6000: HIF (%s) is not a multiple of 4 bytes, addr:0x%X, len:%d\n",
request & HIF_WRITE ? "write":"read", address, length);
}
#endif
if (request & HIF_WRITE) {
if ((address >= HIF_MBOX_START_ADDR(0)) &&
(address <= HIF_MBOX_END_ADDR(3)))
{
AR_DEBUG_ASSERT(length <= HIF_MBOX_WIDTH);
/*
* Mailbox write. Adjust the address so that the last byte
* falls on the EOM address.
*/
address += (HIF_MBOX_WIDTH - length);
}
}
if (request & HIF_FIXED_ADDRESS) {
opcode = CMD53_FIXED_ADDRESS;
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Address mode: Fixed 0x%X\n", address));
} else if (request & HIF_INCREMENTAL_ADDRESS) {
opcode = CMD53_INCR_ADDRESS;
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Address mode: Incremental 0x%X\n", address));
} else {
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
("AR6000: Invalid address mode: 0x%08x\n", request));
status = A_EINVAL;
break;
}
if (request & HIF_WRITE) {
#if HIF_USE_DMA_BOUNCE_BUFFER
if (BUFFER_NEEDS_BOUNCE(buffer)) {
AR_DEBUG_ASSERT(device->dma_buffer != NULL);
tbuffer = device->dma_buffer;
/* copy the write data to the dma buffer */
AR_DEBUG_ASSERT(length <= HIF_DMA_BUFFER_SIZE);
memcpy(tbuffer, buffer, length);
bounced = TRUE;
} else {
tbuffer = buffer;
}
#else
tbuffer = buffer;
#endif
if (opcode == CMD53_FIXED_ADDRESS) {
ret = sdio_writesb(device->func, address, tbuffer, length);
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: writesb ret=%d address: 0x%X, len: %d, 0x%X\n",
ret, address, length, *(int *)tbuffer));
} else {
ret = sdio_memcpy_toio(device->func, address, tbuffer, length);
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: writeio ret=%d address: 0x%X, len: %d, 0x%X\n",
ret, address, length, *(int *)tbuffer));
}
} else if (request & HIF_READ) {
#if HIF_USE_DMA_BOUNCE_BUFFER
if (BUFFER_NEEDS_BOUNCE(buffer)) {
AR_DEBUG_ASSERT(device->dma_buffer != NULL);
AR_DEBUG_ASSERT(length <= HIF_DMA_BUFFER_SIZE);
tbuffer = device->dma_buffer;
bounced = TRUE;
} else {
tbuffer = buffer;
}
#else
tbuffer = buffer;
#endif
if (opcode == CMD53_FIXED_ADDRESS) {
ret = sdio_readsb(device->func, tbuffer, address, length);
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: readsb ret=%d address: 0x%X, len: %d, 0x%X\n",
ret, address, length, *(int *)tbuffer));
} else {
ret = sdio_memcpy_fromio(device->func, tbuffer, address, length);
AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: readio ret=%d address: 0x%X, len: %d, 0x%X\n",
ret, address, length, *(int *)tbuffer));
}
#if HIF_USE_DMA_BOUNCE_BUFFER
if (bounced) {
/* copy the read data from the dma buffer */
memcpy(buffer, tbuffer, length);
}
#endif
} else {
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
("AR6000: Invalid direction: 0x%08x\n", request));
status = A_EINVAL;
break;
}
if (ret) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
("AR6000: SDIO bus operation failed! MMC stack returned : %d \n", ret));
status = A_ERROR;
}
} while (FALSE);
return status;
}
void a_dump_module_debug_info(ATH_DEBUG_MODULE_DBG_INFO *pInfo)
{
int i;
ATH_DEBUG_MASK_DESCRIPTION *pDesc;
if (pInfo == NULL) {
return;
}
pDesc = pInfo->pMaskDescriptions;
A_PRINTF("========================================================\n\n");
A_PRINTF("Module Debug Info => Name : %s \n", pInfo->ModuleName);
A_PRINTF(" => Descr. : %s \n", pInfo->ModuleDescription);
A_PRINTF("\n Current mask => 0x%8.8X \n", pInfo->CurrentMask);
A_PRINTF("\n Avail. Debug Masks :\n\n");
for (i = 0; i < pInfo->MaxDescriptions; i++,pDesc++) {
A_PRINTF(" => 0x%8.8X -- %s \n", pDesc->Mask, pDesc->Description);
}
if (0 == i) {
A_PRINTF(" => * none defined * \n");
}
A_PRINTF("\n Standard Debug Masks :\n\n");
/* print standard masks */
A_PRINTF(" => 0x%8.8X -- Errors \n", ATH_DEBUG_ERR);
A_PRINTF(" => 0x%8.8X -- Warnings \n", ATH_DEBUG_WARN);
A_PRINTF(" => 0x%8.8X -- Informational \n", ATH_DEBUG_INFO);
A_PRINTF(" => 0x%8.8X -- Tracing \n", ATH_DEBUG_TRC);
A_PRINTF("\n========================================================\n");
}
