bool DSPCore_Init(const DSPInitOptions& opts)
{
g_dsp.step_counter = 0;
g_cycles_left = 0;
g_init_hax = false;
g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
g_dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);
g_dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);
g_dsp.coef = (u16*)AllocateMemoryPages(DSP_COEF_BYTE_SIZE);
memcpy(g_dsp.irom, opts.irom_contents.data(), DSP_IROM_BYTE_SIZE);
memcpy(g_dsp.coef, opts.coef_contents.data(), DSP_COEF_BYTE_SIZE);
// Try to load real ROM contents.
if (!VerifyRoms())
{
DSPCore_FreeMemoryPages();
return false;
}
memset(&g_dsp.r, 0, sizeof(g_dsp.r));
std::fill(std::begin(g_dsp.reg_stack_ptr), std::end(g_dsp.reg_stack_ptr), 0);
for (size_t i = 0; i < ArraySize(g_dsp.reg_stack); i++)
std::fill(std::begin(g_dsp.reg_stack[i]), std::end(g_dsp.reg_stack[i]), 0);
// Fill IRAM with HALT opcodes.
std::fill(g_dsp.iram, g_dsp.iram + DSP_IRAM_SIZE, 0x0021);
// Just zero out DRAM.
std::fill(g_dsp.dram, g_dsp.dram + DSP_DRAM_SIZE, 0);
// Copied from a real console after the custom UCode has been loaded.
// These are the indexing wrapping registers.
std::fill(std::begin(g_dsp.r.wr), std::end(g_dsp.r.wr), 0xffff);
g_dsp.r.sr |= SR_INT_ENABLE;
g_dsp.r.sr |= SR_EXT_INT_ENABLE;
g_dsp.cr = 0x804;
gdsp_ifx_init();
// Mostly keep IRAM write protected. We unprotect only when DMA-ing
// in new ucodes.
WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
// Initialize JIT, if necessary
if (opts.core_type == DSPInitOptions::CORE_JIT)
g_dsp_jit = std::make_unique<DSPEmitter>();
g_dsp_cap.reset(opts.capture_logger);
core_state = DSPCORE_RUNNING;
return true;
}
void Init(bool hle)
{
dsp_emulator = CreateDSPEmulator(hle);
dsp_is_lle = dsp_emulator->IsLLE();
if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
{
g_ARAM.wii_mode = true;
g_ARAM.size = Memory::EXRAM_SIZE;
g_ARAM.mask = Memory::EXRAM_MASK;
g_ARAM.ptr = Memory::GetPointer(0x10000000);
}
else
{
// On the GC, ARAM is accessible only through this interface.
g_ARAM.wii_mode = false;
g_ARAM.size = ARAM_SIZE;
g_ARAM.mask = ARAM_MASK;
g_ARAM.ptr = (u8 *)AllocateMemoryPages(g_ARAM.size);
}
memset(&g_audioDMA, 0, sizeof(g_audioDMA));
memset(&g_arDMA, 0, sizeof(g_arDMA));
g_dspState.DSPControl.Hex = 0;
g_dspState.DSPControl.DSPHalt = 1;
g_ARAM_Info.Hex = 0;
g_AR_MODE = 1; // ARAM Controller has init'd
g_AR_REFRESH = 156; // 156MHz
et_GenerateDSPInterrupt = CoreTiming::RegisterEvent("DSPint", GenerateDSPInterrupt_Wrapper);
}
TEST(PageFault, PageFault)
{
EMM::InstallExceptionHandler();
void* data = AllocateMemoryPages(PAGE_GRAN);
EXPECT_NE(data, nullptr);
WriteProtectMemory(data, PAGE_GRAN, false);
PageFaultFakeJit pfjit;
jit = &pfjit;
pfjit.m_data = data;
auto start = std::chrono::high_resolution_clock::now();
*(volatile int*)data = 5;
auto end = std::chrono::high_resolution_clock::now();
#define AS_NS(diff) \
((unsigned long long)std::chrono::duration_cast<std::chrono::nanoseconds>(diff).count())
EMM::UninstallExceptionHandler();
jit = nullptr;
printf("page fault timing:\n");
printf("start->HandleFault %llu ns\n", AS_NS(pfjit.m_pre_unprotect_time - start));
printf("UnWriteProtectMemory %llu ns\n",
AS_NS(pfjit.m_post_unprotect_time - pfjit.m_pre_unprotect_time));
printf("HandleFault->end %llu ns\n", AS_NS(end - pfjit.m_post_unprotect_time));
printf("total %llu ns\n", AS_NS(end - start));
}
void Fifo_Init()
{
videoBuffer = (u8*)AllocateMemoryPages(FIFO_SIZE);
size = 0;
GpuRunningState = false;
Common::AtomicStore(CommandProcessor::VITicks, CommandProcessor::m_cpClockOrigin);
}
void Fifo_Init()
{
// Padded so that SIMD overreads in the vertex loader are safe
s_video_buffer = (u8*)AllocateMemoryPages(FIFO_SIZE + 4);
ResetVideoBuffer();
GpuRunningState = false;
Common::AtomicStore(CommandProcessor::VITicks, CommandProcessor::m_cpClockOrigin);
}
void Fifo_Init()
{
// Padded so that SIMD overreads in the vertex loader are safe
s_video_buffer = (u8*)AllocateMemoryPages(FIFO_SIZE + 4);
ResetVideoBuffer();
if (SConfig::GetInstance().bCPUThread)
s_gpu_mainloop.Prepare();
s_sync_ticks.store(0);
}
TransformDrawEngine::TransformDrawEngine()
: collectedVerts(0),
prevPrim_(GE_PRIM_INVALID),
dec_(0),
lastVType_(-1),
curVbo_(0),
shaderManager_(0),
textureCache_(0),
framebufferManager_(0),
numDrawCalls(0),
vertexCountInDrawCalls(0),
uvScale(0) {
decimationCounter_ = VERTEXCACHE_DECIMATION_INTERVAL;
// Allocate nicely aligned memory. Maybe graphics drivers will
// appreciate it.
// All this is a LOT of memory, need to see if we can cut down somehow.
decoded = (u8 *)AllocateMemoryPages(DECODED_VERTEX_BUFFER_SIZE);
decIndex = (u16 *)AllocateMemoryPages(DECODED_INDEX_BUFFER_SIZE);
transformed = (TransformedVertex *)AllocateMemoryPages(TRANSFORMED_VERTEX_BUFFER_SIZE);
transformedExpanded = (TransformedVertex *)AllocateMemoryPages(3 * TRANSFORMED_VERTEX_BUFFER_SIZE);
quadIndices_ = new u16[6 * QUAD_INDICES_MAX];
for (int i = 0; i < QUAD_INDICES_MAX; i++) {
quadIndices_[i * 6 + 0] = i * 4;
quadIndices_[i * 6 + 1] = i * 4 + 2;
quadIndices_[i * 6 + 2] = i * 4 + 1;
quadIndices_[i * 6 + 3] = i * 4 + 1;
quadIndices_[i * 6 + 4] = i * 4 + 2;
quadIndices_[i * 6 + 5] = i * 4 + 3;
}
if (g_Config.bPrescaleUV) {
uvScale = new UVScale[MAX_DEFERRED_DRAW_CALLS];
}
memset(vbo_, 0, sizeof(vbo_));
memset(ebo_, 0, sizeof(ebo_));
indexGen.Setup(decIndex);
decJitCache_ = new VertexDecoderJitCache();
InitDeviceObjects();
register_gl_resource_holder(this);
}
bool DSPCore_Init(const std::string& irom_filename, const std::string& coef_filename, bool bUsingJIT)
{
g_dsp.step_counter = 0;
cyclesLeft = 0;
init_hax = false;
dspjit = nullptr;
g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
g_dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);
g_dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);
g_dsp.coef = (u16*)AllocateMemoryPages(DSP_COEF_BYTE_SIZE);
// Fill roms with zeros.
memset(g_dsp.irom, 0, DSP_IROM_BYTE_SIZE);
memset(g_dsp.coef, 0, DSP_COEF_BYTE_SIZE);
// Try to load real ROM contents.
if (!LoadRom(irom_filename, DSP_IROM_SIZE, g_dsp.irom) ||
!LoadRom(coef_filename, DSP_COEF_SIZE, g_dsp.coef) ||
!VerifyRoms(irom_filename, coef_filename))
{
DSPCore_FreeMemoryPages();
return false;
}
memset(&g_dsp.r,0,sizeof(g_dsp.r));
for (int i = 0; i < 4; i++)
{
g_dsp.reg_stack_ptr[i] = 0;
for (int j = 0; j < DSP_STACK_DEPTH; j++)
{
g_dsp.reg_stack[i][j] = 0;
}
}
// Fill IRAM with HALT opcodes.
for (int i = 0; i < DSP_IRAM_SIZE; i++)
{
g_dsp.iram[i] = 0x0021; // HALT opcode
}
// Just zero out DRAM.
for (int i = 0; i < DSP_DRAM_SIZE; i++)
{
g_dsp.dram[i] = 0;
}
// Copied from a real console after the custom UCode has been loaded.
// These are the indexing wrapping registers.
g_dsp.r.wr[0] = 0xffff;
g_dsp.r.wr[1] = 0xffff;
g_dsp.r.wr[2] = 0xffff;
g_dsp.r.wr[3] = 0xffff;
g_dsp.r.sr |= SR_INT_ENABLE;
g_dsp.r.sr |= SR_EXT_INT_ENABLE;
g_dsp.cr = 0x804;
gdsp_ifx_init();
// Mostly keep IRAM write protected. We unprotect only when DMA-ing
// in new ucodes.
WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
// Initialize JIT, if necessary
if (bUsingJIT)
dspjit = new DSPEmitter();
core_state = DSPCORE_RUNNING;
return true;
}
SoftwareDrawEngine::SoftwareDrawEngine() {
// All this is a LOT of memory, need to see if we can cut down somehow. Used for splines.
decoded = (u8 *)AllocateMemoryPages(DECODED_VERTEX_BUFFER_SIZE, MEM_PROT_READ | MEM_PROT_WRITE);
decIndex = (u16 *)AllocateMemoryPages(DECODED_INDEX_BUFFER_SIZE, MEM_PROT_READ | MEM_PROT_WRITE);
splineBuffer = (u8 *)AllocateMemoryPages(SPLINE_BUFFER_SIZE, MEM_PROT_READ | MEM_PROT_WRITE);
}
TransformUnit::TransformUnit() {
buf = (u8 *)AllocateMemoryPages(TRANSFORM_BUF_SIZE, MEM_PROT_READ | MEM_PROT_WRITE);
}
