/*====================================================================
FUNCTION fc8150_bb_init
DESCRIPTION
DEPENDENCIES
RETURN VALUE
SIDE EFFECTS
======================================================================*/
int fc8150_bb_init(void)
{
int ret = BBM_NOK;
ISDBT_MSG_FC8150_BB("[%s] start (BBM_XTAL_FREQ)%d\n", __func__, BBM_XTAL_FREQ);
ret = BBM_HOSTIF_SELECT(NULL, BBM_SPI);
if (ret) {
ISDBT_MSG_FC8150_BB("[%s] hostif select fail!!! \n", __func__);
return ret;
}
ret = BBM_I2C_INIT(NULL, FCI_I2C_TYPE);
ret |= BBM_PROBE(NULL);
if (ret) {
ISDBT_MSG_FC8150_BB("[%s] FC8150 Initialize Fail (ret)%d\n", __func__, ret);
return ret;
}
ret = BBM_INIT(NULL);
ret |= BBM_TUNER_SELECT(NULL, FC8150_TUNER, 0);
if (ret) {
ISDBT_MSG_FC8150_BB("[%s] fail to BBM_INIT (ret)%d\n", __func__, ret);
return ret;
}
BBM_TS_CALLBACK_REGISTER(0, ISDBT_DATA_CALLBACK);
scan_mode = 0;
//ISDBT_MSG_FC8150_BB("[%s] end \n", __func__);
return BBM_OK;
}
/*=======================================================
Function : tunerbb_drv_fc8050_init
Description : Initializing the FC8050 Chip after power on
Parameter : VOID
Return Value :
SUCCESS : 1
FAIL : 0 or negative interger (If there is error code)
when model who edit history
-------------------------------------------------------
2010/05/17 MOBIT prajuna EBI2 configuration
2010/05/31 MOBIT prajuna Removed test code
2010/06/09 MOBIT prajuna TDMB porting(KB3 Rev. A patch)
2010/07/15 MOBIT prajuna TDMB tuning for QSC
2010/07/16 MOBIT somesoo TDMB tuning for QSC with FCI
2010/07/17 MOBIT somesoo TDMB porting(VG)
2010/08/19 MOBIT prajuna Code review
2010/09/10 MOBIT prajuna TDMB porting(Aloe)
======================================================== */
int8 tunerbb_drv_fc8050_init(void)
{
uint8 res;
/*test*/
/* Common Code */
#if defined(STREAM_SLAVE_PARALLEL_UPLOAD)
/* EBI2 Specific Code */
BBM_HOSTIF_SELECT(NULL, BBM_PPI);
#elif defined(STREAM_TS_UPLOAD)
/* TSIF Specific Code */
BBM_HOSTIF_SELECT(NULL, BBM_I2C);
#elif defined(STREAM_SPI_UPLOAD)
/* SPI Specific. Code */
BBM_HOSTIF_SELECT(NULL, BBM_SPI);
#else
#error code not present
#endif
BBM_FIC_CALLBACK_REGISTER((fci_u32)NULL, tunerbb_drv_fc8050_fic_cb);
BBM_MSC_CALLBACK_REGISTER((fci_u32)NULL, tunerbb_drv_fc8050_msc_cb);
res = BBM_INIT(NULL);
if(res)
return FC8050_RESULT_ERROR;
else
{
#if !defined(STREAM_TS_UPLOAD)
memset((void*)&g_chinfo, 0xff, sizeof(g_chinfo));
memset((void*)&msc_buffer, 0x00, sizeof(DATA_BUFFER));
memset((void*)&fic_buffer, 0x00, sizeof(DATA_BUFFER));
#endif
}
res = BBM_TUNER_SELECT(0, FC8050_TUNER, BAND3_TYPE);
if(res)
return FC8050_RESULT_ERROR;
else
return FC8050_RESULT_SUCCESS;
}
static int broadcast_tdmb_fc8050_probe(struct spi_device *spi)
{
int rc;
fc8050_ctrl_info.TdmbPowerOnState = FALSE;
fc8050_ctrl_info.spi_ptr = spi;
fc8050_ctrl_info.spi_ptr->mode = SPI_MODE_0;
fc8050_ctrl_info.spi_ptr->bits_per_word = 8;
fc8050_ctrl_info.spi_ptr->max_speed_hz = (24000*1000);
rc = spi_setup(spi);
printk("broadcast_tdmb_fc8050_probe spi_setup=%d\n", rc);
BBM_HOSTIF_SELECT(NULL, 1);
xo_handle_tdmb = msm_xo_get(MSM_XO_TCXO_A2, id);
if(IS_ERR(xo_handle_tdmb)) {
pr_err("Failed to get MSM_XO_TCXO_A2 handle for TDMB (%ld)\n", PTR_ERR(xo_handle_tdmb));
return FALSE;
}
#ifdef FEATURE_DMB_USE_WORKQUEUE
INIT_WORK(&fc8050_ctrl_info.spi_work, broacast_tdmb_spi_work);
fc8050_ctrl_info.spi_wq = create_singlethread_workqueue("tdmb_spi_wq");
if(fc8050_ctrl_info.spi_wq == NULL){
printk("Failed to setup tdmb spi workqueue \n");
return -ENOMEM;
}
#endif
tdmb_configure_gpios( );
#ifdef FEATURE_DMB_USE_WORKQUEUE
rc = request_irq(spi->irq, broadcast_tdmb_spi_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#else
rc = request_threaded_irq(spi->irq, NULL, broadcast_tdmb_spi_event_handler, IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#endif
printk("broadcast_tdmb_fc8050_probe request_irq=%d\n", rc);
tdmb_fc8050_interrupt_lock();
mutex_init(&fc8050_ctrl_info.mutex);
wake_lock_init(&fc8050_ctrl_info.wake_lock, WAKE_LOCK_SUSPEND, dev_name(&spi->dev));
spin_lock_init(&fc8050_ctrl_info.spin_lock);
// pm_qos_add_request(&fc8050_ctrl_info.pm_req_list, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
printk("broadcast_fc8050_probe End\n");
return rc;
}
/*=======================================================
Function : tunerbb_drv_fc8050_init
Description : Initializing the FC8050 Chip after power on
Parameter : VOID
Return Value :
SUCCESS : 1
FAIL : 0 or negative interger (If there is error code)
when model who edit history
-------------------------------------------------------
2010/05/17 MOBIT prajuna EBI2 configuration
2010/05/31 MOBIT prajuna Removed test code
2010/06/09 MOBIT prajuna TDMB porting(KB3 Rev. A patch)
2010/07/15 MOBIT prajuna TDMB tuning for QSC
2010/07/16 MOBIT somesoo TDMB tuning for QSC with FCI 최규원 과장
2010/07/17 MOBIT somesoo TDMB porting(VG)
2010/08/19 MOBIT prajuna Code review
2010/09/10 MOBIT prajuna TDMB porting(Aloe)
======================================================== */
int8 tunerbb_drv_fc8050_init(void)
{
uint8 res;
/*test*/
/*
uint16 i;
uint32 wdata = 0;
uint32 ldata = 0;
uint32 data = 0;
uint32 temp = 0;
*/
/* Common Code */
#if defined(STREAM_SLAVE_PARALLEL_UPLOAD)
/* EBI2 Specific Code */
BBM_HOSTIF_SELECT(NULL, BBM_PPI);
#elif defined(STREAM_TS_UPLOAD)
/* TSIF Specific Code */
BBM_HOSTIF_SELECT(NULL, BBM_I2C);
#elif defined(STREAM_SPI_UPLOAD)
/* SPI Specific. Code */
BBM_HOSTIF_SELECT(NULL, BBM_SPI);
#else
#error code not present
#endif
BBM_FIC_CALLBACK_REGISTER((fci_u32)NULL, tunerbb_drv_fc8050_fic_cb);
BBM_MSC_CALLBACK_REGISTER((fci_u32)NULL, tunerbb_drv_fc8050_msc_cb);
res = BBM_INIT(NULL);
if(res)
return FC8050_RESULT_ERROR;
else
{
#if !defined(STREAM_TS_UPLOAD)
memset((void*)&g_chinfo, 0xff, sizeof(g_chinfo));
memset((void*)&msc_buffer, 0x00, sizeof(DATA_BUFFER));
memset((void*)&fic_buffer, 0x00, sizeof(DATA_BUFFER));
#endif
}
res = BBM_TUNER_SELECT(0, FC8050_TUNER, BAND3_TYPE);
// res = BBM_PROBE(0);
// printk("tunerbb_drv_fc8050_init probe RES = %d\n", res);
#if 0 //fc8050 <-> Host(MSM) 간의 Interface TEST를 위한 code
/* test */
for(i=0;i<5000;i++)
{
// dog_kick();
BBM_WRITE(NULL, 0x05, i & 0xff);
BBM_READ(NULL, 0x05, &data);
if((i & 0xff) != data)
printk("FC8000 byte test (0x%x,0x%x)\n", i & 0xff, data);
}
for(i=0;i<5000;i++)
{
BBM_WORD_WRITE(NULL, 0x0210, i & 0xffff);
BBM_WORD_READ(NULL, 0x0210, &wdata);
if((i & 0xffff) != wdata)
printk("FC8000 word test (0x%x,0x%x)\n", i & 0xffff, wdata);
}
for(i=0;i<5000;i++)
{
BBM_LONG_WRITE(NULL, 0x0210, i & 0xffffffff);
BBM_LONG_READ(NULL, 0x0210, &ldata);
if((i & 0xffffffff) != ldata)
printk("FC8000 long test (0x%x,0x%x)\n", i & 0xffffffff, ldata);
}
data = 0;
for(i=0;i<5000;i++)
{
temp = i&0xff;
BBM_TUNER_WRITE(NULL, 0x12, 0x01, &temp, 0x01);
BBM_TUNER_READ(NULL, 0x12, 0x01, &data, 0x01);
if((i & 0xff) != data)
printk("FC8000 tuner test (0x%x,0x%x)\n", i & 0xff, data);
}
temp = 0x51;
BBM_TUNER_WRITE(NULL, 0x12, 0x01, &temp, 0x01 );
/* test */
#endif
if(res)
return FC8050_RESULT_ERROR;
else
return FC8050_RESULT_SUCCESS;
}
int tdmb_fc8050_spi_write_read(uint8* tx_data, int tx_length, uint8 *rx_data, int rx_length)
{
int rc;
struct spi_transfer t = {
.tx_buf = tx_data,
.rx_buf = rx_data,
.len = tx_length+rx_length,
};
struct spi_message m;
if (fc8050_ctrl_info.spi_ptr == NULL)
{
printk("tdmb_fc8050_spi_write_read error txdata=0x%x, length=%d\n", (unsigned int)tx_data, tx_length+rx_length);
}
mutex_lock(&fc8050_ctrl_info.mutex);
spi_message_init(&m);
spi_message_add_tail(&t, &m);
rc = spi_sync(fc8050_ctrl_info.spi_ptr, &m);
if ( rc < 0 )
{
printk("tdmb_fc8050_spi_read_burst result(%d), actual_len=%d\n",rc, m.actual_length);
}
mutex_unlock(&fc8050_ctrl_info.mutex);
return TRUE;
}
#ifdef FEATURE_DMB_USE_WORKQUEUE
static irqreturn_t broadcast_tdmb_spi_isr(int irq, void *handle)
{
struct tdmb_fc8050_ctrl_blk* fc8050_info_p;
unsigned long flag;
fc8050_info_p = (struct tdmb_fc8050_ctrl_blk *)handle;
if ( fc8050_info_p && fc8050_info_p->TdmbPowerOnState )
{
if (fc8050_info_p->spi_irq_status)
{
printk("######### spi read function is so late skip #########\n");
return IRQ_HANDLED;
}
// printk("***** broadcast_tdmb_spi_isr coming *******\n");
spin_lock_irqsave(&fc8050_info_p->spin_lock, flag);
queue_work(fc8050_info_p->spi_wq, &fc8050_info_p->spi_work);
spin_unlock_irqrestore(&fc8050_info_p->spin_lock, flag);
}
else
{
printk("broadcast_tdmb_spi_isr is called, but device is off state\n");
}
return IRQ_HANDLED;
}
static void broacast_tdmb_spi_work(struct work_struct *tdmb_work)
{
struct tdmb_fc8050_ctrl_blk *pTdmbWorkData;
pTdmbWorkData = container_of(tdmb_work, struct tdmb_fc8050_ctrl_blk, spi_work);
if ( pTdmbWorkData )
{
fc8050_isr_control(0);
pTdmbWorkData->spi_irq_status = TRUE;
broadcast_drv_if_isr();
pTdmbWorkData->spi_irq_status = FALSE;
fc8050_isr_control(1);
}
else
{
printk("~~~~~~~broadcast_tdmb_spi_work call but pTdmbworkData is NULL ~~~~~~~\n");
}
}
#else
static irqreturn_t broadcast_tdmb_spi_event_handler(int irq, void *handle)
{
struct tdmb_fc8050_ctrl_blk* fc8050_info_p;
fc8050_info_p = (struct tdmb_fc8050_ctrl_blk *)handle;
if ( fc8050_info_p && fc8050_info_p->TdmbPowerOnState )
{
if (fc8050_info_p->spi_irq_status)
{
printk("######### spi read function is so late skip #########\n");
return IRQ_HANDLED;
}
fc8050_isr_control(0);
fc8050_info_p->spi_irq_status = TRUE;
broadcast_drv_if_isr();
fc8050_info_p->spi_irq_status = FALSE;
fc8050_isr_control(1);
}
else
{
printk("broadcast_tdmb_spi_isr is called, but device is off state\n");
}
return IRQ_HANDLED;
}
#endif
static int broadcast_tdmb_fc8050_probe(struct spi_device *spi)
{
int rc;
#ifdef ANTENNA_SWITCHING
struct pm_gpio GPIO11_CFG = {
.direction = PM_GPIO_DIR_OUT,
.pull = PM_GPIO_PULL_NO,
.function = PM_GPIO_FUNC_NORMAL,
.vin_sel = 2,
.inv_int_pol = 0,
};
struct pm_gpio GPIO12_CFG = {
.direction = PM_GPIO_DIR_OUT,
.pull = PM_GPIO_PULL_NO,
.function = PM_GPIO_FUNC_NORMAL,
.vin_sel = 2,
.inv_int_pol = 0,
};
#endif /* ANTENNA_SWITCHING */
fc8050_ctrl_info.TdmbPowerOnState = FALSE;
fc8050_ctrl_info.spi_ptr = spi;
fc8050_ctrl_info.spi_ptr->mode = SPI_MODE_0;
fc8050_ctrl_info.spi_ptr->bits_per_word = 8;
fc8050_ctrl_info.spi_ptr->max_speed_hz = ( 24000*1000 );
rc = spi_setup(spi);
printk("broadcast_tdmb_fc8050_probe spi_setup=%d\n", rc);
BBM_HOSTIF_SELECT(NULL, 1);
#ifdef FEATURE_DMB_USE_WORKQUEUE
INIT_WORK(&fc8050_ctrl_info.spi_work, broacast_tdmb_spi_work);
fc8050_ctrl_info.spi_wq = create_singlethread_workqueue("tdmb_spi_wq");
if(fc8050_ctrl_info.spi_wq == NULL){
printk("Failed to setup tdmb spi workqueue \n");
return -ENOMEM;
}
#endif
gpio_request(DMB_RESET_N, "DMB_RESET_N");
gpio_request(DMB_EN, "DMB_EN");
gpio_request(DMB_INT_N, "DMB_INT_N");
//gpio_direction_output(DMB_RESET_N, false);
//gpio_direction_output(DMB_EN, false);
//gpio_direction_output(DMB_INT_N, false);
#ifdef ANTENNA_SWITCHING
pm8xxx_gpio_config(DMB_ANT_SEL_P_EAR, &GPIO11_CFG);
pm8xxx_gpio_config(DMB_ANT_SEL_N_INNER, &GPIO12_CFG);
gpio_set_value_cansleep(DMB_ANT_SEL_P_EAR, 1);
gpio_set_value_cansleep(DMB_ANT_SEL_N_INNER, 0);
#endif /* ANTENNA_SWITCHING */
#ifdef FEATURE_DMB_USE_WORKQUEUE
rc = request_irq(spi->irq, broadcast_tdmb_spi_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#else
rc = request_threaded_irq(spi->irq, NULL, broadcast_tdmb_spi_event_handler, IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#endif
printk("broadcast_tdmb_fc8050_probe request_irq=%d\n", rc);
tdmb_fc8050_interrupt_lock();
mutex_init(&fc8050_ctrl_info.mutex);
wake_lock_init(&fc8050_ctrl_info.wake_lock, WAKE_LOCK_SUSPEND, dev_name(&spi->dev));
spin_lock_init(&fc8050_ctrl_info.spin_lock);
#ifdef PM_QOS
pm_qos_add_request(&fc8050_ctrl_info.pm_req_list, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
#endif /* PM_QOS */
printk("broadcast_fc8050_probe End\n");
return rc;
}
static int broadcast_tdmb_fc8050_remove(struct spi_device *spi)
{
printk("broadcast_tdmb_fc8050_remove \n");
#ifdef FEATURE_DMB_USE_WORKQUEUE
if (fc8050_ctrl_info.spi_wq)
{
flush_workqueue(fc8050_ctrl_info.spi_wq);
destroy_workqueue(fc8050_ctrl_info.spi_wq);
}
#endif
free_irq(spi->irq, &fc8050_ctrl_info);
mutex_destroy(&fc8050_ctrl_info.mutex);
wake_lock_destroy(&fc8050_ctrl_info.wake_lock);
#ifdef PM_QOS
pm_qos_remove_request(&fc8050_ctrl_info.pm_req_list);
#endif /* PM_QOS */
memset((unsigned char*)&fc8050_ctrl_info, 0x0, sizeof(struct tdmb_fc8050_ctrl_blk));
return 0;
}
static int broadcast_tdmb_fc8050_suspend(struct spi_device *spi, pm_message_t mesg)
{
printk("broadcast_tdmb_fc8050_suspend \n");
return 0;
}
unsigned char DMBDrv_init(void)
{
u8 data;
u16 wdata;
u32 ldata;
int i;
u8 temp = 0x1e;
#ifdef CONFIG_TDMB_SPI
if(BBM_HOSTIF_SELECT(NULL, BBM_SPI))
return TDMB_FAIL;
#elif defined(CONFIG_TDMB_EBI)
if(BBM_HOSTIF_SELECT(NULL, BBM_PPI))
return TDMB_FAIL;
#endif
if(BBM_PROBE(NULL) != BBM_OK) // check for factory chip interface test
{
return TDMB_FAIL;
}
BBM_FIC_CALLBACK_REGISTER(NULL, TDMBDrv_FIC_CALLBACK);
BBM_MSC_CALLBACK_REGISTER(NULL, TDMBDrv_MSC_CALLBACK);
BBM_INIT(NULL);
BBM_TUNER_SELECT(NULL, FC8050_TUNER, BAND3_TYPE);
#if 0
BBM_WRITE(NULL, 0x05, 0xa7);
BBM_READ(NULL, 0x05, &data);
BBM_READ(NULL, 0x12, &data);
BBM_WORD_READ(NULL, 0x12, &wdata);
BBM_WORD_WRITE(NULL, 0x310, 0x0b);
BBM_WORD_READ(NULL, 0x310, &wdata);
BBM_WRITE(NULL, 0x312, 0xc0);
BBM_READ(NULL, 0x312, &data);
BBM_TUNER_READ(NULL, 0x01, 0x01, &data, 0x01);
#endif
#if 0
for(i=0;i<1000;i++)
{
// dog_kick();
BBM_WRITE(NULL, 0x05, i & 0xff);
BBM_READ(NULL, 0x05, &data);
if((i & 0xff) != data)
DPRINTK("FC8000 byte test (0x%x,0x%x)\r\n", i & 0xff, data);
}
for(i=0;i<1000;i++)
{
BBM_WORD_WRITE(NULL, 0x0210, i & 0xffff);
BBM_WORD_READ(NULL, 0x0210, &wdata);
if((i & 0xffff) != wdata)
DPRINTK("FC8000 word test (0x%x,0x%x)\r\n", i & 0xffff, wdata);
}
for(i=0;i<1000;i++)
{
BBM_LONG_WRITE(NULL, 0x0210, i & 0xffffffff);
BBM_LONG_READ(NULL, 0x0210, &ldata);
if((i & 0xffffffff) != ldata)
DPRINTK("FC8000 long test (0x%x,0x%x)\r\n", i & 0xffffffff, ldata);
}
for(i=0;i<1000;i++)
{
temp = i&0xff;
BBM_TUNER_WRITE(NULL, 0x12, 0x01, &temp, 0x01);
BBM_TUNER_READ(NULL, 0x12, 0x01, &data, 0x01);
if((i & 0xff) != data)
DPRINTK("FC8000 tuner test (0x%x,0x%x)\r\n", i & 0xff, data);
}
temp = 0x51;
BBM_TUNER_WRITE(NULL, 0x12, 0x01, &temp, 0x01 );
#endif
gBer = 3000;
gInitFlag = 1;
return TDMB_SUCCESS;
}
static int broadcast_tdmb_fc8050_probe(struct spi_device *spi)
{
int rc;
if(spi == NULL)
{
printk("broadcast_fc8050_probe spi is NULL, so spi can not be set\n");
return -1;
}
fc8050_ctrl_info.TdmbPowerOnState = FALSE;
fc8050_ctrl_info.spi_ptr = spi;
fc8050_ctrl_info.spi_ptr->mode = SPI_MODE_0;
fc8050_ctrl_info.spi_ptr->bits_per_word = 8;
fc8050_ctrl_info.spi_ptr->max_speed_hz = (15000*1000);
#ifdef FEATURE_DMB_USE_BUS_SCALE
fc8050_ctrl_info.pdev = to_platform_device(&spi->dev);
fc8050_ctrl_info.bus_scale_pdata = msm_bus_cl_get_pdata(fc8050_ctrl_info.pdev);
fc8050_ctrl_info.bus_scale_client_id = msm_bus_scale_register_client(fc8050_ctrl_info.bus_scale_pdata);
#endif
// Once I have a spi_device structure I can do a transfer anytime
rc = spi_setup(spi);
printk("broadcast_tdmb_fc8050_probe spi_setup=%d\n", rc);
BBM_HOSTIF_SELECT(NULL, 1);
#ifdef FEATURE_DMB_USE_XO
fc8050_ctrl_info.clk = clk_get(&fc8050_ctrl_info.spi_ptr->dev, "xo");
if (IS_ERR(fc8050_ctrl_info.clk)) {
rc = PTR_ERR(fc8050_ctrl_info.clk);
dev_err(&fc8050_ctrl_info.spi_ptr->dev, "could not get clock\n");
return rc;
}
/* We enable/disable the clock only to assure it works */
rc = clk_prepare_enable(fc8050_ctrl_info.clk);
if (rc) {
dev_err(&fc8050_ctrl_info.spi_ptr->dev, "could not enable clock\n");
return rc;
}
clk_disable_unprepare(fc8050_ctrl_info.clk);
#endif
#ifdef FEATURE_DMB_USE_WORKQUEUE
INIT_WORK(&fc8050_ctrl_info.spi_work, broacast_tdmb_spi_work);
fc8050_ctrl_info.spi_wq = create_singlethread_workqueue("tdmb_spi_wq");
if(fc8050_ctrl_info.spi_wq == NULL){
printk("Failed to setup tdmb spi workqueue \n");
return -ENOMEM;
}
#endif
tdmb_configure_gpios();
#ifdef FEATURE_DMB_USE_WORKQUEUE
rc = request_irq(spi->irq, broadcast_tdmb_spi_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#else
rc = request_threaded_irq(spi->irq, NULL, broadcast_tdmb_spi_event_handler, IRQF_ONESHOT | IRQF_DISABLED | IRQF_TRIGGER_FALLING,
spi->dev.driver->name, &fc8050_ctrl_info);
#endif
printk("broadcast_tdmb_fc8050_probe request_irq=%d\n", rc);
tdmb_fc8050_interrupt_lock();
mutex_init(&fc8050_ctrl_info.mutex);
wake_lock_init(&fc8050_ctrl_info.wake_lock, WAKE_LOCK_SUSPEND, dev_name(&spi->dev));
spin_lock_init(&fc8050_ctrl_info.spin_lock);
#ifdef FEATURE_DMB_USE_PM_QOS
pm_qos_add_request(&fc8050_ctrl_info.pm_req_list, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
#endif
printk("broadcast_fc8050_probe End\n");
return rc;
}
