PS2_TransferStateTypeDef PS2_ReceiveDataIRQHandler(void)
{
PS2_TransferStateTypeDef PS2_NextState = PS2_TransferState;
BitAction PS2_DataBit = 0;
/* Read input */
PS2_DataBit = GPIO_ReadInputDataBit(PS2_GPIO, PS2_Pin_DATA);
switch(PS2_TransferState) {
case START:
/* Initalize */
PS2_OutputBitNr = 0;
PS2_Parity = 0;
/* Check START Bit for errors */
if(PS2_DataBit != 0) {
/* Error */ // XXX abort here
}
PS2_NextState = DATA;
break;
case DATA:
/* next DATA Bit */
*(BITBAND_SRAM(&PS2_InputData, PS2_InputBitNr)) = PS2_DataBit;
PS2_InputBitNr++;
/* Calculate Paritiy */
PS2_Parity ^= PS2_DataBit;
if(PS2_InputBitNr > 7) {
/* Finalize paritiy bit */
PS2_Parity = !PS2_Parity;
PS2_NextState = PARITY;
}
break;
case PARITY:
if(PS2_DataBit != PS2_Parity) {
/* Error */
}
PS2_NextState = STOP;
break;
case STOP:
if(PS2_DataBit != 1) {
/* Error */
}
PS2_NextState = ACK;
break;
case ACK:
/* Acknoledge everything */
GPIO_WriteBit(PS2_GPIO, PS2_Pin_DATA, Bit_RESET);
PS2_NextState = FINISHED;
break;
case FINISHED:
/* Release DATA Pin */
GPIO_WriteBit(PS2_GPIO, PS2_Pin_DATA, Bit_SET);
break;
}
return PS2_NextState;
}
void skub_free_sz(void *ptr) {
/* Figure out which block this was allocated in. */
int i;
for (i = 0; i < ARRAY_NELEMS(skub_pools_var); i++) {
const struct skub_pool_info *pool = &skub_pools_var[i];
int offset = (uint32_t) ptr - (uint32_t) pool->pool;
if (offset < 0 || offset >= pool->sz * pool->max)
continue;
ASSERT_EQUAL(offset % pool->sz, 0);
int idx = offset / pool->sz;
/* Bit-band writes are atomic. */
#ifdef PC_BUILD
pool->bitmask[idx / 32] |= (1 << (idx % 32));
#else
*(uint32_t *)BITBAND_SRAM((uint32_t) pool->bitmask, idx) = 1;
#endif
return;
}
panic("skub_free_sz: %p not in any pool", ptr);
}
PS2_TransferStateTypeDef PS2_SendDataIRQHandler(void)
{
BitAction PS2_DataBit = 0;
PS2_TransferStateTypeDef PS2_NextState = PS2_TransferState;
switch(PS2_TransferState) {
case START:
/* Initalize */
PS2_OutputBitNr = 0;
PS2_Parity = 0;
/* Send START Bit */
PS2_DataBit = 0;
PS2_NextState = DATA;
break;
case DATA:
/* next DATA Bit */
PS2_DataBit = *(BITBAND_SRAM(&PS2_OutputData, PS2_OutputBitNr));
PS2_OutputBitNr++;
/* Calculate Paritiy */
PS2_Parity ^= PS2_DataBit;
if(PS2_OutputBitNr > 7) {
/* Finalize paritiy bit */
PS2_Parity = !PS2_Parity;
PS2_NextState = PARITY;
}
break;
case PARITY:
/* Send PARITY Bit */
PS2_DataBit = PS2_Parity;
PS2_NextState = STOP;
break;
case STOP:
/* Send STOP Bit */
PS2_DataBit = 1;
PS2_NextState = FINISHED;
break;
case ACK:
case FINISHED:
/* This should never happen! */
break;
}
/* Write output bit */
GPIO_WriteBit(PS2_GPIO, PS2_Pin_DATA, PS2_DataBit);
return PS2_NextState;
}
void skub_free(enum skub_type region, void *ptr) {
const struct skub_pool_info *pool = &skub_pools_fixed[region];
int offset = (uint32_t) ptr - (uint32_t) pool->pool;
ASSERT(offset >= 0);
ASSERT(offset < pool->sz * pool->max);
ASSERT_EQUAL(offset % pool->sz, 0);
int idx = offset / pool->sz;
/* Bit-band writes are atomic. */
#ifdef PC_BUILD
pool->bitmask[idx / 32] |= (1 << (idx % 32));
#else
*(uint32_t *)BITBAND_SRAM((uint32_t) pool->bitmask, idx) = 1;
#endif
}
