tstVMMConfigConstructor(PVM pVM, void *pvUser)
{
int rc = CFGMR3ConstructDefaultTree(pVM);
if ( RT_SUCCESS(rc)
&& g_cCpus > 1)
{
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
CFGMR3RemoveValue(pRoot, "NumCPUs");
rc = CFGMR3InsertInteger(pRoot, "NumCPUs", g_cCpus);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pRoot,\"NumCPUs\",) -> %Rrc\n", rc), rc);
CFGMR3RemoveValue(pRoot, "HwVirtExtForced");
rc = CFGMR3InsertInteger(pRoot, "HwVirtExtForced", true);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pRoot,\"HwVirtExtForced\",) -> %Rrc\n", rc), rc);
PCFGMNODE pHwVirtExt = CFGMR3GetChild(pRoot, "HWVirtExt");
CFGMR3RemoveNode(pHwVirtExt);
rc = CFGMR3InsertNode(pRoot, "HWVirtExt", &pHwVirtExt);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertNode(pRoot,\"HWVirtExt\",) -> %Rrc\n", rc), rc);
rc = CFGMR3InsertInteger(pHwVirtExt, "Enabled", true);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pHwVirtExt,\"Enabled\",) -> %Rrc\n", rc), rc);
rc = CFGMR3InsertInteger(pHwVirtExt, "64bitEnabled", false);
RTTESTI_CHECK_MSG_RET(RT_SUCCESS(rc), ("CFGMR3InsertInteger(pHwVirtExt,\"64bitEnabled\",) -> %Rrc\n", rc), rc);
}
return rc;
}
static void doGeneralTests(PCFGMNODE pRoot)
{
/* test multilevel node creation */
PCFGMNODE pChild = NULL;
RTTESTI_CHECK_RC_RETV(CFGMR3InsertNode(pRoot, "First/Second/Third//Final", &pChild), VINF_SUCCESS);
RTTESTI_CHECK_RETV(RT_VALID_PTR(pChild));
RTTESTI_CHECK(CFGMR3GetChild(pRoot, "First/Second/Third/Final") == pChild);
/*
* Boolean queries.
*/
RTTESTI_CHECK_RC(CFGMR3InsertInteger(pChild, "BoolValue", 1), VINF_SUCCESS);
bool f = false;
RTTESTI_CHECK_RC(CFGMR3QueryBool(pChild, "BoolValue", &f), VINF_SUCCESS);
RTTESTI_CHECK(f == true);
RTTESTI_CHECK_RC(CFGMR3QueryBool(pRoot, "BoolValue", &f), VERR_CFGM_VALUE_NOT_FOUND);
RTTESTI_CHECK_RC(CFGMR3QueryBool(NULL, "BoolValue", &f), VERR_CFGM_NO_PARENT);
RTTESTI_CHECK_RC(CFGMR3QueryBoolDef(pChild, "ValueNotFound", &f, true), VINF_SUCCESS);
RTTESTI_CHECK(f == true);
RTTESTI_CHECK_RC(CFGMR3QueryBoolDef(pChild, "ValueNotFound", &f, false), VINF_SUCCESS);
RTTESTI_CHECK(f == false);
RTTESTI_CHECK_RC(CFGMR3QueryBoolDef(NULL, "BoolValue", &f, true), VINF_SUCCESS);
RTTESTI_CHECK(f == true);
RTTESTI_CHECK_RC(CFGMR3QueryBoolDef(NULL, "BoolValue", &f, false), VINF_SUCCESS);
RTTESTI_CHECK(f == false);
}
DECLINLINE(HRESULT) InsertConfigInteger(PCFGMNODE pCfg, const char* pszName, uint64_t u64)
{
int vrc = CFGMR3InsertInteger(pCfg, pszName, u64);
if (RT_FAILURE(vrc))
return E_INVALIDARG;
return S_OK;
}
DECLCALLBACK(int) CFGMConstructor(PVM pVM, void *pvUser)
{
/*
* Get root node first.
* This is the only node in the tree.
*/
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
int rc = CFGMR3InsertInteger(pRoot, "RamSize", 32*1024*1024);
AssertRC(rc);
/* rc = CFGMR3InsertInteger(pRoot, "EnableNestedPaging", false);
AssertRC(rc); */
PCFGMNODE pHWVirtExt;
rc = CFGMR3InsertNode(pRoot, "HWVirtExt", &pHWVirtExt);
AssertRC(rc);
rc = CFGMR3InsertInteger(pHWVirtExt, "Enabled", 1);
AssertRC(rc);
return VINF_SUCCESS;
}
tstVMREQConfigConstructor(PUVM pUVM, PVM pVM, void *pvUser)
{
NOREF(pvUser);
int rc = CFGMR3ConstructDefaultTree(pVM);
if (RT_SUCCESS(rc))
{
/* Disable HM, otherwise it will fail on machines without unrestricted guest execution
* because the allocation of HM_VTX_TOTAL_DEVHEAP_MEM will fail -- no VMMDev */
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
rc = CFGMR3InsertInteger(pRoot, "HMEnabled", false);
if (RT_FAILURE(rc))
RTPrintf("CFGMR3InsertInteger(pRoot,\"HMEnabled\",) -> %Rrc\n", rc);
}
return rc;
}
int main()
{
/*
* Init runtime.
*/
RTR3InitExeNoArguments(RTR3INIT_FLAGS_SUPLIB);
/*
* Create empty VM structure and init SSM.
*/
PVM pVM;
int rc = SUPR3Init(NULL);
if (RT_SUCCESS(rc))
rc = SUPR3PageAlloc(RT_ALIGN_Z(sizeof(*pVM), PAGE_SIZE) >> PAGE_SHIFT, (void **)&pVM);
if (RT_FAILURE(rc))
{
RTPrintf("Fatal error: SUP Failure! rc=%Rrc\n", rc);
return 1;
}
static UVM s_UVM;
PUVM pUVM = &s_UVM;
pUVM->pVM = pVM;
pVM->pUVM = pUVM;
rc = STAMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = MMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3Init(pVM, NULL, NULL);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
if (!CFGMR3GetRoot(pVM))
{
RTPrintf("FAILURE: CFGMR3GetRoot failed\n");
return 1;
}
/* integer */
uint64_t u64;
rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &u64);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
size_t cb;
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "RamSize", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != sizeof(uint64_t))
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"RamSize\" value.\n", cb);
return 1;
}
/* string */
char *pszName = NULL;
rc = CFGMR3QueryStringAlloc(CFGMR3GetRoot(pVM), "Name", &pszName);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryStringAlloc(,\"Name\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "Name", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != strlen(pszName) + 1)
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"Name\" value '%s'.\n", cb, pszName);
return 1;
}
MMR3HeapFree(pszName);
/* test multilevel node creation */
PCFGMNODE pChild = NULL;
rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "First/Second/Third//Final", &pChild);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertNode(,\"First/Second/Third//Final\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3InsertInteger(pChild, "BoolValue", 1);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertInteger(,\"BoolValue\", 1) failed. rc=%Rrc\n", rc);
return 1;
}
PCFGMNODE pNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "First/Second/Third/Final");
if (pNode != pChild)
{
RTPrintf("FAILURE: CFGMR3GetChild(,\"First/Second/Third/Final/BoolValue\") failed. pNode=%p expected %p\n", pNode, pChild);
return 1;
}
bool f = false;
rc = CFGMR3QueryBool(pNode, "BoolValue", &f);
if (RT_FAILURE(rc) || !f)
{
RTPrintf("FAILURE: CFGMR3QueryBool(,\"BoolValue\",) failed. rc=%Rrc f=%d\n", rc, f);
return 1;
}
/* done */
rc = CFGMR3Term(pVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\" failed. rc=%Rrc\n", rc);
return 1;
}
RTPrintf("tstCFGM: SUCCESS\n");
return rc;
}
/**
* Creates the default configuration.
* This assumes an empty tree.
*
* @returns VBox status code.
* @param pVM VM handle.
*/
static DECLCALLBACK(int) cfgmR3CreateDefault(PVM pVM, void *pvUser)
{
uint64_t cbMem = *(uint64_t *)pvUser;
int rc;
int rcAll = VINF_SUCCESS;
bool fIOAPIC = false;
#define UPDATERC() do { if (RT_FAILURE(rc) && RT_SUCCESS(rcAll)) rcAll = rc; } while (0)
/*
* Create VM default values.
*/
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
rc = CFGMR3InsertString(pRoot, "Name", "Default VM");
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "RamSize", cbMem);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "TimerMillies", 10);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "RawR3Enabled", 0);
UPDATERC();
/** @todo CFGM Defaults: RawR0, PATMEnabled and CASMEnabled needs attention later. */
rc = CFGMR3InsertInteger(pRoot, "RawR0Enabled", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "PATMEnabled", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pRoot, "CSAMEnabled", 0);
UPDATERC();
/*
* PDM.
*/
PCFGMNODE pPdm;
rc = CFGMR3InsertNode(pRoot, "PDM", &pPdm);
UPDATERC();
PCFGMNODE pDevices = NULL;
rc = CFGMR3InsertNode(pPdm, "Devices", &pDevices);
UPDATERC();
rc = CFGMR3InsertInteger(pDevices, "LoadBuiltin", 1); /* boolean */
UPDATERC();
PCFGMNODE pDrivers = NULL;
rc = CFGMR3InsertNode(pPdm, "Drivers", &pDrivers);
UPDATERC();
rc = CFGMR3InsertInteger(pDrivers, "LoadBuiltin", 1); /* boolean */
UPDATERC();
/*
* Devices
*/
pDevices = NULL;
rc = CFGMR3InsertNode(pRoot, "Devices", &pDevices);
UPDATERC();
/* device */
PCFGMNODE pDev = NULL;
PCFGMNODE pInst = NULL;
PCFGMNODE pCfg = NULL;
#if 0
PCFGMNODE pLunL0 = NULL;
PCFGMNODE pLunL1 = NULL;
#endif
/*
* PC Arch.
*/
rc = CFGMR3InsertNode(pDevices, "pcarch", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* PC Bios.
*/
rc = CFGMR3InsertNode(pDevices, "pcbios", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "RamSize", cbMem);
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice0", "IDE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice1", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice2", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "BootDevice3", "NONE");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "HardDiskDevice", "piix3ide");
UPDATERC();
rc = CFGMR3InsertString(pCfg, "FloppyDevice", "i82078");
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
RTUUID Uuid;
RTUuidClear(&Uuid);
rc = CFGMR3InsertBytes(pCfg, "UUID", &Uuid, sizeof(Uuid)); UPDATERC();
/* Bios logo. */
rc = CFGMR3InsertInteger(pCfg, "FadeIn", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "FadeOut", 0);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "LogoTime", 0);
UPDATERC();
rc = CFGMR3InsertString(pCfg, "LogoFile", "");
UPDATERC();
/*
* ACPI
*/
rc = CFGMR3InsertNode(pDevices, "acpi", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "RamSize", cbMem); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 7); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
/*
* DMA
*/
rc = CFGMR3InsertNode(pDevices, "8237A", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
/*
* PCI bus.
*/
rc = CFGMR3InsertNode(pDevices, "pci", &pDev); /* piix3 */
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
/*
* PS/2 keyboard & mouse
*/
rc = CFGMR3InsertNode(pDevices, "pckbd", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* Floppy
*/
rc = CFGMR3InsertNode(pDevices, "i82078", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IRQ", 6); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "DMA", 2); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "MemMapped", 0 ); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOBase", 0x3f0); UPDATERC();
/*
* i8254 Programmable Interval Timer And Dummy Speaker
*/
rc = CFGMR3InsertNode(pDevices, "i8254", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* i8259 Programmable Interrupt Controller.
*/
rc = CFGMR3InsertNode(pDevices, "i8259", &pDev);
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg);
UPDATERC();
/*
* APIC.
*/
rc = CFGMR3InsertNode(pDevices, "apic", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); UPDATERC();
if (fIOAPIC)
{
/*
* I/O Advanced Programmable Interrupt Controller.
*/
rc = CFGMR3InsertNode(pDevices, "ioapic", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
}
/*
* RTC MC146818.
*/
rc = CFGMR3InsertNode(pDevices, "mc146818", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
/*
* VGA.
*/
rc = CFGMR3InsertNode(pDevices, "vga", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 2); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "VRamSize", 8 * _1M); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "CustomVideoModes", 0);
rc = CFGMR3InsertInteger(pCfg, "HeightReduction", 0); UPDATERC();
//rc = CFGMR3InsertInteger(pCfg, "MonitorCount", 1); UPDATERC();
/*
* IDE controller.
*/
rc = CFGMR3InsertNode(pDevices, "piix3ide", &pDev); /* piix3 */
UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst);
UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */
UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 1); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 1); UPDATERC();
/*
* Network card.
*/
rc = CFGMR3InsertNode(pDevices, "pcnet", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 3); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pCfg, "Am79C973", 1); UPDATERC();
RTMAC Mac;
Mac.au16[0] = 0x0080;
Mac.au16[2] = Mac.au16[1] = 0x8086;
rc = CFGMR3InsertBytes(pCfg, "MAC", &Mac, sizeof(Mac)); UPDATERC();
/*
* VMM Device
*/
rc = CFGMR3InsertNode(pDevices, "VMMDev", &pDev); UPDATERC();
rc = CFGMR3InsertNode(pDev, "0", &pInst); UPDATERC();
rc = CFGMR3InsertNode(pInst, "Config", &pCfg); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "Trusted", 1); /* boolean */ UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIDeviceNo", 4); UPDATERC();
rc = CFGMR3InsertInteger(pInst, "PCIFunctionNo", 0); UPDATERC();
/*
* ...
*/
#undef UPDATERC
return rcAll;
}