static int lcd_init(void)
{
int ret;
gpio_reg = ioremap(GPIO_PHYS, SZ_4K);
if(!gpio_reg)
{
DEBUG();
return -ENXIO;
}
mifp_reg = ioremap(MIFPCON_PHYS, SZ_4K);
if(!mifp_reg)
{
DEBUG();
ret = -ENXIO;
goto err_mifp;
}
lcd_reg = ioremap(LCD_PHYS, SZ_4K);
if(!lcd_reg)
{
DEBUG();
ret = -ENXIO;
goto err_lcd;
}
lcd_clk = clk_get(NULL, "lcd");
if(IS_ERR(lcd_clk))
{
DEBUG();
ret = -ENODEV;
goto err_clk;
}
/***************************************************/
clk_enable(lcd_clk);
gpio_reg->GPICON = 0xaaaaaaaa;
gpio_reg->GPJCON = 0xaaaaaa; //lcd gpio init
// gpio_reg->GPFCON &= ~(3 << 28);
// gpio_reg->GPFCON |= (1 << 28); //led power init
gpio_reg->GPECON &= ~0xf;
gpio_reg->GPECON |= 1; //lcd power init
gpio_reg->SPCON &= ~3;
gpio_reg->SPCON |= 1; //lcd sel
mifp_reg->MIFPCON &= ~(1 << 3); //sel bypass
lcd_reg->VIDCON0 = VIDOUT(0) | PNRMODE(0) |
CLKSEL_F(0) | CLKDIR(1) | CLKVAL_F(14);
lcd_reg->VIDTCON0 = VBPD(2) | VFPD(2) | VSPW(10);
lcd_reg->VIDTCON1 = HBPD(2) | HFPD(2) | HSPW(41);
lcd_reg->VIDTCON2 = LINEVAL(271) | HOZVAL(479);
lcd_reg->WINCON0 = HAWSWP(1) | BPPMODE_F(5) | ENWIN_F(1);
lcd_reg->VIDOSD0A = OSD_LeftBotX_F(0) | OSD_LeftBotY_F(0);
lcd_reg->VIDOSD0B = OSD_RightBotX_F(479) |
OSD_RightBotY_F(271);
lcd_reg->VIDW00ADD0B0 = fb_mem_phys;
// gpio_reg->GPFDAT |= (1 << 14); //led power on
gpio_reg->GPEDAT |= 1; //lcd power on
lcd_reg->VIDCON0 |= ENVID(1) | ENVID_F(1); //lcd ctrl on
return 0;
err_clk:
iounmap(lcd_reg);
err_lcd:
iounmap(mifp_reg);
err_mifp:
iounmap(gpio_reg);
return ret;
}
static POST_ERROR Post_set_mode(POST_OP_MODE Mode, POST_SCAN_MODE Scan, POST_SRC_TYPE SrcType, POST_DST_TYPE DstType)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_mode(%d, %d, %d, %d)\n\r"), Mode, Scan, SrcType, DstType));
g_PostConfig.Mode = Mode;
g_PostConfig.Scan = Scan;
g_PostConfig.SrcType = SrcType;
g_PostConfig.DstType = DstType;
// For some application PostProcessor May be need to faster CLK
// setting for faster CLK : CLKVALUP_ALWAYS | CLKVAL_F(0) | CLKDIR_DIRECT | CLKSEL_F_HCLK | CSC_R2Y_WIDE | CSC_Y2R_WIDE | IRQ_LEVEL
g_pPostReg->MODE = CLKVALUP_ALWAYS | CLKVAL_F(2) | CLKDIR_DIVIDED | CLKSEL_F_HCLK | CSC_R2Y_NARROW | CSC_Y2R_NARROW | IRQ_LEVEL; // Clock = HCLK/2
if (g_PostConfig.bIntEnable)
{
g_pPostReg->MODE |= POSTINT_ENABLE;
}
if (Mode == POST_PER_FRAME_MODE)
{
g_pPostReg->MODE |= AUTOLOAD_DISABLE;
}
else if (Mode == POST_FREE_RUN_MODE)
{
g_pPostReg->MODE |= AUTOLOAD_ENABLE;
}
else
{
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Operation Mode %d)\n\r"), Mode));
return POST_ERROR_ILLEGAL_PARAMETER;
}
if (Scan == POST_PROGRESSIVE)
{
g_pPostReg->MODE |= PROGRESSIVE;
}
else if (Mode == POST_INTERLACE)
{
g_pPostReg->MODE |= INTERLACE;
}
else
{
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Scan Mode %d)\n\r"), Scan));
return POST_ERROR_ILLEGAL_PARAMETER;
}
switch(SrcType)
{
case POST_SRC_RGB16:
g_pPostReg->MODE |= SRCFMT_RGB | SRCRGB_RGB565 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case POST_SRC_RGB24:
g_pPostReg->MODE |= SRCFMT_RGB | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case POST_SRC_YUV420:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV420 | SRC_NOT_INTERLEAVE;
break;
case POST_SRC_YUV422_YCBYCR:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCBYCR;
break;
case POST_SRC_YUV422_CBYCRY:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CBYCRY;
break;
case POST_SRC_YUV422_YCRYCB:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCRYCB;
break;
case POST_SRC_YUV422_CRYCBY:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CRYCBY;
break;
default:
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Source Type %d)\n\r"), SrcType));
return POST_ERROR_ILLEGAL_PARAMETER;
break;
}
switch(DstType)
{
case POST_DST_RGB16:
g_pPostReg->MODE |= OUTFMT_RGB | OUTRGB_RGB565;
break;
case POST_DST_RGB24:
g_pPostReg->MODE |= OUTFMT_RGB | OUTRGB_RGB24;
break;
case POST_DST_YUV420:
g_pPostReg->MODE |= OUTFMT_YUV | OUTYUV_YUV420;
break;
case POST_DST_YUV422_YCBYCR:
g_pPostReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_YCBYCR;
break;
case POST_DST_YUV422_CBYCRY:
g_pPostReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_CBYCRY;
break;
case POST_DST_YUV422_YCRYCB:
g_pPostReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_YCRYCB;
break;
case POST_DST_YUV422_CRYCBY:
g_pPostReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_CRYCBY;
break;
case POST_DST_FIFO_YUV444:
g_pPostReg->MODE |= OUTFMT_YUV | FIFO_OUT_ENABLE;
break;
case POST_DST_FIFO_RGB888:
g_pPostReg->MODE |= OUTFMT_RGB | FIFO_OUT_ENABLE;
break;
default:
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Destination Type %d)\n\r"), DstType));
return POST_ERROR_ILLEGAL_PARAMETER;
break;
}
POST_MSG((_T("[POST]--Post_set_mode() : %d\n\r"), error));
return error;
}
static TVSC_ERROR TVSC_set_mode(TVSC_OP_MODE Mode, TVSC_SCAN_MODE Scan, TVSC_SRC_TYPE SrcType, TVSC_DST_TYPE DstType)
{
TVSC_ERROR error = TVSC_SUCCESS;
TVSC_MSG((_T("[TVSC]++TVSC_set_mode(%d, %d, %d, %d)\n\r"), Mode, Scan, SrcType, DstType));
g_TVSCConfig.Mode = Mode;
g_TVSCConfig.Scan = Scan;
g_TVSCConfig.SrcType = SrcType;
g_TVSCConfig.DstType = DstType;
g_pTVSCReg->MODE = CLKVALUP_ALWAYS | CLKVAL_F(0) | CLKDIR_DIRECT | CLKSEL_F_HCLK | CSC_R2Y_WIDE | CSC_Y2R_WIDE | IRQ_LEVEL;
if (g_TVSCConfig.bIntEnable)
{
g_pTVSCReg->MODE |= TVSCINT_ENABLE;
}
if (Mode == TVSC_PER_FRAME_MODE)
{
g_pTVSCReg->MODE |= AUTOLOAD_DISABLE;
}
else if (Mode == TVSC_FREE_RUN_MODE)
{
g_pTVSCReg->MODE |= AUTOLOAD_ENABLE;
}
else
{
TVSC_ERR((_T("[TVSC:ERR] TVSC_set_mode() : Unknown Operation Mode %d)\n\r"), Mode));
error = TVSC_ERROR_ILLEGAL_PARAMETER;
}
if (Scan == TVSC_PROGRESSIVE)
{
g_pTVSCReg->MODE |= PROGRESSIVE;
}
else if (Mode == TVSC_INTERLACE)
{
g_pTVSCReg->MODE |= INTERLACE;
}
else
{
TVSC_ERR((_T("[TVSC:ERR] TVSC_set_mode() : Unknown Scan Mode %d)\n\r"), Scan));
error = TVSC_ERROR_ILLEGAL_PARAMETER;
}
switch(SrcType)
{
case TVSC_SRC_RGB16:
g_pTVSCReg->MODE |= SRCFMT_RGB | SRCRGB_RGB565 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case TVSC_SRC_RGB24:
g_pTVSCReg->MODE |= SRCFMT_RGB | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case TVSC_SRC_YUV420:
g_pTVSCReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV420 | SRC_NOT_INTERLEAVE;
break;
case TVSC_SRC_YUV422_YCBYCR:
g_pTVSCReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCBYCR;
break;
case TVSC_SRC_YUV422_CBYCRY:
g_pTVSCReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CBYCRY;
break;
case TVSC_SRC_YUV422_YCRYCB:
g_pTVSCReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCRYCB;
break;
case TVSC_SRC_YUV422_CRYCBY:
g_pTVSCReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CRYCBY;
break;
case TVSC_SRC_FIFO:
g_pTVSCReg->MODE |= FIFO_IN_ENABLE;
break;
default:
TVSC_ERR((_T("[TVSC:ERR] TVSC_set_mode() : Unknown Source Type %d)\n\r"), SrcType));
error = TVSC_ERROR_ILLEGAL_PARAMETER;
break;
}
switch(DstType)
{
case TVSC_DST_RGB16:
g_pTVSCReg->MODE |= OUTFMT_RGB | OUTRGB_RGB565;
break;
case TVSC_DST_RGB24:
g_pTVSCReg->MODE |= OUTFMT_RGB | OUTRGB_RGB24;
break;
case TVSC_DST_YUV420:
g_pTVSCReg->MODE |= OUTFMT_YUV | OUTYUV_YUV420;
break;
case TVSC_DST_YUV422_YCBYCR:
g_pTVSCReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_YCBYCR;
break;
case TVSC_DST_YUV422_CBYCRY:
g_pTVSCReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_CBYCRY;
break;
case TVSC_DST_YUV422_YCRYCB:
g_pTVSCReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_YCRYCB;
break;
case TVSC_DST_YUV422_CRYCBY:
g_pTVSCReg->MODE |= OUTFMT_YUV | OUTYUV_YUV422 | OUTYUV_CRYCBY;
break;
case TVSC_DST_FIFO_YUV444:
g_pTVSCReg->MODE |= OUTFMT_YUV | FIFO_OUT_ENABLE;
break;
case TVSC_DST_FIFO_RGB888:
g_pTVSCReg->MODE |= OUTFMT_RGB | FIFO_OUT_ENABLE;
break;
default:
TVSC_ERR((_T("[TVSC:ERR] TVSC_set_mode() : Unknown Destination Type %d)\n\r"), DstType));
error = TVSC_ERROR_ILLEGAL_PARAMETER;
break;
}
TVSC_MSG((_T("[TVSC]--TVSC_set_mode() : %d\n\r"), error));
return error;
}
