Exemplo n.º 1
0
int stm32f_serial_init(struct stm32f_serial_drv * drv, 
					   unsigned int baudrate, unsigned int flags)
{
	struct stm32_usart * uart = drv->uart;

	DCC_LOG1(LOG_TRACE, "UART=0x%08x", uart);
	DCC_LOG1(LOG_TRACE, "SERIAL_RX_FIFO_LEN=%d", SERIAL_RX_FIFO_LEN);
	DCC_LOG1(LOG_TRACE, "SERIAL_TX_FIFO_LEN=%d", SERIAL_TX_FIFO_LEN);
	DCC_LOG1(LOG_TRACE, "SERIAL_ENABLE_TX_MUTEX=%d", SERIAL_ENABLE_TX_MUTEX);

	drv->rx_flag = thinkos_flag_alloc(); 
	drv->tx_flag = thinkos_flag_alloc(); 
#if SERIAL_ENABLE_TX_MUTEX
	drv->tx_mutex = thinkos_mutex_alloc(); 
	DCC_LOG1(LOG_TRACE, "tx_mutex=%d", drv->tx_mutex);
#endif

	drv->tx_fifo.head = drv->tx_fifo.tail = 0;
	drv->rx_fifo.head = drv->rx_fifo.tail = 0;
	drv->txie = CM3_BITBAND_DEV(&uart->cr1, 7);
	thinkos_flag_give(drv->tx_flag);

	stm32_usart_init(uart);
	stm32_usart_baudrate_set(uart, baudrate);
	stm32_usart_mode_set(uart, SERIAL_8N1);

	/* enable RX interrupt */
	uart->cr1 |= USART_RXNEIE | USART_IDLEIE;

	/* enable UART */
	stm32_usart_enable(uart);

	return 0;
}
Exemplo n.º 2
0
struct file * uart_console_open(struct stm32f_usart * us)
{
	struct uart_console_dev * dev = &uart_console_dev;

	DCC_LOG(LOG_INFO, "...");
	dev->rx_flag = thinkos_flag_alloc(); 
#if ENABLE_UART_TX_BLOCK
	dev->tx_flag = thinkos_flag_alloc(); 
#endif
#if ENABLE_UART_TX_MUTEX
	dev->tx_mutex = thinkos_mutex_alloc(); 
#endif
	uart_fifo_init(&dev->tx_fifo, UART_TX_FIFO_BUF_LEN);
	uart_fifo_init(&dev->rx_fifo, UART_RX_FIFO_BUF_LEN);

	dev->txie = CM3_BITBAND_DEV(&us->cr1, 7);
	dev->uart = us;

	cm3_irq_pri_set(STM32F_IRQ_USART1, UART_IRQ_PRIORITY);
	cm3_irq_enable(STM32F_IRQ_USART1);

	/* enable RX interrupt */
	us->cr1 |= USART_RXNEIE | USART_IDLEIE;

	return (struct file *)&uart_console_file;
}
Exemplo n.º 3
0
struct serdrv * serdrv_init(unsigned int speed)
{
    struct serdrv * drv  = &serial2_dev;
    struct stm32_usart * uart = STM32_USART2;

    DCC_LOG1(LOG_MSG, "speed=%d", speed);

    drv->tx_fifo.head = drv->tx_fifo.tail = 0;
    drv->rx_fifo.head = drv->rx_fifo.tail = 0;
    drv->txie = CM3_BITBAND_DEV(&uart->cr1, 7);
    thinkos_flag_give(SERDRV_TX_FLAG);

    /* clock enable */
    stm32_clk_enable(STM32_RCC, STM32_CLK_USART2);

    /*********************************************
     * USART
     *********************************************/
    stm32_usart_init(uart);
    stm32_usart_baudrate_set(uart, speed);
    stm32_usart_mode_set(uart, SERIAL_8N1);

    /* Enable DMA for transmission and reception */
//	uart->cr3 |= USART_DMAT | USART_DMAR;
    /* enable idle line interrupt */
    /* enable RX interrupt */
    uart->cr1 |= USART_RXNEIE | USART_IDLEIE;

    /* enable UART */
    stm32_usart_enable(uart);

    /* configure interrupts */
    cm3_irq_pri_set(STM32_IRQ_USART2, IRQ_PRIORITY_LOW);
    /* enable interrupts */
    cm3_irq_enable(STM32_IRQ_USART2);

    return drv;
}