void Jit::Comp_FPU2op(MIPSOpcode op) {
CONDITIONAL_DISABLE;
int fs = _FS;
int fd = _FD;
switch (op & 0x3f)
{
case 5: //F(fd) = fabsf(F(fs)); break; //abs
fpr.SpillLock(fd, fs);
fpr.MapReg(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
PAND(fpr.RX(fd), M(ssNoSignMask));
break;
case 6: //F(fd) = F(fs); break; //mov
if (fd != fs) {
fpr.SpillLock(fd, fs);
fpr.MapReg(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
}
break;
case 7: //F(fd) = -F(fs); break; //neg
fpr.SpillLock(fd, fs);
fpr.MapReg(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
PXOR(fpr.RX(fd), M(ssSignBits2));
break;
case 4: //F(fd) = sqrtf(F(fs)); break; //sqrt
fpr.SpillLock(fd, fs); // this probably works, just badly tested
fpr.MapReg(fd, fd == fs, true);
SQRTSS(fpr.RX(fd), fpr.R(fs));
break;
case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break;//trunc.w.s
{
fpr.SpillLock(fs, fd);
fpr.StoreFromRegister(fd);
CVTTSS2SI(EAX, fpr.R(fs));
// Did we get an indefinite integer value?
CMP(32, R(EAX), Imm32(0x80000000));
FixupBranch skip = J_CC(CC_NE);
MOVSS(XMM0, fpr.R(fs));
XORPS(XMM1, R(XMM1));
CMPSS(XMM0, R(XMM1), CMP_LT);
// At this point, -inf = 0xffffffff, inf/nan = 0x00000000.
// We want -inf to be 0x80000000 inf/nan to be 0x7fffffff, so we flip those bits.
MOVD_xmm(R(EAX), XMM0);
XOR(32, R(EAX), Imm32(0x7fffffff));
SetJumpTarget(skip);
MOV(32, fpr.R(fd), R(EAX));
}
break;
case 32: //F(fd) = (float)FsI(fs); break; //cvt.s.w
// Store to memory so we can read it as an integer value.
fpr.StoreFromRegister(fs);
CVTSI2SS(XMM0, fpr.R(fs));
MOVSS(fpr.R(fd), XMM0);
break;
case 12: //FsI(fd) = (int)floorf(F(fs)+0.5f); break; //round.w.s
case 14: //FsI(fd) = (int)ceilf (F(fs)); break; //ceil.w.s
case 15: //FsI(fd) = (int)floorf(F(fs)); break; //floor.w.s
case 36: //FsI(fd) = (int) F(fs); break; //cvt.w.s
default:
DISABLE;
return;
}
fpr.ReleaseSpillLocks();
}
void Jit::Comp_FPU2op(u32 op)
{
CONDITIONAL_DISABLE;
int fs = _FS;
int fd = _FD;
switch (op & 0x3f)
{
case 5: //F(fd) = fabsf(F(fs)); break; //abs
fpr.Lock(fd, fs);
fpr.BindToRegister(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
PAND(fpr.RX(fd), M((void *)ssNoSignMask));
fpr.UnlockAll();
break;
case 6: //F(fd) = F(fs); break; //mov
if (fd != fs) {
fpr.Lock(fd, fs);
fpr.BindToRegister(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
fpr.UnlockAll();
}
break;
case 7: //F(fd) = -F(fs); break; //neg
fpr.Lock(fd, fs);
fpr.BindToRegister(fd, fd == fs, true);
MOVSS(fpr.RX(fd), fpr.R(fs));
PXOR(fpr.RX(fd), M((void *)ssSignBits2));
fpr.UnlockAll();
break;
case 12: //FsI(fd) = (int)floorf(F(fs)+0.5f); break; //round.w.s
case 4: //F(fd) = sqrtf(F(fs)); break; //sqrt
/* fpr.Lock(fd, fs); // this probably works, just badly tested
fpr.BindToRegister(fd, fd == fs, true);
SQRTSS(fpr.RX(fd), fpr.R(fs));
fpr.UnlockAll();
break;*/
Comp_Generic(op);
return;
case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break;//trunc.w.s
fpr.Lock(fs, fd);
fpr.StoreFromRegister(fd);
CVTTSS2SI(EAX, fpr.R(fs));
MOV(32, fpr.R(fd), R(EAX));
fpr.UnlockAll();
break;
case 14: //FsI(fd) = (int)ceilf (F(fs)); break; //ceil.w.s
case 15: //FsI(fd) = (int)floorf(F(fs)); break; //floor.w.s
case 32: //F(fd) = (float)FsI(fs); break; //cvt.s.w
case 36: //FsI(fd) = (int) F(fs); break; //cvt.w.s
default:
Comp_Generic(op);
return;
}
}
