/*
* ======== block ========
* This is a static function used by the block cache APIs.
*/
static Void block(Ptr blockPtr, SizeT byteCnt, Bool wait,
volatile UInt32 *barReg)
{
volatile UInt32 *bar;
volatile UInt32 *wc;
Int wordCnt;
UInt mask;
UInt32 alignAddr;
/*
* Get the base address and word count register.
* wc is one word after bar on c64x+ cache.
*/
bar = barReg;
wc = bar + 1;
/* word align the base address */
alignAddr = ((UInt32)blockPtr & ~3);
/* convert from byte to word since cache operation takes words */
wordCnt = (byteCnt + 3 + ((UInt32)blockPtr - alignAddr)) >> 2;
/* loop until word count is zero or less */
while (wordCnt > 0) {
/* critical section -- disable interrupts */
mask = Hwi_disable();
/* wait for any previous cache operation to complete */
while (*L2WWC != 0) {
/* open a window for interrupts */
Hwi_restore(mask);
/* disable interrupts */
mask = Hwi_disable();
}
/* get the emif config for the address */
Cache_module->emifAddr = getEmifCtrlAddr(alignAddr);
/* set the word address and number of words to invalidate */
*bar = alignAddr;
*wc = (wordCnt > MAXWC) ? MAXWC : wordCnt;
/* end of critical section -- restore interrupts */
Hwi_restore(mask);
/*
* reduce word count by _BCACHE_MAXWC and
* increase base address by BCACHE_MAXWC
*/
wordCnt -= MAXWC;
alignAddr += (MAXWC * sizeof(Int));
}
/* wait for cache operation to complete */
if (wait) {
Cache_wait();
}
}
/*
* ======== Mmu_disable ========
* Function to disable the MMU.
*/
Void Mmu_disable()
{
UInt16 type;
UInt key;
/* if MMU is alreay disabled, just return */
if (!(Mmu_isEnabled())) {
return;
}
key = Hwi_disable();
/* get the current enabled bits */
type = Cache_getEnabled();
if (type & Cache_Type_L1D) {
/* writeback invalidate all data cache */
Cache_wbInvAll();
/* drain the write buffer */
Cache_wait();
/* disable the L1 data cache */
Cache_disable(Cache_Type_L1D);
}
if (type & Cache_Type_L1P) {
/* invalidate all L1 program cache */
Cache_invL1pAll();
/* disable L1P cache */
Cache_disable(Cache_Type_L1P);
}
/* disables the MMU */
Mmu_disableAsm();
/* set cache back to initial settings */
Cache_enable(type);
Hwi_restore(key);
}
