/* Setup external memories */
STATIC void SystemSetupMemory(void)
{
/* Setup EMC Delays */
/* Move all clock delays together */
LPC_SCU->EMCDELAYCLK = ((CLK0_DELAY) | (CLK0_DELAY << 4) | (CLK0_DELAY << 8) | (CLK0_DELAY << 12));
/* Setup EMC Clock Divider for divide by 2 - this is done in both the CCU (clocking)
and CREG. For frequencies over 120MHz, a divider of 2 must be used. For frequencies
less than 120MHz, a divider of 1 or 2 is ok. */
Chip_Clock_EnableOpts(CLK_MX_EMC_DIV, true, true, 2);
LPC_CREG->CREG6 |= (1 << 16);
/* Enable EMC clock */
Chip_Clock_Enable(CLK_MX_EMC);
/* Init EMC Controller -Enable-LE mode */
Chip_EMC_Init(1, 0);
/* Init EMC Dynamic Controller */
Chip_EMC_Dynamic_Init((IP_EMC_DYN_CONFIG_T *) &MT48LC4M32_config);
/* Init EMC Static Controller CS0 */
Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_T *) &S29GL64N90_config);
/* Enable Buffer for External Flash */
LPC_EMC->STATICCONFIG0 |= 1 << 19;
}
/* Setup external memories */
STATIC void SystemSetupMemory(void)
{
/* Setup EMC Delays */
/* Move all clock delays together */
LPC_SCU->EMCDELAYCLK = ((CLK0_DELAY) | (CLK0_DELAY << 4) | (CLK0_DELAY << 8) | (CLK0_DELAY << 12));
/* Setup EMC Clock Divider for divide by 2 */
Chip_Clock_EnableOpts(CLK_MX_EMC_DIV, true, true, 2);
LPC_CREG->CREG6 |= (1 << 16);
Chip_Clock_Enable(CLK_MX_EMC);
/* Init EMC Controller -Enable-LE mode- clock ratio 1:1 */
Chip_EMC_Init(1, 0, 0);
/* Init EMC Dynamic Controller */
Chip_EMC_Dynamic_Init((IP_EMC_DYN_CONFIG_Type *) &IS42S16400_config);
/* Init EMC Static Controller CS2 */
Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_Type *) &IS62WV25616_config);
/* Init EMC Static Controller CS0 */
Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_Type *) &SST39VF320_config);
/* Enable Buffer for External Flash */
LPC_EMC->STATICCONFIG0 |= 1 << 19;
}
