/** To Register the ISRs with the underlying OS, if required */
void registerEdma3Interrupts (unsigned int edma3Id)
{
static UInt32 cookie = 0;
Int eventId = 0; /* GEM event id */
unsigned int numTc = 0;
/* Disabling the global interrupts */
cookie = Hwi_disable();
/* Transfer completion ISR */
CpIntc_dispatchPlug(ccXferCompInt[edma3Id][dsp_num],
lisrEdma3ComplHandler0,
edma3Id,
TRUE);
CpIntc_mapSysIntToHostInt(0, ccXferCompInt[edma3Id][dsp_num],
ccXferHostInt[edma3Id][dsp_num]);
CpIntc_enableHostInt(0, ccXferHostInt[edma3Id][dsp_num]);
eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);
EventCombiner_dispatchPlug (eventId, CpIntc_dispatch,
ccXferHostInt[edma3Id][dsp_num], TRUE);
EventCombiner_enableEvent(eventId);
/* CC Error ISR */
CpIntc_dispatchPlug(ccErrorInt[edma3Id], lisrEdma3CCErrHandler0,
edma3Id, TRUE);
CpIntc_mapSysIntToHostInt(0, ccErrorInt[edma3Id],
edma3ErrHostInt[edma3Id][dsp_num]);
/* TC Error ISR */
while (numTc < numEdma3Tc[edma3Id])
{
CpIntc_dispatchPlug(tcErrorInt[edma3Id][numTc],
(CpIntc_FuncPtr )(ptrEdma3TcIsrHandler[numTc]),
edma3Id, TRUE);
CpIntc_mapSysIntToHostInt(0, tcErrorInt[edma3Id][numTc],
edma3ErrHostInt[edma3Id][dsp_num]);
numTc++;
}
/* Enable the host interrupt which is common for both CC and TC error */
CpIntc_enableHostInt(0, edma3ErrHostInt[edma3Id][dsp_num]);
eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);
EventCombiner_dispatchPlug (eventId, CpIntc_dispatch,
edma3ErrHostInt[edma3Id][dsp_num], TRUE);
EventCombiner_enableEvent(eventId);
Hwi_enableInterrupt(hwiInterrupt);
/* enable the 'global' switch */
CpIntc_enableAllHostInts(0);
/* Restore interrupts */
Hwi_restore(cookie);
}
BOOL Intr_EnableEvent(Intr *pThis)
{
//CSL_Status intStat;
//If CIC Event is provided in Interrupt Table
if(pThis->oIntrTableParam.bCicRequired == TRUE)
{
//intStat = CSL_cicHwControl(pThis->CicHandle, CSL_CIC_CMD_EVTENABLE, NULL); // modified for new Chip
/* Enable the Host Interrupt. */
CpIntc_enableHostInt(0,pThis->oIntrTableParam.HostInt );
/* Enable the System Interrupt */
CpIntc_enableSysInt(0, pThis->oIntrTableParam.SysInt);
//if(intStat != CSL_SOK)
//{
// #ifdef _STE_APP
// LOG_TRACE0( "INTR : CIC HwControl to enable event ... Failed.\n");
// #endif
// return FALSE;
//}
}
//else
#ifdef _STE_APP
//Clear the Interrupt Flag Register before Enabling
//C64_clearIFR(1 << pThis->oIntrTableParam.eIntcVectorId );// DSPBIOS API
Hwi_clearInterrupt( pThis->oIntrTableParam.eIntcVectorId);// not sure this is the equivalent or not :(
//Enable the Vector interrupt
//C64_enableIER(1 << pThis->oIntrTableParam.eIntcVectorId );// DSP BIOS API
Hwi_enableInterrupt( pThis->oIntrTableParam.eIntcVectorId);// SYS BIOS API
#endif
#ifdef _STE_BOOT
intStat = CSL_intcHwControl(pThis->oIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);
if(intStat != CSL_SOK)
{
#ifdef DEBUG
printf("INTR: HwControl to enable event ... Failed.\n");
#endif
}
#endif
return TRUE;
}
