/*
** ===================================================================
** Method : Cpu_SetClockConfiguration (component MK22FN512VDC12)
**
** Description :
** Calling of this method will cause the clock configuration
** change and reconfiguration of all components according to
** the requested clock configuration setting.
** Parameters :
** NAME - DESCRIPTION
** ModeID - Clock configuration identifier
** Returns :
** --- - ERR_OK - OK.
** ERR_RANGE - Mode parameter out of range
** ===================================================================
*/
LDD_TError Cpu_SetClockConfiguration(LDD_TClockConfiguration ModeID)
{
if (ModeID > 0x03U) {
return ERR_RANGE; /* Undefined clock configuration requested requested */
}
if (0x03U == ClockConfigurationID) {
if ((CPU_CLOCK_CONFIG_1 == ModeID) || ( CPU_CLOCK_CONFIG_2 == ModeID))
return ERR_FAILED;
Cpu_SetMCGClockInModePEE(ModeID);
}
if (0x03U == ModeID) {
if ((CPU_CLOCK_CONFIG_1 == ClockConfigurationID) || ( CPU_CLOCK_CONFIG_2 == ClockConfigurationID))
return ERR_FAILED;
Cpu_SetMCGClockInModePEE(ModeID);
}
switch (ModeID) {
case CPU_CLOCK_CONFIG_0:
if (ClockConfigurationID == 2U) {
/* Clock configuration 0 and clock configuration 2 use different clock configuration */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,*/
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
}
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=2,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x03) |
SIM_CLKDIV1_OUTDIV4(0x02); /* Update system prescalers */
#if (BSPCFG_USB_CLK_FROM_IRC48M)
SIM_CLKDIV2 = 0;
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x03);
SIM_SCGC4 |= (SIM_SCGC4_USBOTG_MASK);
/* Enable IRC 48MHz for USB module */
USB_CLK_RECOVER_IRC_EN = 0x03;
#else
/* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(0x4) | SIM_CLKDIV2_USBFRAC_MASK; /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=0x01 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x01); /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=0 */
#endif
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_1:
if (ClockConfigurationID == 2U) {
/* Clock configuration 1 and clock configuration 2 use different clock configuration */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
}
/* SIM_CLKDIV1: OUTDIV1=9,OUTDIV2=9,OUTDIV3=9,OUTDIV4=9,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x09) |
SIM_CLKDIV1_OUTDIV2(0x09) |
SIM_CLKDIV1_OUTDIV3(0x09) |
SIM_CLKDIV1_OUTDIV4(0x09); /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(0x4) | SIM_CLKDIV2_USBFRAC_MASK;
/* SIM_SOPT2: PLLFLLSEL=0x01 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x01);
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_2:
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??*/
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
if ((MCG_C2 & MCG_C2_IRCS_MASK) == 0x00U) {
/* MCG_SC: FCRDIV=1 */
MCG_SC = (uint8_t)((MCG_SC & (uint8_t)~(uint8_t)(
MCG_SC_FCRDIV(0x06)
)) | (uint8_t)(
MCG_SC_FCRDIV(0x01)
));
} else {
/* MCG_C2: IRCS=0 */
MCG_C2 &= (uint8_t)~(uint8_t)(MCG_C2_IRCS_MASK);
while((MCG_S & MCG_S_IRCST_MASK) != 0x00U) { /* Check that the source internal reference clock is slow clock. */
}
/* MCG_SC: FCRDIV=1 */
MCG_SC = (uint8_t)((MCG_SC & (uint8_t)~(uint8_t)(
MCG_SC_FCRDIV(0x06)
)) | (uint8_t)(
MCG_SC_FCRDIV(0x01)
));
/* MCG_C2: IRCS=1 */
MCG_C2 |= MCG_C2_IRCS_MASK;
while((MCG_S & MCG_S_IRCST_MASK) == 0x00U) { /* Check that the source internal reference clock is fast clock. */
}
}
Cpu_SetMCG(1U); /* Update clock source setting */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x00) |
SIM_CLKDIV1_OUTDIV3(0x00) |
SIM_CLKDIV1_OUTDIV4(0x03); /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(0x4) | SIM_CLKDIV2_USBFRAC_MASK;
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x01); /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_3:
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Update system prescalers */
#if (BSPCFG_USB_CLK_FROM_IRC48M)
SIM_CLKDIV2 = 0;
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x03);
SIM_SCGC4 |= (SIM_SCGC4_USBOTG_MASK);
/* Enable IRC 48MHz for USB module */
USB_CLK_RECOVER_IRC_EN = 0x03;
#else
/* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(0x4) | SIM_CLKDIV2_USBFRAC_MASK;
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(0x01); /* Select PLL as a clock source for various peripherals */
#endif
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
default:
break;
}
LDD_SetClockConfiguration(ModeID); /* Call all LDD components to update the clock configuration */
ClockConfigurationID = ModeID; /* Store clock configuration identifier */
return ERR_OK;
}
/* ===================================================================*/
LDD_TError Cpu_SetClockConfiguration(LDD_TClockConfiguration ModeID)
{
if (ModeID > 0x02U) {
return ERR_RANGE; /* Undefined clock configuration requested requested */
}
switch (ModeID) {
case CPU_CLOCK_CONFIG_0:
if (ClockConfigurationID == 2U) {
/* Clock configuration 0 and clock configuration 2 use different clock configuration */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
}
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=2,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x02) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=0,USBFRAC=0 */
SIM_CLKDIV2 = (uint32_t)0x09UL; /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_1:
if (ClockConfigurationID == 2U) {
/* Clock configuration 1 and clock configuration 2 use different clock configuration */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
}
/* SIM_CLKDIV1: OUTDIV1=9,OUTDIV2=9,OUTDIV3=9,OUTDIV4=9,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x09) |
SIM_CLKDIV1_OUTDIV2(0x09) |
SIM_CLKDIV1_OUTDIV3(0x09) |
SIM_CLKDIV1_OUTDIV4(0x09); /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=0,USBFRAC=0 */
SIM_CLKDIV2 = (uint32_t)0x09UL; /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_2:
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=4,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x01) |
SIM_CLKDIV1_OUTDIV3(0x04) |
SIM_CLKDIV1_OUTDIV4(0x04); /* Set the system prescalers to safe value */
if ((MCG_C2 & MCG_C2_IRCS_MASK) == 0x00U) {
/* MCG_SC: FCRDIV=1 */
MCG_SC = (uint8_t)((MCG_SC & (uint8_t)~(uint8_t)(
MCG_SC_FCRDIV(0x06)
)) | (uint8_t)(
MCG_SC_FCRDIV(0x01)
));
} else {
/* MCG_C2: IRCS=0 */
MCG_C2 &= (uint8_t)~(uint8_t)(MCG_C2_IRCS_MASK);
while((MCG_S & MCG_S_IRCST_MASK) != 0x00U) { /* Check that the source internal reference clock is slow clock. */
}
/* MCG_SC: FCRDIV=1 */
MCG_SC = (uint8_t)((MCG_SC & (uint8_t)~(uint8_t)(
MCG_SC_FCRDIV(0x06)
)) | (uint8_t)(
MCG_SC_FCRDIV(0x01)
));
/* MCG_C2: IRCS=1 */
MCG_C2 |= MCG_C2_IRCS_MASK;
while((MCG_S & MCG_S_IRCST_MASK) == 0x00U) { /* Check that the source internal reference clock is fast clock. */
}
}
Cpu_SetMCG(1U); /* Update clock source setting */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0x00) |
SIM_CLKDIV1_OUTDIV2(0x00) |
SIM_CLKDIV1_OUTDIV3(0x00) |
SIM_CLKDIV1_OUTDIV4(0x03); /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=0,USBFRAC=0 */
SIM_CLKDIV2 = (uint32_t)0x09UL; /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=0 */
SIM_SOPT1 &= (uint32_t)~(uint32_t)(SIM_SOPT1_OSC32KSEL(0x03)); /* System oscillator drives 32 kHz clock for various peripherals */
break;
default:
break;
}
LDD_SetClockConfiguration(ModeID); /* Call all LDD components to update the clock configuration */
ClockConfigurationID = ModeID; /* Store clock configuration identifier */
return ERR_OK;
}
/*
** ===================================================================
** Method : Cpu_SetClockConfiguration (component MK40DN512MD10)
**
** Description :
** Calling of this method will cause the clock configuration
** change and reconfiguration of all components according to
** the requested clock configuration setting.
** Parameters :
** NAME - DESCRIPTION
** ModeID - Clock configuration identifier
** Returns :
** --- - ERR_OK - OK.
** ERR_RANGE - Mode parameter out of range
** ===================================================================
*/
LDD_TError Cpu_SetClockConfiguration(LDD_TClockConfiguration ModeID)
{
if (ModeID > 0x02U) {
return ERR_RANGE; /* Undefined clock configuration requested requested */
}
switch (ModeID) {
case CPU_CLOCK_CONFIG_0:
if (ClockConfigurationID == 2U) {
/* Clock configuration 0 and clock configuration 2 use different clock configuration */
/* MCG_C6: CME0=0 */
MCG_C6 &= (uint8_t)~(uint8_t)0x20U; /* Disable the clock monitor */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=3,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x01330000UL; /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
/* MCG_C6: CME0=1 */
MCG_C6 |= (uint8_t)0x20U; /* Enable the clock monitor */
}
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x01130000UL; /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=1,USBFRAC=0 */
SIM_CLKDIV2 = (uint32_t)((SIM_CLKDIV2 & (uint32_t)~0x0DUL) | (uint32_t)0x02UL); /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= (uint32_t)0x00010000UL; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=2 */
SIM_SOPT1 = (uint32_t)((SIM_SOPT1 & (uint32_t)~0x00040000UL) | (uint32_t)0x00080000UL); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_1:
if (ClockConfigurationID == 2U) {
/* Clock configuration 1 and clock configuration 2 use different clock configuration */
/* MCG_C6: CME0=0 */
MCG_C6 &= (uint8_t)~(uint8_t)0x20U; /* Disable the clock monitor */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=3,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x01330000UL; /* Set the system prescalers to safe value */
Cpu_SetMCG(0U); /* Update clock source setting */
/* MCG_C6: CME0=1 */
MCG_C6 |= (uint8_t)0x20U; /* Enable the clock monitor */
}
/* SIM_CLKDIV1: OUTDIV1=7,OUTDIV2=7,OUTDIV3=7,OUTDIV4=7,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x77770000UL; /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=1,USBFRAC=0 */
SIM_CLKDIV2 = (uint32_t)((SIM_CLKDIV2 & (uint32_t)~0x0DUL) | (uint32_t)0x02UL); /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= (uint32_t)0x00010000UL; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=2 */
SIM_SOPT1 = (uint32_t)((SIM_SOPT1 & (uint32_t)~0x00040000UL) | (uint32_t)0x00080000UL); /* System oscillator drives 32 kHz clock for various peripherals */
break;
case CPU_CLOCK_CONFIG_2:
/* MCG_C6: CME0=0 */
MCG_C6 &= (uint8_t)~(uint8_t)0x20U; /* Disable the clock monitor */
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=3,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x01330000UL; /* Set the system prescalers to safe value */
Cpu_SetMCG(1U); /* Update clock source setting */
/* SIM_CLKDIV1: OUTDIV1=1,OUTDIV2=1,OUTDIV3=1,OUTDIV4=7,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (uint32_t)0x11170000UL; /* Update system prescalers */
/* SIM_CLKDIV2: USBDIV=0,USBFRAC=0 */
SIM_CLKDIV2 &= (uint32_t)~0x0FUL; /* Update USB clock prescalers */
/* SIM_SOPT2: PLLFLLSEL=1 */
SIM_SOPT2 |= (uint32_t)0x00010000UL; /* Select PLL as a clock source for various peripherals */
/* SIM_SOPT1: OSC32KSEL=2 */
SIM_SOPT1 = (uint32_t)((SIM_SOPT1 & (uint32_t)~0x00040000UL) | (uint32_t)0x00080000UL); /* System oscillator drives 32 kHz clock for various peripherals */
break;
default:
break;
}
LDD_SetClockConfiguration(ModeID); /* Call all LDD components to update the clock configuration */
ClockConfigurationID = ModeID; /* Store clock configuration identifier */
return ERR_OK;
}
