/* Clears the specified flag status.*/
void UART001_ClearFlag
(
const UART001_HandleType* Handle,
UART001_FlagStatusType Flag
)
{
USIC_CH_TypeDef* UartRegs = Handle->UartRegs;
DBG002_FUNCTION_ENTRY(APP_GID,UART001_FUN_ENTRY);
/* <<<DD_UART001_API_7>>>*/
if(Flag <= UART001_ALT_REC_IND_FLAG)
{
UartRegs->PSCR |= ((uint32_t)0x01 << (uint32_t)Flag);
}
else if(Flag <= UART001_FIFO_ALTRECV_BUF_FLAG)
{
UartRegs->TRBSCR |= ((uint32_t)0x01 << \
((uint32_t)Flag - (uint32_t)UART001_FIFO_STD_RECV_BUF_FLAG));
}
else
{
UartRegs->TRBSCR |= ((uint32_t)0x01 << \
(((uint32_t)Flag - (uint32_t)UART001_FIFO_STD_RECV_BUF_FLAG) + \
UART001_FLAG_OFFSET ));
}
DBG002_FUNCTION_EXIT(APP_GID,UART001_FUN_EXIT);
}
/**
* This function reads the period register value which will be needed to
* find out the compare register values to get the required duty cycle.
*/
status_t PWMMP001_GetPeriodReg
(
const PWMMP001_HandleType * HandlePtr,
uint32_t * PeriodRegPtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint32_t LocalPeriod = 0U;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
/*<<<DD_PWMMP001_API_15_1>>>*/
if ((HandlePtr->DynamicHandle->State == PWMMP001_UNINITIALIZED))
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
/*<<<DD_PWMMP001_API_15_2>>>*/
else
{
Status = CCU8PWMLIB_GetPeriodReg(HandlePtr->PhaseHandlePtr[0], &LocalPeriod);
*PeriodRegPtr = LocalPeriod;
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/**
* This function checks whether given interrupt is set
*/
status_t CNT001_GetPendingEvent
(
const CNT001_HandleType * HandlePtr,
const CNT001_EventNameType Event,
uint8_t* EvtStatus
)
{
status_t Status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef* CC4yRegsPtr = HandlePtr->CC4Ptr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else
{
if(RD_REG(CC4yRegsPtr->INTS, ((uint32_t)0x01<<(uint8_t)Event),(uint8_t)Event))
{
*EvtStatus = (uint8_t)SET;
}
else
{
*EvtStatus = (uint8_t)RESET;
}
/* *EvtStatus = RD_REG(CC4yRegsPtr->INTS, (0x01<<(uint8_t)Event),(uint8_t)Event) ?\
(uint8_t)SET : (uint8_t)RESET; */
Status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return (Status);
}
/**
* This function initiates the shadow transfer for the period and compare register
*/
status_t PWMMP001_SWRequestShadowTransfer
(
const PWMMP001_HandleType* HandlePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
/*<<<DD_PWMMP001_API_10_1>>>*/
if ((HandlePtr->DynamicHandle->State == PWMMP001_UNINITIALIZED))
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
/*<<<DD_PWMMP001_API_10_2>>>*/
else
{
/* Call the last phase shadow transfer API which will initiate
* shadow transfer for all the phases to ensure concurrent update.
*/
Status = CCU8PWMLIB_SWRequestShadowTransfer
(HandlePtr->PhaseHandlePtr[HandlePtr->kNumPhases - 1U]);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/**
* This function clears the trap state of all the phases if exit control
* from trap state is SW exit.
*/
status_t PWMMP001_ResetTrapFlag
(
const PWMMP001_HandleType* HandlePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
/*<<<DD_PWMMP001_API_13_1>>>*/
if ((HandlePtr->DynamicHandle->State == PWMMP001_RUNNING) ||
(HandlePtr->DynamicHandle->State == PWMMP001_INITIALIZED))
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
/*<<<DD_PWMMP001_API_13_2>>>*/
else
{
do
{
Status = CCU8PWMLIB_ResetTrapFlag(
HandlePtr->PhaseHandlePtr[PhaseNumber]);
PhaseNumber++;
} while((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/* This Function stops the CCU4_CCy slice timer and stops the app*/
status_t CNT001_Stop(const CNT001_HandleType *HandlePtr )
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef *CCU4Ptr; /* Pointer to the CCU4 Register set */
CCU4_GLOBAL_TypeDef *CCU4KernelPtr; /* Pointer to the CCU4 Kernel Register set */
CCU4Ptr = HandlePtr->CC4Ptr;
CCU4KernelPtr = HandlePtr->CC4KernalPtr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_4_1>>>*/
if (HandlePtr->DynamicHandlePtr->State != CNT001_RUNNING)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else
{
/*<<<DD_CNT001_API_4_2>>>*/
/* Clear the Run Bit in TCCLR register */
CCU4Ptr->TCCLR |= CNT001_CCU4_TCCLR_CLEAR;
/* Clear the Interrupts in SWR register */
CCU4Ptr->SWR = CNT001_ALL_CCU4_INTR_CLEAR ;
/* Set the IDLE mode in GIDLS Register */
CCU4KernelPtr->GIDLS |= (uint32_t)(((uint32_t)0x01 << \
((uint32_t)CCU4_GIDLS_SS0I_Pos + (uint32_t)HandlePtr->CCUInUse)));
HandlePtr->DynamicHandlePtr->EvtCounterValue = 0x00U;
HandlePtr->DynamicHandlePtr->NewCountMatch = 0x00U;
HandlePtr->DynamicHandlePtr->State = CNT001_INITIALIZED;
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
/* This Function starts the CCU4_CCy slice timer and starts the app. */
status_t CNT001_Start(const CNT001_HandleType * HandlePtr )
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef *CCU4Ptr; /* Pointer to the CCU4 Register set */
CCU4_GLOBAL_TypeDef *CCU4KernelPtr; /* Pointer to the CCU4 Kernel Register set */
CCU4Ptr = HandlePtr->CC4Ptr;
CCU4KernelPtr = HandlePtr->CC4KernalPtr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_3_1>>> */
if (HandlePtr->DynamicHandlePtr->State != CNT001_INITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}/*End of "if( HandlePtr->DynamicHandlePtr->State != CNT001_INITIALIZED )" */
else
{
/*<<<DD_CNT001_API_3_2>>> */
/* Clear IDLE mode. */
SET_BIT(CCU4KernelPtr->GIDLC,
((uint32_t)CCU4_GIDLC_CS0I_Pos + (uint32_t)HandlePtr->CCUInUse));
/* Set the Run bit of the Slice in TCSET Register */
SET_BIT( CCU4Ptr->TCSET,CCU4_CC4_TCSET_TRBS_Pos );
/* Set the App State to Running State */
HandlePtr->DynamicHandlePtr->State = CNT001_RUNNING;
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
/**
* This function clears the enable event bit for the event given in the argument.
*/
status_t PWMMP001_DisableEvent
(
const PWMMP001_HandleType * HandlePtr,
const PWMMP001_PhaseType PhaseNo,
const PWMMP001_EventNameType Event
)
{
status_t Status = (uint32_t) PWMMP001_OPER_NOT_ALLOWED_ERROR;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, PWMMP001_FUNCTION_ENTRY);
if (HandlePtr->DynamicHandle->State == PWMMP001_UNINITIALIZED)
{
Status = (uint32_t) PWMMP001_OPER_NOT_ALLOWED_ERROR;
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
else if(HandlePtr->PhaseHandlePtr[(uint32_t)PhaseNo -1U] == NULL)
{
Status = (uint32_t) PWMMP001_INVALID_PARAM_ERROR;
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
else
{
Status = CCU8PWMLIB_DisableEvent(
HandlePtr->PhaseHandlePtr[(uint32_t)PhaseNo -1U],
(CCU8PWMLIB_EventNameType)Event);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, PWMMP001_FUNCTION_EXIT);
return (Status);
}
/**
* This function changes the PWM frequency and duty cycle.
*
*/
status_t PWMMP001_SetPwmFreqAndDutyCycle
(
const PWMMP001_HandleType* HandlePtr,
float PwmFreq,
const PWMMP001_DutyCycleType* DutyCyclePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
if(HandlePtr->DynamicHandle->State != PWMMP001_UNINITIALIZED)
{
/*<<<DD_PWMMP001_API_16_1>>>*/
/*<<<DD_PWMMP001_API_16_2>>>*/
/* check if frequency is not zero */
if (PwmFreq == (float)RESET)
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
}
else
{
/*<<<DD_PWMMP001_API_16_2>>>*/
for (PhaseNumber = 0U; PhaseNumber < HandlePtr->kNumPhases; ++PhaseNumber)
{
/* check if duty cycle is within 0 to 100 */
if ((DutyCyclePtr->DutyCycle[PhaseNumber] > (float)100.0) ||
(DutyCyclePtr->DutyCycle[PhaseNumber] < (float)0.0))
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
break;
}
}
if (Status != (uint32_t)PWMMP001_INVALID_PARAM_ERROR)
{
PhaseNumber = 0U;
/*<<<DD_PWMMP001_API_16_3>>>*/
do
{
Status = CCU8PWMLIB_SetPwmFreqAndDutyCycle(
HandlePtr->PhaseHandlePtr[PhaseNumber],
PwmFreq,
DutyCyclePtr->DutyCycle[PhaseNumber],
DutyCyclePtr->Offset[PhaseNumber],
DutyCyclePtr->Sign[PhaseNumber]
);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
}
}
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/* Function provide to reset the App to default values. */
void UART001_DeInit (const UART001_HandleType* Handle)
{
/* <<<DD_UART001_API_2>>> */
DBG002_FUNCTION_ENTRY(APP_GID,UART001_FUN_ENTRY);
DBG002_FUNCTION_EXIT(APP_GID,UART001_FUN_EXIT);
}
/**
* This function starts the PWMMP001 App.
* It enables the interrupts and clears
* IDLE mode of the CCU8 slices by calling CCU8PWMLIB_Start API.
* It sets the CCUCON bit to 1 for simultaneous start of the slices.
*/
status_t PWMMP001_Start(const PWMMP001_HandleType* HandlePtr)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
/*<<<DD_PWMMP001_API_3_1>>>*/
if ((HandlePtr->DynamicHandle->State != PWMMP001_INITIALIZED) &&
(HandlePtr->DynamicHandle->State != PWMMP001_STOPPED))
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
else
{
if(HandlePtr->SCUSyncStart == 0U)
{
do
{
Status = CCU8PWMLIB_Start(HandlePtr->PhaseHandlePtr[PhaseNumber]);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
else
{
PWMMP001_DisableGlobalStart(HandlePtr);
do
{
Status = CCU8PWMLIB_EnableExtStart(HandlePtr->PhaseHandlePtr[PhaseNumber]);
Status = CCU8PWMLIB_Start(HandlePtr->PhaseHandlePtr[PhaseNumber]);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
/*<<<DD_PWMMP001_API_3_2>>>*/
/* Set the CCUCON register bit and then immediately reset to
* avoid spurious start
*/
PWMMP001_EnableGlobalStart(HandlePtr);
PWMMP001_DisableGlobalStart(HandlePtr);
PhaseNumber = 0U;
/* Disable External start feature to avoid spurious restarting of the slices */
do
{
Status = CCU8PWMLIB_DisableExtStart(HandlePtr->PhaseHandlePtr[PhaseNumber]);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
HandlePtr->DynamicHandle->State = PWMMP001_RUNNING;
Status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/**
* This function changes the duty cycle of the PWM waveforms. Duty cycle is given
* in terms of the % duty cycle value, offset and the sign of the offset.
* Offset is needed to get the asymmetric waveform where ON time is shifted with respect
* to central line.
*/
status_t PWMMP001_SetDutyCycle
(
const PWMMP001_HandleType* HandlePtr,
const PWMMP001_DutyCycleType* DutyCyclePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
if(HandlePtr->DynamicHandle->State != PWMMP001_UNINITIALIZED)
{
/*<<<DD_PWMMP001_API_5_1>>>*/
/*<<<DD_PWMMP001_API_5_2>>>*/
for (PhaseNumber = 0U; PhaseNumber < HandlePtr->kNumPhases; ++PhaseNumber)
{
/* check if duty cycle is within 0 to 100 */
if ((DutyCyclePtr->DutyCycle[PhaseNumber] > (float)100.0) ||
(DutyCyclePtr->DutyCycle[PhaseNumber] < (float)0.0))
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
break;
}
}
if (Status != (uint32_t)PWMMP001_INVALID_PARAM_ERROR)
{
/*<<<DD_PWMMP001_API_5_3>>>*/
/*Call CCU8PWMLIB_SetDutyCycle() API from CCU8_PWMSinglePhaseDT_CCU8PWMLIB*/
PhaseNumber = 0U;
do
{
Status = CCU8PWMLIB_SetDutyCenterAlignAsymmetric(
(const void*)HandlePtr->PhaseHandlePtr[PhaseNumber],
DutyCyclePtr->DutyCycle[PhaseNumber],
DutyCyclePtr->Offset[PhaseNumber],
DutyCyclePtr->Sign[PhaseNumber]);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
}
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/* This Function resets the CCU4_CCy slice and the app */
status_t CNT001_Deinit(const CNT001_HandleType *HandlePtr )
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef *CCU4Ptr; /* Pointer to the CCU4 Register Set */
CCU4_GLOBAL_TypeDef *CCU4KernelPtr; /* Pointer to the CCU4 Kernel Register Set */
CCU4Ptr = HandlePtr->CC4Ptr;
CCU4KernelPtr = HandlePtr->CC4KernalPtr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_2_1>>> */
/* If current state is running, then stop the App first */
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
/*End of "if( HandlePtr->DynamicHandlePtr->State == CNT001_RUNNING )" */
else
{
/* Clear the Run Bit in TCCLR register */
CCU4Ptr->TCCLR |= CNT001_CCU4_TCCLR_CLEAR;
/* Clear the Interrupts in SWR register */
CCU4Ptr->SWR = CNT001_ALL_CCU4_INTR_CLEAR ;
/* Disable the Interrupts in INTE Register */
CCU4Ptr->INTE = CNT001_CCUx_INTE_RESET;
/*<<<DD_CNT001_API_2_2>>> */
/* Set the IDLE mode */
CCU4KernelPtr->GIDLS |= (uint32_t)(((uint32_t)0x01 << \
((uint32_t)CCU4_GIDLS_SS0I_Pos + (uint32_t)HandlePtr->CCUInUse)));
/* Reset Input Selector Register */
CCU4Ptr->INS = CNT001_CCUx_INS_RESET;
/* Reset CMC Register */
CCU4Ptr->CMC = CNT001_CCUx_CMC_RESET;
/* Reset TC Register */
CCU4Ptr->TC = CNT001_CCUx_TC_RESET;
/* Reset CRS Register */
CCU4Ptr->CRS = CNT001_CCUx_CRS_RESET;
/* Reset PRS Register */
CCU4Ptr->PRS = CNT001_CCUx_PRS_RESET;
/*Clear dynamic structure variables.*/
HandlePtr->DynamicHandlePtr->EvtCounterValue = 0x00U;
HandlePtr->DynamicHandlePtr->NewCountMatch = 0x00U;
/* Set the state to Uninitialized */
HandlePtr->DynamicHandlePtr->State = CNT001_UNINITIALIZED;
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
/* This function will initialize node with the given handle */
void CAN001_Init(void)
{
DBG002_FUNCTION_ENTRY(DBG002_GID_CAN001,CAN001_FUNCTION_ENTRY);
/* Calling CANGLOBAL App Initialization */
CANGLOBAL_Init();
/* Node2 initialization */
CAN001_lNodeInit(&CAN001_Handle0);
/* LMO1 Initialization */
(void)CAN001_ConfigMsgObj(&CAN001_Handle0,&CAN001_MessageHandle0_1,1U);
/* Enable receive interrupt */
EnableMOInterrupt(CAN001_Handle0,(uint32_t)CAN_MO_RECEIVE_INTERRUPT,1);
/* LMO2 Initialization */
(void)CAN001_ConfigMsgObj(&CAN001_Handle0,&CAN001_MessageHandle0_2,2U);
DBG002_FUNCTION_EXIT(DBG002_GID_CAN001,CAN001_FUNCTION_EXIT);
}
/* This function will initialize node with the given handle */
static void CAN001_lNodeInit(const CAN001_HandleType* Handle)
{
uint32_t Count = 0U;
uint8_t MsgNo;
CAN_MO_TypeDef* CAN_MOxRegs = CAN_MO0;
/* <<<DD_CAN001_nonAPI_4>>> */
/* Map to node register offset as per node ID */
CAN_NODE_TypeDef* CAN_NodexRegs = Handle->CanNodeRegs;
DBG002_FUNCTION_ENTRY(DBG002_GID_CAN001,CAN001_FUNCTION_ENTRY);
/*<<<DD_CAN001_API_1>>>*/
/* wait until panel has finished initialization */
while ( (CAN->PANCTR & CAN_PANCTR_BUSY_Msk))
{}
/* set CCE and INIT bit NCR for node configuration */
/* Enable Alert and last error code interrupt */
CAN_NodexRegs->NCR |= ((uint32_t)CAN_NODE_NCR_INIT_Msk | (uint32_t)CAN_NODE_NCR_CCE_Msk);
/* Configure bit timing register */
CAN_NodexRegs->NBTR = ((uint32_t)Handle->BaudRate.DIV8 << \
CAN_NODE_NBTR_DIV8_Pos) | \
((uint32_t)Handle->BaudRate.TimeSEG2 << \
CAN_NODE_NBTR_TSEG2_Pos) | \
((uint32_t)Handle->BaudRate.TimeSEG1 << \
CAN_NODE_NBTR_TSEG1_Pos) | \
((uint32_t)Handle->BaudRate.SyncJumpWidth << \
CAN_NODE_NBTR_SJW_Pos) | \
(uint32_t)Handle->BaudRate.BaudRatePresc;
/* Check whether loop back mode is to be enabled */
if ( Handle->LoopBackModeEn == CAN001_ENABLE)
{
SET_BIT(CAN_NodexRegs->NPCR, CAN_NODE_NPCR_LBM_Pos);
}
/* Allocate required number of message object to node list
* and configure message object */
for(Count = 0U; Count < Handle->NodeMONo; Count++)
{
CAN001_lAllocateMOtoNodeList(Handle->NodeID, (uint8_t)(Handle->FirstMOMapping + Count));
MsgNo = (uint8_t)(Handle->FirstMOMapping + Count);
CAN_MOxRegs = GET_MO_OFFSET(MsgNo);
/* Configure MPN */
CAN_MOxRegs->MOIPR = (((uint32_t)Handle->NodeID << \
(CAN_MO_MOIPR_MPN_Pos + 5)) | \
(Count << CAN_MO_MOIPR_MPN_Pos));
}
DBG002_FUNCTION_EXIT(DBG002_GID_CAN001,CAN001_FUNCTION_EXIT);
}
uint32_t UART001_ReadDataMultiple\
(const UART001_HandleType* Handle,uint16_t* DataPtr,uint32_t Count)
{
uint32_t ReadCount = 0x00U;
USIC_CH_TypeDef* UartRegs = Handle->UartRegs;
DBG002_FUNCTION_ENTRY(APP_GID,UART001_FUN_ENTRY);
/* <<<DD_UART001_API_1>>>*/
while(! USIC_ubIsRxFIFOempty(UartRegs) && Count)
{
*DataPtr = (uint16_t)UartRegs->OUTR;
Count--;
ReadCount++;
DataPtr++;
}
DBG002_FUNCTION_EXIT(APP_GID,UART001_FUN_EXIT);
return ReadCount;
}
/**
* This function changes the PWM frequency and duty cycle.
* Frequency is given in terms of the period register value
* and duty cycle in terms of the compare register value.
*
*/
status_t PWMMP001_SetPeriodAndCompare
(
const PWMMP001_HandleType* HandlePtr,
uint32_t PwmFreq,
const PWMMP001_DutyCycleType* DutyCyclePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
uint8_t Index = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
if(HandlePtr->DynamicHandle->State != PWMMP001_UNINITIALIZED)
{
/*<<<DD_PWMMP001_API_6_2>>>*/
if ((PwmFreq > (uint32_t)PWMMP001_MAXVAL) || (PwmFreq == (uint32_t)RESET))
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
}
else
{
do
{
Status = CCU8PWMLIB_SetPeriodAndCompare(
HandlePtr->PhaseHandlePtr[PhaseNumber],
PwmFreq,
DutyCyclePtr->CompReg[Index],
DutyCyclePtr->CompReg[Index+1U]
);
Index = Index + 2U;
PhaseNumber++;
/*HandlePtr->DynamicHandle->PeriodReg = PwmFreq;*/
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
}
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/* This Function reads the Count Match value. At this value, compare match interrupt is generated
* if it is enabled */
status_t CNT001_GetCountMatch(const CNT001_HandleType *HandlePtr, uint32_t* CompRegVal)
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_6_1>>> */
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else
{
/*<<<DD_CNT001_API_6_2>>> */
*CompRegVal = HandlePtr->DynamicHandlePtr->NewCountMatch;
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
status_t CAN001_SendRemoteFrame(const CAN001_HandleType* Handle, uint8_t MsgObjnr)
{
uint32_t Error = 0U;
uint8_t MsgNo = (uint8_t)(Handle->FirstMOMapping+(MsgObjnr-1U));
/* Mapping to message object offset value*/
CAN_MO_TypeDef* CAN_MOxRegs = \
GET_MO_OFFSET(MsgNo);
/*<<<DD_CAN001_API_5>>>*/
DBG002_FUNCTION_ENTRY(DBG002_GID_CAN001,CAN001_FUNCTION_ENTRY);
DBG002_N ((MsgObjnr == 0U)||(MsgObjnr > Handle->NodeMONo));
/* check if message object is a receive message object */
/*<<<DD_CAN001_API_5_1>>>*/
if( RD_REG(CAN_MOxRegs->MOSTAT, CAN_MO_MOSTAT_DIR_Msk, \
CAN_MO_MOSTAT_DIR_Pos) != (uint32_t)RECMSGOBJ)
{
Error = (uint32_t)CAN001_MO_NOT_ACCEPTABLE;
DBG002_ERROR(DBG002_GID_CAN001,Error, 0, NULL);
}
/* check if message is disabled */
else if( RD_REG(CAN_MOxRegs->MOSTAT, CAN_MO_MOSTAT_MSGVAL_Msk, \
CAN_MO_MOSTAT_MSGVAL_Pos) == 0U)
{
Error = (uint32_t)CAN001_MSGOBJ_DISABLED;
DBG002_INFO(DBG002_GID_CAN001,Error, 0, NULL);
}
/* check if transmission is ongoing on message object */
/*<<<DD_CAN001_API_5_2>>>*/
else if( RD_REG(CAN_MOxRegs->MOSTAT, CAN_MO_MOSTAT_TXRQ_Msk, \
CAN_MO_MOSTAT_TXRQ_Pos) == 1U)
{
Error = (uint32_t)CAN001_MO_BUSY;
DBG002_INFO(DBG002_GID_CAN001,Error, 0, NULL);
}
else
{
/* Put transmit request to message object */
/*<<<DD_CAN001_API_5_3>>>*/
CAN_MOxRegs->MOCTR = CAN_MO_MOCTR_SETTXRQ_Msk;
Error = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(DBG002_GID_CAN001,CAN001_FUNCTION_EXIT);
return Error;
}
/**
* This function changes the duty cycle of the PWM waveforms. Duty cycle is given
* in terms of the compare register 1 value and compare register 2 value.
*/
status_t PWMMP001_SetCompare
(
const PWMMP001_HandleType* HandlePtr,
const PWMMP001_DutyCycleType* DutyCyclePtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
uint8_t Index = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
do
{
/*<<<DD_PWMMP001_API_15_1>>>*/
if ((HandlePtr->DynamicHandle->State == PWMMP001_UNINITIALIZED))
{
break;
}
/*<<<DD_PWMMP001_API_15_2>>>*/
/*<<<DD_PWMMP001_API_15_3>>>*/
/*Call CCU8PWMLIB_SetCompare() API from CCU8_PWMSinglePhaseDT_CCU8PWMLIB*/
PhaseNumber = 0U;
do
{
Status = CCU8PWMLIB_SetCompare(
HandlePtr->PhaseHandlePtr[PhaseNumber],
DutyCyclePtr->CompReg[Index],
DutyCyclePtr->CompReg[Index+1U]
);
Index = Index + 2U;
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
} while (0);
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/* This Function gets the timer count value which is the number of events counted till now */
status_t CNT001_GetEvtCountValue(const CNT001_HandleType *HandlePtr, uint32_t *NumEvents )
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef *CCU4Ptr; /* Pointer to the CCU4 Register set */
CCU4Ptr = HandlePtr->CC4Ptr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_5_1>>>*/
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else
{
*NumEvents = RD_REG(CCU4Ptr->TIMER, (uint32_t)CCU4_CC4_TIMER_TVAL_Msk,\
(uint32_t)CCU4_CC4_TIMER_TVAL_Pos);
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
status_t CAN001_ConfigMsgObj
(
const CAN001_HandleType* Handle,
const CAN001_MessageHandleType* SwMsgObjptr,
uint8_t MsgObjnr
)
{
uint32_t Error = (uint32_t)CAN001_MO_NOT_FOUND;
uint8_t MsgNo = (uint8_t)(Handle->FirstMOMapping+(MsgObjnr-1U));
/* Mapping to message object offset value*/
CAN_MO_TypeDef* CAN_MOxRegs = \
GET_MO_OFFSET(MsgNo);
/* <<<DD_CAN001_API_3>>> */
DBG002_FUNCTION_ENTRY(DBG002_GID_CAN001,CAN001_FUNCTION_ENTRY);
DBG002_N((MsgObjnr == 0U)||(MsgObjnr > Handle->NodeMONo));
if (((SwMsgObjptr->IDExten != (uint8_t)STANDARDTYPE) && \
(SwMsgObjptr->IDExten != (uint8_t)EXTENDEDTYPE))
||((SwMsgObjptr->MsgObjEN != CAN001_ENABLE) && (SwMsgObjptr->MsgObjEN != CAN001_DISABLE))
||((SwMsgObjptr->MsgObjType != RECMSGOBJ) && (SwMsgObjptr->MsgObjType != TRANSMSGOBJ)))
{
Error = (uint32_t)CAN001_INVALID_INPUT;
ERROR(DBG002_GID_CAN001,Error, 0, NULL);
}
/* check if message object is to be disabled */
/*<<<DD_CAN001_API_3_1>>>*/
else if (SwMsgObjptr->MsgObjEN == CAN001_DISABLE)
{
/* Reset MSGVAL bit */
CAN_MOxRegs->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk;
Error = (uint32_t)DAVEApp_SUCCESS;
} /* if (SwMsgObjptr->MsgObjEN == CAN001_DISABLE) */
else
{
CAN001_lConfigMORegs(SwMsgObjptr, (uint8_t)(Handle->FirstMOMapping+(MsgObjnr-1U)));
Error = (uint32_t)DAVEApp_SUCCESS;
} /*if (SwMsgObjptr->MsgObjEN == CAN001_ENABLE)*/
DBG002_FUNCTION_EXIT(DBG002_GID_CAN001,CAN001_FUNCTION_EXIT);
return Error;
}
/* This Function sets the event Count Match. This is the compare register value of the CCU4x_CCy slice */
status_t CNT001_SetCountMatch(const CNT001_HandleType *HandlePtr, uint32_t CountMatch)
{
status_t status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef *CCU4Ptr; /* Pointer to the CCU4 Register set */
CCU4_GLOBAL_TypeDef *CCU4KernelPtr; /* Pointer to the CCU4 Kernel Register set */
CCU4Ptr = HandlePtr->CC4Ptr;
CCU4KernelPtr = HandlePtr->CC4KernalPtr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/*<<<DD_CNT001_API_7_1>>>*/
if (HandlePtr->DynamicHandlePtr->State != CNT001_INITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else if( CountMatch > CNT001_EVENT_COUNT_MAX )
{
status = (uint32_t)CNT001_OUT_OF_RANGE_ERROR;
}
else
{
/*<<<DD_CNT001_API_7_5>>>*/
/* Update the Count match value in CRS Register */
WR_REG(CCU4Ptr->CRS, (uint32_t)CCU4_CC4_CRS_CRS_Msk, \
(uint32_t)CCU4_CC4_CRS_CRS_Pos,CountMatch);
/* Request SW Shadow Transfer */
CCU4KernelPtr->GCSS |=
(uint32_t)((0x01UL << ((uint32_t)4 * (uint32_t)HandlePtr->CCUInUse)));
/* Update the Dynamic HandlePtr */
HandlePtr->DynamicHandlePtr ->NewCountMatch = CountMatch;
status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return status;
}
/**
* This function reads the period register, compare register and
* timer register value.
*/
status_t PWMMP001_GetTimerRegsVal
(
const PWMMP001_HandleType * HandlePtr,
CCU8PWMLIB_TimerRegsType * const*TimerRegsPtr
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
/*<<<DD_PWMMP001_API_9_1>>>*/
if ((HandlePtr->DynamicHandle->State == PWMMP001_UNINITIALIZED))
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
else
{
/*<<<DD_PWMMP001_API_9_2>>>*/
do
{
if (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL)
{
Status = CCU8PWMLIB_GetTimerRegsVal(
HandlePtr->PhaseHandlePtr[PhaseNumber],
TimerRegsPtr[PhaseNumber]);
}
else
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
break;
}
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/**
* This function changes the PWM frequency. Frequency is given in hertz.
*
*/
status_t PWMMP001_SetPwmFreq
(
const PWMMP001_HandleType* HandlePtr,
float PwmFreq
)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = (uint8_t)0;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
if ((HandlePtr->DynamicHandle->State != PWMMP001_UNINITIALIZED))
{
/*<<<DD_PWMMP001_API_16_1>>>*/
/*<<<DD_PWMMP001_API_16_2>>>*/
/* check if frequency is not zero */
if (PwmFreq == (float)0.0)
{
Status = (uint32_t)PWMMP001_INVALID_PARAM_ERROR;
}
else
{
/*<<<DD_PWMMP001_API_16_3>>>*/
do
{
Status = CCU8PWMLIB_SetPwmFreq(HandlePtr->PhaseHandlePtr[PhaseNumber],
PwmFreq);
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) &&
(Status == (uint32_t)DAVEApp_SUCCESS)&& (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
}
}
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
/**
* This function sets the interrupt by software Interrupt pulse is generated
* if source is enabled.
*/
status_t CNT001_SetPendingEvent
(
const CNT001_HandleType * HandlePtr,
const CNT001_EventNameType Event
)
{
status_t Status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef* CC4yRegsPtr = HandlePtr->CC4Ptr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
else
{
SET_BIT(CC4yRegsPtr->SWS, (uint8_t)Event);
Status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return (Status);
}
status_t UART001_GetFlagStatus
(
const UART001_HandleType* Handle,
UART001_FlagStatusType Flag
)
{
status_t Status = (status_t)UART001_RESET;
uint32_t TempValue = 0x00U;
USIC_CH_TypeDef* UartRegs = Handle->UartRegs;
DBG002_FUNCTION_ENTRY(APP_GID,UART001_FUN_ENTRY);
/* <<<DD_UART001_API_6>>>*/
if(Flag <= UART001_ALT_REC_IND_FLAG)
{
TempValue = UartRegs->PSR_ASCMode;
TempValue &= ((uint32_t)0x01 << (uint32_t)Flag);
}
else if(Flag <= UART001_FIFO_ALTRECV_BUF_FLAG)
{
TempValue = UartRegs->TRBSR;
TempValue &= ((uint32_t)0x01 << \
((uint32_t)Flag - (uint32_t)UART001_FIFO_STD_RECV_BUF_FLAG));
}
else
{
TempValue = UartRegs->TRBSR;
TempValue &= ((uint32_t)0x01 << \
(((uint32_t)Flag - (uint32_t)UART001_FIFO_STD_RECV_BUF_FLAG) + 0x05U ));
}
if(TempValue != 0x00U)
{
Status = (status_t)UART001_SET;
}
DBG002_FUNCTION_EXIT(APP_GID,UART001_FUN_EXIT);
return Status;
}
uint32_t UART001_WriteDataMultiple
(
const UART001_HandleType* Handle,
uint16_t* DataPtr,
uint32_t Count
)
{
uint32_t WriteCount = 0x00U;
USIC_CH_TypeDef* UartRegs = Handle->UartRegs;
DBG002_FUNCTION_ENTRY(APP_GID,UART001_FUN_ENTRY);
/* <<<DD_UART001_API_2>>>*/
while(! USIC_IsTxFIFOfull(UartRegs)&& Count)
{
UartRegs->IN[0] = *DataPtr;
Count--;
WriteCount++;
DataPtr++;
}
DBG002_FUNCTION_EXIT(APP_GID,UART001_FUN_EXIT);
return WriteCount;
}
/**
* This function resets the timer to zero.
*/
status_t CNT001_ResetCounter
(
const CNT001_HandleType * HandlePtr
)
{
status_t Status = (uint32_t)CNT001_OPER_NOT_ALLOWED_ERROR;
CCU4_CC4_TypeDef* CC4yRegsPtr = HandlePtr->CC4Ptr;
DBG002_FUNCTION_ENTRY(APP_GID, (uint32_t)CNT001_FUNCTION_ENTRY);
/* This function is not allowed in the UNINITIALIZED state */
if (HandlePtr->DynamicHandlePtr->State == CNT001_UNINITIALIZED)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, CNT001_STATUS_LEN, &status);
}
/* Clear the timer in TCCLR register */
else
{
CC4yRegsPtr->TCCLR |= CNT001_CLEAR_COUNTER;
Status = (uint32_t)DAVEApp_SUCCESS;
}
DBG002_FUNCTION_EXIT(APP_GID, (uint32_t)CNT001_FUNCTION_EXIT);
return (Status);
}
/*<<<DD_PWMMP001_API_1>>>*/
status_t PWMMP001_lInit(const PWMMP001_HandleType* HandlePtr)
{
status_t Status = (uint32_t)PWMMP001_OPER_NOT_ALLOWED_ERROR;
uint8_t PhaseNumber = 0U;
DBG002_FUNCTION_ENTRY(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_ENTRY);
do
{
/*<<<DD_PWMMP001_API_1_1>>>*/
if (HandlePtr->DynamicHandle->State != PWMMP001_UNINITIALIZED)
{
break;
}
/*<<<DD_PWMMP001_API_1_1>>>*/
do
{
Status = CCU8PWMLIB_Init(HandlePtr->PhaseHandlePtr[PhaseNumber]);
/* Enable multi channel mode */
if (HandlePtr->kMultiChanModeSupport == 1U)
{
SET_BIT(HandlePtr->PhaseHandlePtr[PhaseNumber]->CC8yRegsPtr->TC,
CCU8_CC8_TC_MCME1_Pos);
HandlePtr->PhaseHandlePtr[PhaseNumber]->CC8yKernRegsPtr->GCTRL |=
(uint32_t)1U << ((uint32_t)HandlePtr->PhaseHandlePtr[PhaseNumber]->FirstSlice + (uint32_t)10U);
}
PhaseNumber++;
} while ((PhaseNumber < HandlePtr->kNumPhases) && (HandlePtr->PhaseHandlePtr[PhaseNumber] != NULL));
HandlePtr->DynamicHandle->State = PWMMP001_INITIALIZED;
Status = (uint32_t)DAVEApp_SUCCESS;
} while (0);
if (Status != (uint32_t)DAVEApp_SUCCESS)
{
DBG002_INFO(APP_GID, DBG002_MESSAGEID_LITERAL, PWMMP001_STATUS_LEN, &Status);
}
DBG002_FUNCTION_EXIT(DBG002_GID_PWMMP001, (uint32_t)PWMMP001_FUNCTION_EXIT);
return Status;
}
