void main(void)
{
int i;
int value_new, value_tmp, value_old;
int stable;
port_mode(&port0, PullNone);
// Only PortA or PortB is available now
port_init(&port0, PortA, 0xFF, PIN_INPUT);
value_old = port_read(&port0);
while(1){
// De-bonse
value_new = port_read(&port0);
stable = 0;
while (stable < 3){
value_tmp = port_read(&port0);
if (value_new != value_tmp) {
value_new = value_tmp;
stable = 0;
}
else {
stable++;
}
}
if (value_old != value_new) {
DBG_8195A("0x%x\r\n", value_new);
value_old = value_new;
}
wait_ms(50);
}
}
void main(void)
{
gpio_t gpio_led;
int led_status;
int i2clocalcnt;
int error;
uint16_t shtc1_id;
float temperature = 1.123f;
float humidity = 2.456f;
DBG_8195A("sleep 10 sec. to wait for UART console\n");
Mdelay(10000);
DBG_8195A("start i2c example - SHTC1\n");
error = SHTC1_Init(&shtc1_id);
if ( error == NO_ERROR ) {
DiagPrintf("SHTC1 init ok, id=0x%x\r\n", shtc1_id);
} else {
DiagPrintf("SHTC1 init FAILED! \r\n");
for(;;);
}
while(1){
error = SHTC1_GetTempAndHumi(&temperature, &humidity);
rtl_printf("temp=%f, humidity=%f, error=%d\n",
temperature, humidity, error);
Mdelay(1000);
}
}
int main()
{
time_t seconds;
struct tm *timeinfo;
rtc_init();
rtc_write(1256729737); // Set RTC time to Wed, 28 Oct 2009 11:35:37
while(1) {
seconds = rtc_read();
timeinfo = localtime(&seconds);
DBG_8195A("Time as seconds since January 1, 1970 = %d\n", seconds);
DBG_8195A("Time as a basic string = %s", ctime(&seconds));
DBG_8195A("Time as a custom formatted string = %d-%d-%d %d:%d:%d ",
timeinfo->tm_year, timeinfo->tm_mon, timeinfo->tm_mday, timeinfo->tm_hour,
timeinfo->tm_min,timeinfo->tm_sec);
wait(1);
}
}
void main(void)
{
struct tm timeinfo;
rtc_init();
// Give RTC a initial value: 2015/4/15 (Wed) 12:00:00
rtc_set_time(2015, 4, 15, 3, 12, 0, 0);
while (1) {
rtc_read_time(&timeinfo);
DBG_8195A("%d-%d-%d[%d] %d:%d:%d\r\n", timeinfo.tm_year, timeinfo.tm_mon, timeinfo.tm_mday,
timeinfo.tm_wday, timeinfo.tm_hour, timeinfo.tm_min, timeinfo.tm_sec);
wait_ms(1000);
}
rtc_deinit();
}
void main(void)
{
flash_t flash;
uint32_t val32_to_write = 0x13572468;
uint32_t val32_to_read;
uint32_t address = FLASH_APP_BASE;
int result = 0;
flash_read_word(&flash, address, &val32_to_read);
flash_erase_sector(&flash, address);
flash_write_word(&flash, address, val32_to_write);
flash_read_word(&flash, address, &val32_to_read);
DBG_8195A("Read Data 0x%x\n", val32_to_read);
// verify result
result = (val32_to_write == val32_to_read) ? 1 : 0;
printf("\r\nResult is %s\r\n", (result) ? "success" : "fail");
for(;;);
}
void main(void)
{
flash_t flash;
uint32_t address = FLASH_APP_BASE;
#if 1
uint32_t val32_to_write = 0x13572468;
uint32_t val32_to_read;
int loop = 0;
int result = 0;
for(loop = 0; loop < 10; loop++)
{
flash_read_word(&flash, address, &val32_to_read);
DBG_8195A("Read Data 0x%x\n", val32_to_read);
flash_erase_sector(&flash, address);
flash_write_word(&flash, address, val32_to_write);
flash_read_word(&flash, address, &val32_to_read);
DBG_8195A("Read Data 0x%x\n", val32_to_read);
// verify result
result = (val32_to_write == val32_to_read) ? 1 : 0;
//printf("\r\nResult is %s\r\n", (result) ? "success" : "fail");
DBG_8195A("\r\nResult is %s\r\n", (result) ? "success" : "fail");
result = 0;
}
#else
int VERIFY_SIZE = 256;
int SECTOR_SIZE = 16;
uint8_t writedata[VERIFY_SIZE];
uint8_t readdata[VERIFY_SIZE];
uint8_t verifydata = 0;
int loop = 0;
int index = 0;
int sectorindex = 0;
int result = 0;
int resultsector = 0;
int testloop = 0;
for(testloop = 0; testloop < 1; testloop++){
address = FLASH_APP_BASE;
for(sectorindex = 0; sectorindex < 4080; sectorindex++){
result = 0;
//address += SECTOR_SIZE;
flash_erase_sector(&flash, address);
//DBG_8195A("Address = %x \n", address);
for(loop = 0; loop < SECTOR_SIZE; loop++){
for(index = 0; index < VERIFY_SIZE; index++)
{
writedata[index] = verifydata + index;
}
flash_stream_write(&flash, address, VERIFY_SIZE, &writedata);
flash_stream_read(&flash, address, VERIFY_SIZE, &readdata);
for(index = 0; index < VERIFY_SIZE; index++)
{
//DBG_8195A("Address = %x, Writedata = %x, Readdata = %x \n",address,writedata[index],readdata[index]);
if(readdata[index] != writedata[index]){
DBG_8195A("Error: Loop = %d, Address = %x, Writedata = %x, Readdata = %x \n",testloop,address,writedata[index],readdata[index]);
}
else{
result++;
//DBG_8195A(ANSI_COLOR_BLUE"Correct: Loop = %d, Address = %x, Writedata = %x, Readdata = %x \n"ANSI_COLOR_RESET,testloop,address,writedata[index],readdata[index]);
}
}
address += VERIFY_SIZE;
}
if(result == VERIFY_SIZE * SECTOR_SIZE){
//DBG_8195A("Sector %d Success \n", sectorindex);
resultsector++;
}
}
if(resultsector == 4079){
DBG_8195A("Test Loop %d Success \n", testloop);
}
resultsector = 0;
verifydata++;
}
//DBG_8195A("%d Sector Success \n", resultsector);
DBG_8195A("Test Done");
#endif
for(;;);
}
//---------------------------------------------------------------------------------------------------
//Function Name:
// RtkI2CInit
//
// Description:
// According to the given I2C index, the related SAL_I2C_MNGT_ADPT pointer used
// for retrieving each I2C data sturcture pointer will be reversely parsed first.
// Then, initializing I2C HAL operation, initializing I2C interrupt (if needed),
// initializing I2C DMA (if needed) and initializing I2C pinmux will be done.
// User specified I2C configuration will be assigned to I2C initial data structure
// (PHAL_I2C_INIT_DAT pHalI2CInitDat). I2C HAL initialization is executed after
// all the configuration data taken.
// In the end, I2C module is enabled as a final step of the whole initialization.
// For a slave ack General Call support, an additional step may be followed after
// the above steps.
//
// Arguments:
// [in] VOID *Data -
// I2C SAL handle
//
// Return:
// The status of the I2C initialization process.
// _EXIT_SUCCESS if the RtkI2CInit succeeded.
// _EXIT_FAILURE if the RtkI2CInit failed.
//
// Note:
// NA
//
// See Also:
// NA
//
// Author:
// By Jason Deng, 2014-04-03.
//
//----------------------------------------------------------------------------------------------------
RTK_STATUS
RtkDACInit(
IN VOID *Data
){
PSAL_DAC_HND pSalDACHND = (PSAL_DAC_HND) Data;
PSAL_DAC_HND_PRIV pSalDACHNDPriv = NULL;
PSAL_DAC_MNGT_ADPT pSalDACMngtAdpt = NULL;
//PHAL_DAC_INIT_DAT pHalDACInitDat = NULL;
PHAL_DAC_OP pHalDACOP = NULL;
/* To Get the SAL_I2C_MNGT_ADPT Pointer */
pSalDACHNDPriv = CONTAINER_OF(pSalDACHND, SAL_DAC_HND_PRIV, SalDACHndPriv);
pSalDACMngtAdpt = CONTAINER_OF(pSalDACHNDPriv->ppSalDACHnd, SAL_DAC_MNGT_ADPT, pSalHndPriv);
//pHalDACInitDat = pSalDACMngtAdpt->pHalInitDat;
pHalDACOP = pSalDACMngtAdpt->pHalOp;
/* Check the input I2C index first */
if (RtkDACIdxChk(pSalDACHND->DevNum))
return _EXIT_FAILURE;
#if 0
/* Check the input I2C operation type */
if (RtkI2COpTypeChk(pSalI2CHND))
return _EXIT_FAILURE;
#endif
/* DAC Initialize HAL Operations */
HalDACOpInit(pHalDACOP);
/* DAC Interrupt Initialization */
#if DAC_INTR_OP_TYPE
RtkDACIrqInit(pSalDACHND);
#endif
/* DAC DMA Initialization */
#if DAC_DMA_OP_TYPE
RtkDACDMAInit(pSalDACHND);
#endif
/* DAC Function and Clock Enable*/
RtkDACPinMuxInit(pSalDACHND);
pHalDACOP->HalDACInit(pSalDACHND->pInitDat);
#if 1
HAL_DAC_WRITE32(pSalDACHND->DevNum, REG_DAC_INTR_CTRL,
(BIT_DAC_FIFO_FULL_EN |
BIT_DAC_FIFO_OVERFLOW_EN |
BIT_DAC_FIFO_STOP_EN |
BIT_DAC__WRITE_ERROR_EN |
BIT_DAC_DSC_OVERFLOW0_EN |
BIT_DAC_DSC_OVERFLOW1_EN));
#else
HAL_DAC_WRITE32(pSalDACHND->DevNum, REG_DAC_INTR_CTRL,
(BIT_DAC_FIFO_FULL_EN|
BIT_DAC_FIFO_OVERFLOW_EN|
BIT_DAC_FIFO_STOP_EN|
BIT_DAC__WRITE_ERROR_EN|
BIT_DAC_DSC_OVERFLOW0_EN|
BIT_DAC_DSC_OVERFLOW1_EN));
#endif
DBG_8195A("intr msk:%x\n", HAL_DAC_READ32(pSalDACHND->DevNum,REG_DAC_INTR_CTRL));
pSalDACHND->pInitDat->DACEn = DAC_ENABLE;
pHalDACOP->HalDACEnable(pSalDACHND->pInitDat);
/* DAC Device Status Update */
pSalDACHND->DevSts = DAC_STS_IDLE;
return _EXIT_SUCCESS;
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
int Counter = 0;
int i;
#if SPI_IS_AS_MASTER
spi_init(&spi_master, SPI0_MOSI, SPI0_MISO, SPI0_SCLK, SPI0_CS);
spi_frequency(&spi_master, SCLK_FREQ);
spi_format(&spi_master, 16, (SPI_SCLK_IDLE_LOW|SPI_SCLK_TOGGLE_MIDDLE) , 0);
// wait Slave ready
wait_ms(1000);
while (Counter < TEST_LOOP) {
DBG_8195A("======= Test Loop %d =======\r\n", Counter);
for (i=0;i<TEST_BUF_SIZE;i++) {
TestBuf[i] = i;
}
spi_irq_hook(&spi_master, master_tr_done_callback, (uint32_t)&spi_master);
DBG_8195A("SPI Master Write Test==>\r\n");
TrDone = 0;
#if SPI_DMA_DEMO
spi_master_write_stream_dma(&spi_master, TestBuf, TEST_BUF_SIZE);
#else
spi_master_write_stream(&spi_master, TestBuf, TEST_BUF_SIZE);
#endif
i=0;
DBG_8195A("SPI Master Wait Write Done...\r\n");
while(TrDone == 0) {
wait_ms(10);
i++;
}
DBG_8195A("SPI Master Write Done!!\r\n");
DBG_8195A("SPI Master Read Test==>\r\n");
DBG_8195A("Wait 5 sec for SPI Slave get ready...\r\n");
for (i=0;i<5;i++) {
wait_ms(1000);
}
_memset(TestBuf, 0, TEST_BUF_SIZE);
spi_flush_rx_fifo(&spi_master);
TrDone = 0;
#if SPI_DMA_DEMO
spi_master_read_stream_dma(&spi_master, TestBuf, TEST_BUF_SIZE);
#else
spi_master_read_stream(&spi_master, TestBuf, TEST_BUF_SIZE);
#endif
i=0;
DBG_8195A("SPI Master Wait Read Done...\r\n");
while(TrDone == 0) {
wait_ms(10);
i++;
}
DBG_8195A("SPI Master Read Done!!\r\n");
__rtl_memDump_v1_00(TestBuf, TEST_BUF_SIZE, "SPI Master Read Data:");
Counter++;
}
spi_free(&spi_master);
DBG_8195A("SPI Master Test <==\r\n");
#else
spi_init(&spi_slave, SPI0_MOSI, SPI0_MISO, SPI0_SCLK, SPI0_CS);
spi_format(&spi_slave, 16, (SPI_SCLK_IDLE_LOW|SPI_SCLK_TOGGLE_MIDDLE) , 1);
while (spi_busy(&spi_slave)) {
DBG_8195A("Wait SPI Bus Ready...\r\n");
wait_ms(1000);
}
while (Counter < TEST_LOOP) {
DBG_8195A("======= Test Loop %d =======\r\n", Counter);
_memset(TestBuf, 0, TEST_BUF_SIZE);
DBG_8195A("SPI Slave Read Test ==>\r\n");
spi_irq_hook(&spi_slave, slave_tr_done_callback, (uint32_t)&spi_slave);
TrDone = 0;
spi_flush_rx_fifo(&spi_slave);
#if SPI_DMA_DEMO
spi_slave_read_stream_dma(&spi_slave, TestBuf, TEST_BUF_SIZE);
#else
spi_slave_read_stream(&spi_slave, TestBuf, TEST_BUF_SIZE);
#endif
i=0;
DBG_8195A("SPI Slave Wait Read Done...\r\n");
while(TrDone == 0) {
wait_ms(100);
i++;
if (i>150) {
DBG_8195A("SPI Slave Wait Timeout\r\n");
break;
}
}
__rtl_memDump_v1_00(TestBuf, TEST_BUF_SIZE, "SPI Slave Read Data:");
// Slave Write Test
DBG_8195A("SPI Slave Write Test ==>\r\n");
TrDone = 0;
#if SPI_DMA_DEMO
spi_slave_write_stream_dma(&spi_slave, TestBuf, TEST_BUF_SIZE);
#else
spi_slave_write_stream(&spi_slave, TestBuf, TEST_BUF_SIZE);
#endif
i=0;
DBG_8195A("SPI Slave Wait Write Done...\r\n");
while(TrDone == 0) {
wait_ms(100);
i++;
if (i> 200) {
DBG_8195A("SPI Slave Write Timeout...\r\n");
break;
}
}
DBG_8195A("SPI Slave Write Done!!\r\n");
Counter++;
}
spi_free(&spi_slave);
#endif
DBG_8195A("SPI Demo finished.\n");
for(;;);
}
