static int ppc4xx_pic_get_irq(struct pt_regs *regs)
{
u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
if (uic0 & UIC0_UIC1NC)
return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
else
return uic0 ? 32 - ffs(uic0) : -1;
}
static int ppc4xx_pic_get_irq(struct pt_regs *regs)
{
u32 uicb = mfdcr(DCRN_UIC_MSR(UICB));
if (uicb & UICB_UIC0NC)
return 32 - ffs(mfdcr(DCRN_UIC_MSR(UIC0)));
else if (uicb & UICB_UIC1NC)
return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
else if (uicb & UICB_UIC2NC)
return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2)));
else
return -1;
}
static int ppc4xx_pic_get_irq(void)
{
u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
if (uic0 & UIC0_UIC1NC)
return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
else if (uic0 & UIC0_UIC2NC)
return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2)));
else if (uic0 & UIC0_UIC3NC)
return 128 - ffs(mfdcr(DCRN_UIC_MSR(UIC3)));
else
return uic0 ? 32 - ffs(uic0) : -1;
}
int
ppc405_pic_get_irq(struct pt_regs *regs)
{
int irq, cas_irq;
unsigned long bits;
cas_irq = 0;
/*
* Only report the status of those interrupts that are actually
* enabled.
*/
bits = mfdcr(DCRN_UIC_MSR(UIC0));
#if (NR_UICS > 1)
if (bits & UIC_CASCADE_MASK) {
bits = mfdcr(DCRN_UIC_MSR(UIC1));
cas_irq = 32 - ffs(bits);
irq = 32 + cas_irq;
} else {
irq = 32 - ffs(bits);
if (irq == 32)
irq = -1;
}
#else
/*
* Walk through the interrupts from highest priority to lowest, and
* report the first pending interrupt found.
* We want PPC, not C bit numbering, so just subtract the ffs()
* result from 32.
*/
irq = 32 - ffs(bits);
#endif
if (irq == (NR_UIC_IRQS * NR_UICS))
irq = -1;
#ifdef UIC_DEBUG
printk("ppc405_pic_get_irq - irq %d bit 0x%x\n", irq, bits);
#endif
return (irq);
}
static int ppc4xx_pic_get_irq(struct pt_regs *regs)
{
u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
return uic0 ? 32 - ffs(uic0) : -1;
}
static int ppc4xx_pic_get_irq(void)
{
u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
return uic0 ? 32 - ffs(uic0) : -1;
}
