static DDS_ReturnCode_t struct_set(qeocore_data_t **data, const DDS_DynamicData dyndata, qeocore_member_id_t id)
{
DDS_ReturnCode_t ddsrc = DDS_RETCODE_OUT_OF_RESOURCES;
if ((*data != NULL )&& ((*data)->d.dynamic.single_data != NULL)){
ddsrc = DDS_DynamicData_set_complex_value(dyndata, id, (*data)->d.dynamic.single_data);
qeo_log_dds_rc("DDS_DynamicData_set_complex_value", ddsrc);
}
return ddsrc;
}
port vII_gpio_data_rx_pb_1 @ VII_GPIO_DATA_RX_PB_1; port vII_gpio_data_rx_pc_1 @ VII_GPIO_DATA_RX_PC_1; port vII_gpio_data_rx_pd_1 @ VII_GPIO_DATA_RX_PD_1; port vII_gpio_data_rx_pe_1 @ VII_GPIO_DATA_RX_PE_1; port vII_gpio_int_reg_en_1 @ VII_GPIO_INT_REG_EN_1; /* Global variables */ vos_driver_t mp3_VS1053_cb; mp3_VS1053_prvt_context mp3_VS1053_prvt_ctx; common_ioctl_cb_t spim_iocb;
static DDS_ReturnCode_t sequence_set(const qeocore_data_t **value,
DDS_DynamicData dyndata,
qeocore_member_id_t id)
{
DDS_ReturnCode_t ddsrc = DDS_RETCODE_ERROR;
ddsrc = DDS_DynamicData_set_complex_value(dyndata, id, (*value)->d.dynamic.single_data);
qeo_log_dds_rc("DDS_DynamicData_set_complex_value", ddsrc);
return ddsrc;
}
mp3_VS1053_cb.close = (PF_CLOSE) NULL;
// OK - register with device manager
vos_dev_init(mp3VS1053DevNum, &mp3_VS1053_cb, NULL);
// Enable GPIO control
vII_gpio_sys_cntrl_1 = MASK_GPIO_EN;
}
unsigned char mp3_VS1053_attach(VOS_HANDLE spi_master_handle, unsigned char XRESET_GPIO_port, unsigned char XRESET_GPIO_pin, unsigned char DREQ_GPIO_port, unsigned char DREQ_GPIO_pin, unsigned char SDI_CS_identifier, unsigned char SCI_CS_identifier)
{
if ((XRESET_GPIO_port > PORT_E) || (DREQ_GPIO_port > PORT_E))