void Genefx_Aop_xy( GenefxState *gfxs, int x, int y )
{
int pitch = gfxs->dst_pitch;
gfxs->Aop[0] = gfxs->dst_org[0];
gfxs->AopY = y;
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
gfxs->Aop_field = y & 1;
if (gfxs->Aop_field)
gfxs->Aop[0] += gfxs->dst_field_offset;
y /= 2;
}
D_ASSUME( !(x & DFB_PIXELFORMAT_ALIGNMENT(gfxs->dst_format)) );
gfxs->Aop[0] += y * pitch + DFB_BYTES_PER_LINE( gfxs->dst_format, x );
if (DFB_PLANAR_PIXELFORMAT(gfxs->dst_format)) {
int dst_field_offset = gfxs->dst_field_offset;
switch (gfxs->dst_format) {
case DSPF_YV12:
case DSPF_I420:
dst_field_offset /= 4;
pitch /= 2;
y /= 2;
x /= 2;
break;
case DSPF_YV16:
dst_field_offset /= 2;
pitch /= 2;
x /= 2;
break;
case DSPF_NV12:
case DSPF_NV21:
dst_field_offset /= 2;
y /= 2;
case DSPF_NV16:
x &= ~1;
break;
case DSPF_YUV444P: /* nothing to adjust */
default:
break;
}
gfxs->Aop[1] = gfxs->dst_org[1];
gfxs->Aop[2] = gfxs->dst_org[2];
if (gfxs->dst_caps & DSCAPS_SEPARATED && gfxs->Aop_field) {
gfxs->Aop[1] += dst_field_offset;
gfxs->Aop[2] += dst_field_offset;
}
gfxs->Aop[1] += y * pitch + x;
gfxs->Aop[2] += y * pitch + x;
}
}
static void
print_usage (const char *prg_name)
{
int i = 0;
fprintf (stderr, "\nDirectFB Layer Configuration (version %s)\n\n", DIRECTFB_VERSION);
fprintf (stderr, "Usage: %s [options]\n\n", prg_name);
fprintf (stderr, "Options:\n");
fprintf (stderr, " -l, --layer <id> Use the specified layer, default is primary\n");
fprintf (stderr, " -m, --mode <width>x<height> Change the resolution (pixels)\n");
fprintf (stderr, " -f, --format <pixelformat> Change the pixel format\n");
fprintf (stderr, " -b, --buffer <buffermode> Change the buffer mode (single/video/system)\n");
fprintf (stderr, " -o, --opacity <opacity> Change the layer's opacity (0-255)\n");
fprintf (stderr, " -L, --level <level> Change the layer's level\n");
fprintf (stderr, " -R, --rotate <degree> Change the layer rotation\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
fprintf (stderr, "Valid buffer modes:\n");
fprintf (stderr, " FRONTONLY or 'single'\n");
fprintf (stderr, " BACKVIDEO or 'video'\n");
fprintf (stderr, " BACKSYSTEM or 'system'\n");
fprintf (stderr, " TRIPLE\n");
fprintf (stderr, " WINDOWS\n");
fprintf (stderr, "\n");
fprintf (stderr, "Specifying neither mode nor format just displays the current configuration.\n");
fprintf (stderr, "\n");
}
static void
r300_flush_vb( RadeonDriverData *rdrv, RadeonDeviceData *rdev )
{
volatile u8 *mmio = rdrv->mmio_base;
EMIT_VERTICES( rdrv, rdev, mmio );
if (DFB_PLANAR_PIXELFORMAT(rdev->dst_format)) {
DFBRegion clip;
int i;
for (i = 0; i < rdev->vb_size; i += 8) {
rdev->vb[i+0] = f2d(d2f(rdev->vb[i+0])*0.5f);
rdev->vb[i+1] = f2d(d2f(rdev->vb[i+1])*0.5f);
}
clip.x1 = rdev->clip.x1 >> 1;
clip.y1 = rdev->clip.y1 >> 1;
clip.x2 = rdev->clip.x2 >> 1;
clip.y2 = rdev->clip.y2 >> 1;
/* Prepare Cb plane */
radeon_waitfifo( rdrv, rdev, 5 );
radeon_out32( mmio, R300_RB3D_COLOROFFSET0, rdev->dst_offset_cb );
radeon_out32( mmio, R300_RB3D_COLORPITCH0, (rdev->dst_pitch>>1) |
R300_COLOR_FORMAT_RGB8 );
radeon_out32( mmio, R300_TX_SIZE_0, ((rdev->src_width/2 -1) << R300_TX_WIDTH_SHIFT) |
((rdev->src_height/2-1) << R300_TX_HEIGHT_SHIFT) |
R300_TX_SIZE_TXPITCH_EN );
radeon_out32( mmio, R300_TX_PITCH_0, (rdev->src_pitch>>1) - 8 );
radeon_out32( mmio, R300_TX_OFFSET_0, rdev->src_offset_cb );
r300_set_clip3d( rdrv, rdev, &clip );
/* Fill Cb plane */
EMIT_VERTICES( rdrv, rdev, mmio );
/* Prepare Cr plane */
radeon_waitfifo( rdrv, rdev, 2 );
radeon_out32( mmio, R300_RB3D_COLOROFFSET0, rdev->dst_offset_cr );
radeon_out32( mmio, R300_TX_OFFSET_0, rdev->src_offset_cr );
/* Fill Cr plane */
EMIT_VERTICES( rdrv, rdev, mmio );
/* Reset */
radeon_waitfifo( rdrv, rdev, 5 );
radeon_out32( mmio, R300_RB3D_COLOROFFSET0, rdev->dst_offset );
radeon_out32( mmio, R300_RB3D_COLORPITCH0, rdev->dst_pitch |
R300_COLOR_FORMAT_RGB8 );
radeon_out32( mmio, R300_TX_SIZE_0, ((rdev->src_width -1) << R300_TX_WIDTH_SHIFT) |
((rdev->src_height-1) << R300_TX_HEIGHT_SHIFT) |
R300_TX_SIZE_TXPITCH_EN );
radeon_out32( mmio, R300_TX_PITCH_0, rdev->src_pitch - 8 );
radeon_out32( mmio, R300_TX_OFFSET_0, rdev->src_offset );
r300_set_clip3d( rdrv, rdev, &rdev->clip );
}
static int
print_usage( const char *prg )
{
int i = 0;
fprintf (stderr, "\n");
fprintf (stderr, "== DirectFB Blitting Test (version %s) ==\n", DIRECTFB_VERSION);
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
fprintf (stderr, "\n");
fprintf (stderr, "Usage: %s [options]\n", prg);
fprintf (stderr, "\n");
fprintf (stderr, "Options:\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, " -s, --source <pixelformat> Source pixel format\n");
fprintf (stderr, " -d, --dest <pixelformat> Destination pixel format\n");
fprintf (stderr, " -r, --resize Set destination from source size\n");
fprintf (stderr, " -b, --benchmark Enable benchmarking mode\n");
fprintf (stderr, " -R, --rerender Rerender before every blit (benchmark)\n");
return -1;
}
static int
print_usage( const char *prg )
{
int i = 0;
fprintf (stderr, "\n");
fprintf (stderr, "== DirectFB Font Test (version %s) ==\n", DIRECTFB_VERSION);
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
fprintf (stderr, "\n");
fprintf (stderr, "Usage: %s [options] <file>\n", prg);
fprintf (stderr, "\n");
fprintf (stderr, "Options:\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, " -o, --outline Render outlined fonts\n");
fprintf (stderr, " -ow, --outline-width <width> Change outline width (default 1)\n");
fprintf (stderr, " -oo, --outline-opacity <opacity> Change outline opacity (default 255)\n");
return -1;
}
static int
print_usage( const char *prg )
{
int i = 0;
fprintf (stderr, "\n");
fprintf (stderr, "== DirectFB Fill Rectangle Test (version %s) ==\n", DIRECTFB_VERSION);
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
fprintf (stderr, "\n");
fprintf (stderr, "Usage: %s [options]\n", prg);
fprintf (stderr, "\n");
fprintf (stderr, "Options:\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, " -d, --dest <pixelformat> Destination pixel format\n");
fprintf (stderr, " -s, --static Use DSCAPS_STATIC_ALLOC\n");
return -1;
}
static void
print_usage (const char *prg_name)
{
int i = 0;
fprintf (stderr, "\nDirectFB Render Test (version %s)\n\n", DIRECTFB_VERSION);
fprintf (stderr, "Usage: %s [options]\n\n", prg_name);
fprintf (stderr, "Options:\n");
fprintf (stderr, " -m, --mode <width>x<height> Set test surface size (default 800x600)\n");
fprintf (stderr, " -f, --format <pixelformat> Change the pixel format\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
}
static void
print_usage (const char *prg_name)
{
int i = 0;
fprintf (stderr, "\nDirectFB Glyph Image File Format Tool (version %s)\n\n", DIRECTFB_VERSION);
fprintf (stderr, "Usage: %s [options]\n\n", prg_name);
fprintf (stderr, "Options:\n");
fprintf (stderr, " -f, --format <pixelformat> Choose the pixel format (default ARGB)\n");
fprintf (stderr, " -s, --sizes <s1>[,s2...] Choose sizes to generate glyph images for\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats with alpha:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
if (DFB_PIXELFORMAT_HAS_ALPHA(format)) {
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
}
++i;
}
fprintf (stderr, "\n");
}
void
sh7722_lcd_setup( void *drv,
int width,
int height,
ulong phys,
int pitch,
DFBSurfacePixelFormat format,
bool swap )
{
u32 MLDDFR = 0;
u32 LDDDSR = 0;
D_DEBUG_AT( SH7722_LCD, "%s( %dx%d @%lu:%d )\n", __FUNCTION__, width, height, phys, pitch );
D_ASSERT( width > 7 );
D_ASSERT( height > 0 );
D_ASSERT( (phys & 7) == 0 );
D_ASSERT( pitch > 0 );
D_ASSERT( pitch < 0x10000 );
D_ASSERT( (pitch & 3) == 0 );
/* Choose input format. */
switch (format) {
case DSPF_RGB32:
case DSPF_ARGB:
MLDDFR = 0;
break;
case DSPF_RGB16:
MLDDFR = 3;
break;
case DSPF_RGB444:
case DSPF_ARGB4444:
MLDDFR = 8;
break;
case DSPF_RGB24:
MLDDFR = 11;
break;
case DSPF_NV12:
MLDDFR = 0x10000;
break;
case DSPF_NV16:
MLDDFR = 0x10100;
break;
default:
D_BUG( "invalid format" );
return;
}
/* Setup swapping. */
switch (format) {
case DSPF_NV12: /* 1 byte */
case DSPF_NV16:
case DSPF_RGB24:
LDDDSR = 7;
break;
case DSPF_RGB16: /* 2 byte */
case DSPF_RGB444:
case DSPF_ARGB4444:
LDDDSR = 6;
break;
case DSPF_RGB32: /* 4 byte */
case DSPF_ARGB:
LDDDSR = 4;
break;
default:
D_BUG( "invalid format" );
return;
}
SH7722_SETREG32( drv, LCDC_MLDDCKPAT1R, 0x05555555 );
SH7722_SETREG32( drv, LCDC_MLDDCKPAT2R, 0x55555555 );
SH7722_SETREG32( drv, LCDC_LDDCKR, 0x0000003c );
SH7722_SETREG32( drv, LCDC_MLDMT2R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDMT3R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDDFR, MLDDFR );
SH7722_SETREG32( drv, LCDC_MLDSM1R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDSM2R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDSA1R, phys );
SH7722_SETREG32( drv, LCDC_MLDSA2R, DFB_PLANAR_PIXELFORMAT( format ) ? (phys + pitch * height) : 0 );
SH7722_SETREG32( drv, LCDC_MLDMLSR, pitch );
SH7722_SETREG32( drv, LCDC_MLDWBCNTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDWBAR, 0x00000000 );
#if 0
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x18000006 );
SH7722_SETREG32( drv, LCDC_MLDHCNR, ((width / 8) << 16) | (1056 / 8) );
SH7722_SETREG32( drv, LCDC_MLDHSYNR, ((128 / 8) << 16) | (840 / 8) );
SH7722_SETREG32( drv, LCDC_MLDVLNR, (height << 16) | 525 );
SH7722_SETREG32( drv, LCDC_MLDVSYNR, (2 << 16) | 490 );
SH7722_SETREG32( drv, LCDC_MLDPMR, 0xf6000f00 );
#elif 0
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1c00000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, 0x00500060);
SH7722_SETREG32( drv, LCDC_MLDHSYNR, 0x00010052);
SH7722_SETREG32( drv, LCDC_MLDVLNR, 0x01e00200);
SH7722_SETREG32( drv, LCDC_MLDVSYNR, 0x000301f0);
SH7722_SETREG32( drv, LCDC_MLDPMR, 0x00000000 ); //igel
#elif defined(SH7722_ALGO_PANEL)
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1c00000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, 0x00500060);
SH7722_SETREG32( drv, LCDC_MLDHSYNR, 0x00010052);
SH7722_SETREG32( drv, LCDC_MLDVLNR, 0x01e0020e);
SH7722_SETREG32( drv, LCDC_MLDVSYNR, 0x000301f0);
SH7722_SETREG32( drv, LCDC_MLDPMR, 0x00000000 ); //igel
#elif defined(ALGO_AP325)
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1800000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, ((width / 8) << 16) | (1000 / 8) );
SH7722_SETREG32( drv, LCDC_MLDHSYNR, ((8 / 8) << 16) | (960 / 8) );
SH7722_SETREG32( drv, LCDC_MLDVLNR, (height << 16) | 624 );
SH7722_SETREG32( drv, LCDC_MLDVSYNR, (1 << 16) | 560 );
SH7722_SETREG32( drv, LCDC_MLDPMR, 0xf6000f00 );
#endif
SH7722_SETREG32( drv, LCDC_LDINTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDRCNTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDDDSR, swap ? LDDDSR : 0 );
SH7722_SETREG32( drv, LCDC_LDRCR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDPALCR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDCNT1R, 0x00000001 );
SH7722_SETREG32( drv, LCDC_LDCNT2R, 0x00000003 );
}
void
sh7722_lcd_setup( void *drv,
int width,
int height,
ulong phys,
int pitch,
DFBSurfacePixelFormat format,
bool swap )
{
u32 MLDDFR = 0;
u32 LDDDSR = 0;
u32 reg;
D_DEBUG_AT( SH7722_LCD, "%s( %dx%d @%lu:%d )\n", __FUNCTION__, width, height, phys, pitch );
D_ASSERT( width > 7 );
D_ASSERT( height > 0 );
D_ASSERT( (phys & 7) == 0 );
D_ASSERT( pitch > 0 );
D_ASSERT( pitch < 0x10000 );
D_ASSERT( (pitch & 3) == 0 );
/* Choose input format. */
switch (format) {
case DSPF_RGB32:
case DSPF_ARGB:
MLDDFR = 0;
break;
case DSPF_RGB16:
MLDDFR = 3;
break;
case DSPF_RGB444:
case DSPF_ARGB4444:
MLDDFR = 8;
break;
case DSPF_RGB24:
MLDDFR = 11;
break;
case DSPF_NV12:
MLDDFR = 0x10000;
break;
case DSPF_NV16:
MLDDFR = 0x10100;
break;
default:
D_BUG( "invalid format" );
return;
}
/* Setup swapping. */
switch (format) {
case DSPF_NV12: /* 1 byte */
case DSPF_NV16:
case DSPF_RGB24:
LDDDSR = 7;
break;
case DSPF_RGB16: /* 2 byte */
case DSPF_RGB444:
case DSPF_ARGB4444:
LDDDSR = 6;
break;
case DSPF_RGB32: /* 4 byte */
case DSPF_ARGB:
LDDDSR = 4;
break;
default:
D_BUG( "invalid format" );
return;
}
/* software reset of the LCD device */
reg = SH7722_GETREG32( drv, LCDC_LDCNT2R );
SH7722_SETREG32( drv, LCDC_LDCNT2R, reg | 0x100 );
while( SH7722_GETREG32( drv, LCDC_LDCNT2R ) & 0x100 );
/* stop the LCD while configuring */
SH7722_SETREG32( drv, LCDC_LDCNT2R, 0 );
SH7722_SETREG32( drv, LCDC_LDDCKSTPR, 1 );
SH7722_SETREG32( drv, LCDC_MLDDCKPAT1R, 0x05555555 );
SH7722_SETREG32( drv, LCDC_MLDDCKPAT2R, 0x55555555 );
SH7722_SETREG32( drv, LCDC_LDDCKR, 0x0000003c );
SH7722_SETREG32( drv, LCDC_MLDMT2R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDMT3R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDDFR, MLDDFR );
SH7722_SETREG32( drv, LCDC_MLDSM1R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDSM2R, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDSA1R, phys );
SH7722_SETREG32( drv, LCDC_MLDSA2R, DFB_PLANAR_PIXELFORMAT( format ) ? (phys + pitch * height) : 0 );
SH7722_SETREG32( drv, LCDC_MLDMLSR, pitch );
SH7722_SETREG32( drv, LCDC_MLDWBCNTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_MLDWBAR, 0x00000000 );
#if 0
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x18000006 );
SH7722_SETREG32( drv, LCDC_MLDHCNR, ((width / 8) << 16) | (1056 / 8) );
SH7722_SETREG32( drv, LCDC_MLDHSYNR, ((128 / 8) << 16) | (840 / 8) );
SH7722_SETREG32( drv, LCDC_MLDVLNR, (height << 16) | 525 );
SH7722_SETREG32( drv, LCDC_MLDVSYNR, (2 << 16) | 490 );
SH7722_SETREG32( drv, LCDC_MLDPMR, 0xf6000f00 );
#elif 0
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1c00000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, 0x00500060);
SH7722_SETREG32( drv, LCDC_MLDHSYNR, 0x00010052);
SH7722_SETREG32( drv, LCDC_MLDVLNR, 0x01e00200);
SH7722_SETREG32( drv, LCDC_MLDVSYNR, 0x000301f0);
SH7722_SETREG32( drv, LCDC_MLDPMR, 0x00000000 ); //igel
#elif defined(SH7722_ALGO_PANEL)
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1c00000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, 0x00500060);
SH7722_SETREG32( drv, LCDC_MLDHSYNR, 0x00010052);
SH7722_SETREG32( drv, LCDC_MLDVLNR, 0x01e0020e);
SH7722_SETREG32( drv, LCDC_MLDVSYNR, 0x000301f0);
SH7722_SETREG32( drv, LCDC_MLDPMR, 0x00000000 ); //igel
#elif defined(ALGO_AP325)
SH7722_SETREG32( drv, LCDC_MLDMT1R, 0x1800000a );
SH7722_SETREG32( drv, LCDC_MLDHCNR, ((width / 8) << 16) | (1000 / 8) );
SH7722_SETREG32( drv, LCDC_MLDHSYNR, ((8 / 8) << 16) | (960 / 8) );
SH7722_SETREG32( drv, LCDC_MLDVLNR, (height << 16) | 624 );
SH7722_SETREG32( drv, LCDC_MLDVSYNR, (1 << 16) | 560 );
SH7722_SETREG32( drv, LCDC_MLDPMR, 0x00000000 );
#endif
SH7722_SETREG32( drv, LCDC_LDINTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDRCNTR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDDDSR, swap ? LDDDSR : 0 );
SH7722_SETREG32( drv, LCDC_LDRCR, 0x00000000 );
SH7722_SETREG32( drv, LCDC_LDPALCR, 0x00000000 );
/* enable and start displaying */
SH7722_SETREG32( drv, LCDC_LDCNT1R, 0x00000001 );
SH7722_SETREG32( drv, LCDC_LDCNT2R, 0x00000003 );
SH7722_SETREG32( drv, LCDC_LDDCKSTPR, 0 );
while( SH7722_GETREG32( drv, LCDC_LDDCKSTPR ) & 0x10000 );
/* finally, turn the display on */
{
SH7722DriverData *sdrv = drv;
if (ioctl( sdrv->gfx_fd, SH772xGFX_IOCTL_POWER_DISPLAY ) < 0)
D_PERROR( "SH772xGFX_IOCTL_POWER_DISPLAY\n" );
}
}
static DFBResult
sh7722FlipRegion( CoreLayer *layer,
void *driver_data,
void *layer_data,
void *region_data,
CoreSurface *surface,
DFBSurfaceFlipFlags flags,
CoreSurfaceBufferLock *left_lock,
CoreSurfaceBufferLock *right_lock )
{
int n;
CoreSurfaceBuffer *buffer;
SH7722DriverData *sdrv = driver_data;
SH7722DeviceData *sdev = sdrv->dev;
SH7722MultiRegionData *sreg = region_data;
D_DEBUG_AT( SH7722_Layer, "%s()\n", __FUNCTION__ );
D_ASSERT( surface != NULL );
D_ASSERT( sdrv != NULL );
D_ASSERT( sdev != NULL );
D_MAGIC_ASSERT( sreg, SH7722MultiRegionData );
n = sreg->index;
D_ASSERT( n >= 0 );
D_ASSERT( n <= 3 );
buffer = left_lock->buffer;
D_ASSERT( buffer != NULL );
fusion_skirmish_prevail( &sdev->beu_lock );
/* Wait for idle BEU. */
BEU_Wait( sdrv, sdev );
/* Set buffer pitch. */
SH7722_SETREG32( sdrv, BMSMWR(n), left_lock->pitch );
/* Set buffer offset (Y plane or RGB packed). */
SH7722_SETREG32( sdrv, BMSAYR(n), left_lock->phys );
/* Set buffer offset (UV plane). */
if (DFB_PLANAR_PIXELFORMAT(buffer->format)) {
D_ASSUME( buffer->format == DSPF_NV12 || buffer->format == DSPF_NV16 );
SH7722_SETREG32( sdrv, BMSACR(n), left_lock->phys + left_lock->pitch * surface->config.size.h );
}
/* Start operation! */
BEU_Start( sdrv, sdev );
fusion_skirmish_dismiss( &sdev->beu_lock );
/* Wait for idle BEU? */
if (flags & DSFLIP_WAIT)
BEU_Wait( sdrv, sdev );
dfb_surface_flip( surface, false );
return DFB_OK;
}
bool r100TextureTriangles( void *drv, void *dev, DFBVertex *ve,
int num, DFBTriangleFormation formation )
{
RadeonDriverData *rdrv = (RadeonDriverData*) drv;
RadeonDeviceData *rdev = (RadeonDeviceData*) dev;
u32 prim = 0;
int i;
if (num > 65535) {
D_WARN( "R100 supports maximum 65535 vertices" );
return false;
}
switch (formation) {
case DTTF_LIST:
prim = VF_PRIM_TYPE_TRIANGLE_LIST;
break;
case DTTF_STRIP:
prim = VF_PRIM_TYPE_TRIANGLE_STRIP;
break;
case DTTF_FAN:
prim = VF_PRIM_TYPE_TRIANGLE_FAN;
break;
default:
D_BUG( "unexpected triangle formation" );
return false;
}
if (rdev->matrix) {
for (i = 0; i < num; i++)
RADEON_TRANSFORM( ve[i].x, ve[i].y, ve[i].x, ve[i].y, rdev->matrix, rdev->affine_matrix );
}
r100DoTextureTriangles( rdrv, rdev, ve, num, prim );
if (DFB_PLANAR_PIXELFORMAT(rdev->dst_format)) {
DFBRegion *clip = &rdev->clip;
volatile u8 *mmio = rdrv->mmio_base;
bool s420 = DFB_PLANAR_PIXELFORMAT(rdev->src_format);
int i;
/* Scale coordinates */
for (i = 0; i < num; i++) {
ve[i].x *= 0.5;
ve[i].y *= 0.5;
}
/* Prepare Cb plane */
radeon_waitfifo( rdrv, rdev, s420 ? 8 : 5 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset_cb );
radeon_out32( mmio, RB3D_COLORPITCH, rdev->dst_pitch/2 );
if (s420) {
radeon_out32( mmio, PP_TEX_SIZE_0, ((rdev->src_height/2-1) << 16) |
((rdev->src_width/2-1) & 0xffff) );
radeon_out32( mmio, PP_TEX_PITCH_0, rdev->src_pitch/2 - 32 );
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset_cb );
}
radeon_out32( mmio, RE_TOP_LEFT, (clip->y1/2 << 16) |
(clip->x1/2 & 0xffff) );
radeon_out32( mmio, RE_BOTTOM_RIGHT, (clip->y2/2 << 16) |
(clip->x2/2 & 0xffff) );
radeon_out32( mmio, PP_TFACTOR_0, rdev->cb_cop );
/* Map Cb plane */
r100DoTextureTriangles( rdrv, rdev, ve, num, prim );
/* Prepare Cr plane */
radeon_waitfifo( rdrv, rdev, s420 ? 3 : 2 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset_cr );
if (s420)
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset_cr );
radeon_out32( mmio, PP_TFACTOR_0, rdev->cr_cop );
/* Map Cr plane */
r100DoTextureTriangles( rdrv, rdev, ve, num, prim );
/* Reset */
radeon_waitfifo( rdrv, rdev, s420 ? 8 : 5 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset );
radeon_out32( mmio, RB3D_COLORPITCH, rdev->dst_pitch );
if (s420) {
radeon_out32( mmio, PP_TEX_SIZE_0, ((rdev->src_height-1) << 16) |
((rdev->src_width-1) & 0xffff) );
radeon_out32( mmio, PP_TEX_PITCH_0, rdev->src_pitch - 32 );
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset );
}
radeon_out32( mmio, RE_TOP_LEFT, (clip->y1 << 16) |
(clip->x1 & 0xffff) );
radeon_out32( mmio, RE_BOTTOM_RIGHT, (clip->y2 << 16) |
(clip->x2 & 0xffff) );
radeon_out32( mmio, PP_TFACTOR_0, rdev->y_cop );
}
return true;
}
static void
print_usage (const char *prg_name)
{
int i = 0;
fprintf (stderr, "\n");
fprintf (stderr, "== DirectFB Window Test (version %s) ==\n", DIRECTFB_VERSION);
fprintf (stderr, "\n");
fprintf (stderr, "Known pixel formats:\n");
while (format_names[i].format != DSPF_UNKNOWN) {
DFBSurfacePixelFormat format = format_names[i].format;
fprintf (stderr, " %-10s %2d bits, %d bytes",
format_names[i].name, DFB_BITS_PER_PIXEL(format),
DFB_BYTES_PER_PIXEL(format));
if (DFB_PIXELFORMAT_HAS_ALPHA(format))
fprintf (stderr, " ALPHA");
if (DFB_PIXELFORMAT_IS_INDEXED(format))
fprintf (stderr, " INDEXED");
if (DFB_PLANAR_PIXELFORMAT(format)) {
int planes = DFB_PLANE_MULTIPLY(format, 1000);
fprintf (stderr, " PLANAR (x%d.%03d)",
planes / 1000, planes % 1000);
}
fprintf (stderr, "\n");
++i;
}
fprintf (stderr, "\n");
fprintf (stderr, "Known window capabilities:\n");
for (i=0; caps_names[i].capability != DWCAPS_NONE; i++)
fprintf (stderr, " %s\n", caps_names[i].name);
fprintf (stderr, "\n");
fprintf (stderr, "Known window options:\n");
for (i=0; options_names[i].option != DWOP_NONE; i++)
fprintf (stderr, " %s\n", options_names[i].name);
fprintf (stderr, "\n");
fprintf (stderr, "\n");
fprintf (stderr, "Usage: %s [options]\n", prg_name);
fprintf (stderr, "\n");
fprintf (stderr, "Options:\n");
fprintf (stderr, " -h, --help Show this help message\n");
fprintf (stderr, " -v, --version Print version information\n");
fprintf (stderr, " -T, --top-level <toplevel_id> WindowID (skips top creation)\n");
fprintf (stderr, " -W, --wait-at-end Wait at the end (don't exit)\n");
fprintf (stderr, "\n");
fprintf (stderr, "Top window:\n");
fprintf (stderr, " -r, --run <test> Run test (see list below)\n");
fprintf (stderr, " -p, --pos <posx>,<posy> Position (%d,%d)\n", m_desc_top.posx, m_desc_top.posy);
fprintf (stderr, " -s, --size <width>x<height> Size (%dx%d)\n", m_desc_top.width, m_desc_top.height);
fprintf (stderr, " -f, --format <pixelformat> Pixel Format (%s)\n", dfb_pixelformat_name(m_desc_top.pixelformat));
fprintf (stderr, " -c, --caps <window_caps> Capabilities (NONE)\n");
fprintf (stderr, " -l, --color <aarrggbb> Fixed Color (NONE)\n");
fprintf (stderr, " -o, --option <window_option> Options (NONE)\n");
fprintf (stderr, " -a, --associate <parent_id> Association (N/A)\n");
fprintf (stderr, "\n");
fprintf (stderr, "Sub window:\n");
fprintf (stderr, " -R, --sub-run <test> Run test (see list below)\n");
fprintf (stderr, " -P, --sub-pos <posx>,<posy> Position (%d,%d)\n", m_desc_sub.posx, m_desc_sub.posy);
fprintf (stderr, " -S, --sub-size <width>x<height> Size (%dx%d)\n", m_desc_sub.width, m_desc_sub.height);
fprintf (stderr, " -F, --sub-format <pixelformat> Format (%s)\n", dfb_pixelformat_name(m_desc_sub.pixelformat));
fprintf (stderr, " -C, --sub-caps <window_caps> Capabilities (NONE)\n");
fprintf (stderr, " -L, --sub-color <aarrggbb> Fixed Color (NONE)\n");
fprintf (stderr, " -O, --sub-option <window_option> Options (NONE)\n");
fprintf (stderr, " -A, --sub-associate <parent_id> Association (N/A)\n");
fprintf (stderr, "\n");
fprintf (stderr, "Available tests:\n");
for (i=0; i<D_ARRAY_SIZE(m_tests); i++)
fprintf (stderr, " %s\n", m_tests[i].name);
fprintf (stderr, "\n");
}
static void
r100_flush_vb( RadeonDriverData *rdrv, RadeonDeviceData *rdev )
{
volatile u8 *mmio = rdrv->mmio_base;
EMIT_VERTICES( rdrv, rdev, mmio );
if (DFB_PLANAR_PIXELFORMAT(rdev->dst_format)) {
DFBRegion *clip = &rdev->clip;
bool s420 = DFB_PLANAR_PIXELFORMAT(rdev->src_format);
int i;
if (DFB_BLITTING_FUNCTION(rdev->accel)) {
for (i = 0; i < rdev->vb_size; i += 4) {
rdev->vb[i+0] = f2d(d2f(rdev->vb[i+0])*0.5f);
rdev->vb[i+1] = f2d(d2f(rdev->vb[i+1])*0.5f);
if (s420) {
rdev->vb[i+2] = f2d(d2f(rdev->vb[i+2])*0.5f);
rdev->vb[i+3] = f2d(d2f(rdev->vb[i+3])*0.5f);
}
}
} else {
for (i = 0; i < rdev->vb_size; i += 2) {
rdev->vb[i+0] = f2d(d2f(rdev->vb[i+0])*0.5f);
rdev->vb[i+1] = f2d(d2f(rdev->vb[i+1])*0.5f);
}
}
/* Prepare Cb plane */
radeon_waitfifo( rdrv, rdev, 5 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset_cb );
radeon_out32( mmio, RB3D_COLORPITCH, rdev->dst_pitch/2 );
radeon_out32( mmio, RE_TOP_LEFT, (clip->y1/2 << 16) |
(clip->x1/2 & 0xffff) );
radeon_out32( mmio, RE_BOTTOM_RIGHT, (clip->y2/2 << 16) |
(clip->x2/2 & 0xffff) );
if (DFB_BLITTING_FUNCTION(rdev->accel)) {
radeon_out32( mmio, PP_TFACTOR_0, rdev->cb_cop );
if (s420) {
radeon_waitfifo( rdrv, rdev, 3 );
radeon_out32( mmio, PP_TEX_SIZE_0, ((rdev->src_height/2-1) << 16) |
((rdev->src_width/2-1) & 0xffff) );
radeon_out32( mmio, PP_TEX_PITCH_0, rdev->src_pitch/2 - 32 );
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset_cb );
}
} else {
radeon_out32( mmio, PP_TFACTOR_1, rdev->cb_cop );
}
/* Fill Cb plane */
EMIT_VERTICES( rdrv, rdev, mmio );
/* Prepare Cr plane */
radeon_waitfifo( rdrv, rdev, 2 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset_cr );
if (DFB_BLITTING_FUNCTION(rdev->accel)) {
radeon_out32( mmio, PP_TFACTOR_0, rdev->cr_cop );
if (s420) {
radeon_waitfifo( rdrv, rdev, 1 );
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset_cr );
}
} else {
radeon_out32( mmio, PP_TFACTOR_1, rdev->cr_cop );
}
/* Fill Cr plane */
EMIT_VERTICES( rdrv, rdev, mmio );
/* Reset */
radeon_waitfifo( rdrv, rdev, 5 );
radeon_out32( mmio, RB3D_COLOROFFSET, rdev->dst_offset );
radeon_out32( mmio, RB3D_COLORPITCH, rdev->dst_pitch );
radeon_out32( mmio, RE_TOP_LEFT, (clip->y1 << 16) |
(clip->x1 & 0xffff) );
radeon_out32( mmio, RE_BOTTOM_RIGHT, (clip->y2 << 16) |
(clip->x2 & 0xffff) );
if (DFB_BLITTING_FUNCTION(rdev->accel)) {
radeon_out32( mmio, PP_TFACTOR_0, rdev->y_cop );
if (s420) {
radeon_waitfifo( rdrv, rdev, 3 );
radeon_out32( mmio, PP_TEX_SIZE_0, ((rdev->src_height-1) << 16) |
((rdev->src_width-1) & 0xffff) );
radeon_out32( mmio, PP_TEX_PITCH_0, rdev->src_pitch - 32 );
radeon_out32( mmio, PP_TXOFFSET_0, rdev->src_offset );
}
} else {
radeon_out32( mmio, PP_TFACTOR_1, rdev->y_cop );
}
}
rdev->vb_size = 0;
rdev->vb_count = 0;
}
void Genefx_Bop_prev( GenefxState *gfxs )
{
int pitch = gfxs->src_pitch;
if (gfxs->src_caps & DSCAPS_SEPARATED) {
gfxs->Bop_field++;
if (gfxs->Bop_field & 1)
gfxs->Bop[0] += gfxs->src_field_offset - pitch;
else
gfxs->Bop[0] -= gfxs->src_field_offset;
}
else
gfxs->Bop[0] -= pitch;
if (DFB_PLANAR_PIXELFORMAT(gfxs->src_format)) {
if (gfxs->src_format == DSPF_YV12 || gfxs->src_format == DSPF_I420) {
if (gfxs->BopY & 1) {
if (gfxs->src_caps & DSCAPS_SEPARATED) {
if (gfxs->Bop_field & 2) {
gfxs->Bop[1] += gfxs->src_field_offset/4 - pitch/2;
gfxs->Bop[2] += gfxs->src_field_offset/4 - pitch/2;
}
else {
gfxs->Bop[1] -= gfxs->src_field_offset/4;
gfxs->Bop[2] -= gfxs->src_field_offset/4;
}
}
else {
gfxs->Bop[1] -= pitch/2;
gfxs->Bop[2] -= pitch/2;
}
}
}
else if (gfxs->src_format == DSPF_YV16) {
if (gfxs->src_caps & DSCAPS_SEPARATED) {
if (gfxs->Bop_field & 2) {
gfxs->Bop[1] += gfxs->src_field_offset/2 - pitch/2;
gfxs->Bop[2] += gfxs->src_field_offset/2 - pitch/2;
}
else {
gfxs->Bop[1] -= gfxs->src_field_offset/2;
gfxs->Bop[2] -= gfxs->src_field_offset/2;
}
}
else {
gfxs->Bop[1] -= pitch/2;
gfxs->Bop[2] -= pitch/2;
}
}
else if (gfxs->src_format == DSPF_NV12 || gfxs->src_format == DSPF_NV21) {
if (gfxs->BopY & 1) {
if (gfxs->src_caps & DSCAPS_SEPARATED) {
if (gfxs->Bop_field & 2)
gfxs->Bop[1] += gfxs->src_field_offset/2 - pitch;
else
gfxs->Bop[1] -= gfxs->src_field_offset/2;
}
else {
gfxs->Bop[1] -= pitch;
}
}
}
else if (gfxs->src_format == DSPF_YUV444P) {
if (gfxs->src_caps & DSCAPS_SEPARATED) {
if (gfxs->Bop_field & 1) {
gfxs->Bop[1] += gfxs->src_field_offset - pitch;
gfxs->Bop[2] += gfxs->src_field_offset - pitch;
}
else {
gfxs->Bop[1] -= gfxs->src_field_offset;
gfxs->Bop[2] -= gfxs->src_field_offset;
}
}
else {
gfxs->Bop[1] -= pitch;
gfxs->Bop[2] -= pitch;
}
}
else { /* NV16 */
if (gfxs->src_caps & DSCAPS_SEPARATED) {
if (gfxs->Bop_field & 1)
gfxs->Bop[1] += gfxs->src_field_offset - pitch;
else
gfxs->Bop[1] -= gfxs->src_field_offset;
}
else {
gfxs->Bop[1] -= pitch;
}
}
}
gfxs->BopY--;
}
void Genefx_Aop_next( GenefxState *gfxs )
{
int pitch = gfxs->dst_pitch;
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
gfxs->Aop_field++;
if (gfxs->Aop_field & 1)
gfxs->Aop[0] += gfxs->dst_field_offset;
else
gfxs->Aop[0] += pitch - gfxs->dst_field_offset;
}
else
gfxs->Aop[0] += pitch;
if (DFB_PLANAR_PIXELFORMAT(gfxs->dst_format)) {
if (gfxs->dst_format == DSPF_YV12 || gfxs->dst_format == DSPF_I420) {
if (gfxs->AopY & 1) {
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
if (gfxs->Aop_field & 2) {
gfxs->Aop[1] += gfxs->dst_field_offset/4;
gfxs->Aop[2] += gfxs->dst_field_offset/4;
}
else {
gfxs->Aop[1] += pitch/2 - gfxs->dst_field_offset/4;
gfxs->Aop[2] += pitch/2 - gfxs->dst_field_offset/4;
}
}
else {
gfxs->Aop[1] += pitch/2;
gfxs->Aop[2] += pitch/2;
}
}
}
else if (gfxs->dst_format == DSPF_YV16) {
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
if (gfxs->Aop_field & 2) {
gfxs->Aop[1] += gfxs->dst_field_offset/2;
gfxs->Aop[2] += gfxs->dst_field_offset/2;
}
else {
gfxs->Aop[1] += pitch/2 - gfxs->dst_field_offset/2;
gfxs->Aop[2] += pitch/2 - gfxs->dst_field_offset/2;
}
}
else {
gfxs->Aop[1] += pitch/2;
gfxs->Aop[2] += pitch/2;
}
}
else if (gfxs->dst_format == DSPF_NV12 || gfxs->dst_format == DSPF_NV21) {
if (gfxs->AopY & 1) {
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
if (gfxs->Aop_field & 2)
gfxs->Aop[1] += gfxs->dst_field_offset/2;
else
gfxs->Aop[1] += pitch - gfxs->dst_field_offset/2;
}
else {
gfxs->Aop[1] += pitch;
}
}
}
else if (gfxs->dst_format == DSPF_YUV444P) {
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
if (gfxs->Aop_field & 1) {
gfxs->Aop[1] += gfxs->dst_field_offset;
gfxs->Aop[2] += gfxs->dst_field_offset;
}
else {
gfxs->Aop[1] += pitch - gfxs->dst_field_offset;
gfxs->Aop[2] += pitch - gfxs->dst_field_offset;
}
}
else {
gfxs->Aop[1] += pitch;
gfxs->Aop[2] += pitch;
}
}
else { /* NV16 */
if (gfxs->dst_caps & DSCAPS_SEPARATED) {
if (gfxs->Aop_field & 1)
gfxs->Aop[1] += gfxs->dst_field_offset;
else
gfxs->Aop[1] += pitch - gfxs->dst_field_offset;
}
else {
gfxs->Aop[1] += pitch;
}
}
}
gfxs->AopY++;
}
static DFBResult
sh7722SetRegion( CoreLayer *layer,
void *driver_data,
void *layer_data,
void *region_data,
CoreLayerRegionConfig *config,
CoreLayerRegionConfigFlags updated,
CoreSurface *surface,
CorePalette *palette,
CoreSurfaceBufferLock *left_lock,
CoreSurfaceBufferLock *right_lock )
{
int n;
SH7722DriverData *sdrv = driver_data;
SH7722DeviceData *sdev = sdrv->dev;
SH7722MultiRegionData *sreg = region_data;
D_DEBUG_AT( SH7722_Layer, "%s()\n", __FUNCTION__ );
D_MAGIC_ASSERT( sreg, SH7722MultiRegionData );
fusion_skirmish_prevail( &sdev->beu_lock );
/* Wait for idle BEU. */
BEU_Wait( sdrv, sdev );
n = sreg->index;
D_ASSERT( n >= 0 );
D_ASSERT( n <= 3 );
/* Update position? */
if (updated & CLRCF_DEST) {
/* Set horizontal and vertical offset. */
SH7722_SETREG32( sdrv, BMLOCR(n), (config->dest.y << 16) | config->dest.x );
}
/* Update size? */
if (updated & (CLRCF_WIDTH | CLRCF_HEIGHT)) {
/* Set width and height. */
SH7722_SETREG32( sdrv, BMSSZR(n), (config->height << 16) | config->width );
}
/* Update surface? */
if (updated & CLRCF_SURFACE) {
CoreSurfaceBuffer *buffer;
D_ASSERT( surface != NULL );
buffer = left_lock->buffer;
D_ASSERT( buffer != NULL );
/* Set buffer pitch. */
SH7722_SETREG32( sdrv, BMSMWR(n), left_lock->pitch );
/* Set buffer offset (Y plane or RGB packed). */
SH7722_SETREG32( sdrv, BMSAYR(n), left_lock->phys );
/* Set buffer offset (UV plane). */
if (DFB_PLANAR_PIXELFORMAT(buffer->format)) {
D_ASSUME( buffer->format == DSPF_NV12 || buffer->format == DSPF_NV16 );
SH7722_SETREG32( sdrv, BMSACR(n), left_lock->phys + left_lock->pitch * surface->config.size.h );
}
}
/* Update format? */
if (updated & CLRCF_FORMAT) {
unsigned long tBMSIFR = 0;
/* Set pixel format. */
switch (config->format) {
case DSPF_NV12:
tBMSIFR |= CHRR_YCBCR_420;
break;
case DSPF_NV16:
tBMSIFR |= CHRR_YCBCR_422;
break;
case DSPF_ARGB:
tBMSIFR |= RPKF_ARGB;
break;
case DSPF_RGB32:
tBMSIFR |= RPKF_RGB32;
break;
case DSPF_RGB24:
tBMSIFR |= RPKF_RGB24;
break;
case DSPF_RGB16:
tBMSIFR |= RPKF_RGB16;
break;
default:
break;
}
/* FIXME: all regions need to have the same format! */
SH7722_SETREG32( sdrv, BMSIFR, tBMSIFR );
}
SH7722_SETREG32( sdrv, BMWCR0, SH7722_GETREG32( sdrv, BMWCR0 ) | (1 << n) );
fusion_skirmish_dismiss( &sdev->beu_lock );
return DFB_OK;
}
static DFBResult
sh7722SetRegion( CoreLayer *layer,
void *driver_data,
void *layer_data,
void *region_data,
CoreLayerRegionConfig *config,
CoreLayerRegionConfigFlags updated,
CoreSurface *surface,
CorePalette *palette,
CoreSurfaceBufferLock *left_lock,
CoreSurfaceBufferLock *right_lock )
{
int n;
SH7722DriverData *sdrv = driver_data;
SH7722DeviceData *sdev = sdrv->dev;
SH7722RegionData *sreg = region_data;
SH7722LayerData *slay = layer_data;
D_DEBUG_AT( SH7722_Layer, "%s()\n", __FUNCTION__ );
D_MAGIC_ASSERT( sreg, SH7722RegionData );
n = slay->layer - SH7722_LAYER_INPUT1;
D_ASSERT( n >= 0 );
D_ASSERT( n <= 2 );
fusion_skirmish_prevail( &sdev->beu_lock );
/* Update position? */
if (updated & CLRCF_DEST) {
/* libshbeu: Set horizontal and vertical offset. */
sdev->shbeu_src[n].x = config->dest.x;
sdev->shbeu_src[n].y = config->dest.y;
}
/* Update size? */
if (updated & (CLRCF_WIDTH | CLRCF_HEIGHT)) {
int cw = config->width;
int ch = config->height;
if (config->dest.x + cw > sdev->lcd_width)
cw = sdev->lcd_width - config->dest.x;
if (config->dest.y + ch > sdev->lcd_height)
ch = sdev->lcd_height - config->dest.y;
/* libshbeu: Set width and height. */
sdev->shbeu_src[n].s.h = ch;
sdev->shbeu_src[n].s.w = cw;
}
/* Update surface? */
if (updated & CLRCF_SURFACE) {
CoreSurfaceBuffer *buffer = left_lock->buffer;
/* libshbeu: Set buffer pitch. */
sdev->shbeu_src[n].s.pitch = left_lock->pitch / DFB_BYTES_PER_PIXEL(buffer->format);
/* libshbeu: Set buffer offset (Y plane or RGB packed). */
sdev->shbeu_src[n].s.py = left_lock->addr;
sdev->shbeu_src[n].s.pc = NULL;
sdev->shbeu_src[n].s.pa = NULL;
/* libshbeu: Set alpha plane to same physical address as RGB plane if layer uses alpha */
if (DFB_PIXELFORMAT_HAS_ALPHA(buffer->format) && (config->options & DLOP_ALPHACHANNEL))
sdev->shbeu_src[n].s.pa = left_lock->addr;
/* Set buffer offset (UV plane). */
if (DFB_PLANAR_PIXELFORMAT(buffer->format)) {
D_ASSUME( buffer->format == DSPF_NV12 || buffer->format == DSPF_NV16 );
sdev->shbeu_src[n].s.pc = left_lock->addr + left_lock->pitch * surface->config.size.h;
}
sreg->surface = surface;
}
/* Update format? */
if (updated & CLRCF_FORMAT) {
/* Set pixel format. */
switch (config->format) {
case DSPF_NV12:
sdev->shbeu_src[n].s.format = REN_NV12;
break;
case DSPF_NV16:
sdev->shbeu_src[n].s.format = REN_NV16;
break;
case DSPF_ARGB:
case DSPF_RGB32:
sdev->shbeu_src[n].s.format = REN_RGB32;
break;
case DSPF_RGB24:
sdev->shbeu_src[n].s.format = REN_BGR24;
break;
case DSPF_RGB16:
sdev->shbeu_src[n].s.format = REN_RGB565;
break;
/* Currently not supported
case DSPF_LUT8:
sdev->shbeu_src[n].s.format = REN_PAL8; //FIXME: implement in libshbeu
break;
*/
default:
break;
}
}
/* Update options or opacity? */
if (updated & (CLRCF_OPTIONS | CLRCF_OPACITY | CLRCF_FORMAT)) {
/* libshbeu: Set opacity value. */
sdev->shbeu_src[n].alpha = (config->options & DLOP_OPACITY) ? config->opacity : 0xff;
/* libshbeu: Enable/disable alpha channel. */
if ((config->options & DLOP_ALPHACHANNEL) && DFB_PIXELFORMAT_HAS_ALPHA(config->format))
sdev->shbeu_src[n].s.pa = sdev->shbeu_src[n].s.py;
else
sdev->shbeu_src[n].s.pa = 0;
}
//TODO: Implement CLUT in libshbeu
/*
// Update CLUT?
if (updated & CLRCF_PALETTE && palette) {
const DFBColor *entries = palette->entries;
for (i=0; i<256; i++) {
SH7722_SETREG32( sdrv, BCLUT(i), PIXEL_ARGB( entries[i].a,
entries[i].r,
entries[i].g,
entries[i].b ) );
}
}
*/
/* Enable or disable input. */
if ((config->options & DLOP_OPACITY) && !config->opacity)
sdev->input_mask &= ~(1 << n);
else
sdev->input_mask |= (1 << n);
fusion_skirmish_dismiss( &sdev->beu_lock );
sreg->config = *config;
return DFB_OK;
}