void ovl_get_info(int idx, void *data)
{
int i = 0;
OVL_BASIC_STRUCT *pdata = (OVL_BASIC_STRUCT *) data;
unsigned int idx_offset = idx * DISP_OVL_INDEX_OFFSET;
unsigned int layer_off = 0;
unsigned int src_on = DISP_REG_GET(DISP_REG_OVL_SRC_CON + idx_offset);
OVL_BASIC_STRUCT *p = NULL;
memset(pdata, 0, sizeof(OVL_BASIC_STRUCT) * OVL_LAYER_NUM);
if (ovl_get_status() == DDP_OVL1_STATUS_SUB || ovl_get_status() == DDP_OVL1_STATUS_IDLE) { /* 4+4 mode */
/* idx=0; */
idx_offset = idx * DISP_OVL_INDEX_OFFSET;
src_on = DISP_REG_GET(DISP_REG_OVL_SRC_CON + idx_offset);
for (i = 0; i < OVL_LAYER_NUM_PER_OVL; i++) {
layer_off = (i % 4) * OVL_LAYER_OFFSET + idx_offset;
p = &pdata[i];
p->layer = i;
p->layer_en = src_on & (0x1 << i);
if (p->layer_en) {
p->fmt =
(unsigned int)
ovl_input_fmt(DISP_REG_GET_FIELD
(L_CON_FLD_CFMT, layer_off + DISP_REG_OVL_L0_CON),
DISP_REG_GET_FIELD(L_CON_FLD_BTSW,
layer_off +
DISP_REG_OVL_L0_CON));
p->addr = DISP_REG_GET(layer_off + DISP_REG_OVL_L0_ADDR);
p->src_w =
DISP_REG_GET(layer_off + DISP_REG_OVL_L0_SRC_SIZE) & 0xfff;
p->src_h =
(DISP_REG_GET(layer_off + DISP_REG_OVL_L0_SRC_SIZE) >> 16) &
0xfff;
p->src_pitch =
DISP_REG_GET(layer_off + DISP_REG_OVL_L0_PITCH) & 0xffff;
p->bpp =
ovl_input_fmt_bpp(DISP_REG_GET_FIELD
(L_CON_FLD_CFMT,
layer_off + DISP_REG_OVL_L0_CON));
}
DDPMSG("ovl_get_info:layer%d,en %d,w %d,h %d,bpp %d,addr %lu\n",
i, p->layer_en, p->src_w, p->src_h, p->bpp, p->addr);
}
void ovl_dump_analysis(DISP_MODULE_ENUM module)
{
int i = 0;
unsigned int layer_offset = 0;
unsigned int rdma_offset = 0;
int index = (module==DISP_MODULE_OVL0)?0:1;
unsigned int offset = index*DISP_INDEX_OFFSET;
unsigned int src_on = DISP_REG_GET(DISP_REG_OVL_SRC_CON+offset);
DDPMSG("==DISP OVL%d ANALYSIS==\n", index);
DDPMSG("ovl_en=%d,layer_enable(%d,%d,%d,%d),bg(w=%d, h=%d),"
"cur_pos(x=%d,y=%d),layer_hit(%d,%d,%d,%d)\n",
DISP_REG_GET(DISP_REG_OVL_EN+offset),
DISP_REG_GET(DISP_REG_OVL_SRC_CON+offset)&0x1,
(DISP_REG_GET(DISP_REG_OVL_SRC_CON+offset)>>1)&0x1,
(DISP_REG_GET(DISP_REG_OVL_SRC_CON+offset)>>2)&0x1,
(DISP_REG_GET(DISP_REG_OVL_SRC_CON+offset)>>3)&0x1,
DISP_REG_GET(DISP_REG_OVL_ROI_SIZE+offset)&0xfff,
(DISP_REG_GET(DISP_REG_OVL_ROI_SIZE+offset)>>16)&0xfff,
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_ROI_X, DISP_REG_OVL_ADDCON_DBG+offset),
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_ROI_Y, DISP_REG_OVL_ADDCON_DBG+offset),
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_L0_WIN_HIT, DISP_REG_OVL_ADDCON_DBG+offset),
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_L1_WIN_HIT, DISP_REG_OVL_ADDCON_DBG+offset),
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_L2_WIN_HIT, DISP_REG_OVL_ADDCON_DBG+offset),
DISP_REG_GET_FIELD(ADDCON_DBG_FLD_L3_WIN_HIT, DISP_REG_OVL_ADDCON_DBG+offset)
);
for (i = 0; i < 4; i++) {
layer_offset = i * 0x20 + offset;
rdma_offset = i * 0x4 + offset;
if (src_on & (0x1<<i)) {
DDPMSG("layer%d: w=%d,h=%d,off(x=%d,y=%d),pitch=%d,addr=0x%x,fmt=%s, source=%s\n",
i,
DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_SRC_SIZE)&0xfff,
(DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_SRC_SIZE)>>16)&0xfff,
DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_OFFSET)&0xfff,
(DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_OFFSET)>>16)&0xfff,
DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_PITCH)&0xffff,
DISP_REG_GET(layer_offset+DISP_REG_OVL_L0_ADDR),
ovl_intput_format_name(
DISP_REG_GET_FIELD(L_CON_FLD_CFMT, DISP_REG_OVL_L0_CON+layer_offset),
DISP_REG_GET_FIELD(L_CON_FLD_BTSW, DISP_REG_OVL_L0_CON+layer_offset)),
(DISP_REG_GET_FIELD(L_CON_FLD_LARC, DISP_REG_OVL_L0_CON+layer_offset)==0)?"memory":"constant_color"
);
DDPMSG("ovl rdma%d status:(en %d)\n", i, DISP_REG_GET(layer_offset+DISP_REG_OVL_RDMA0_CTRL));
}
}
void wdma_dump_analysis(DISP_MODULE_ENUM module)
{
unsigned int index = wdma_index(module);
unsigned int idx_offst = index*DISP_WDMA_INDEX_OFFSET;
DDPDUMP("==DISP WDMA%d ANALYSIS==\n",index);
DDPDUMP("wdma%d:en=%d,w=%d,h=%d,clip=(%d,%d,%d,%d),pitch=(W=%d,UV=%d),addr=(0x%x,0x%x,0x%x),fmt=%s\n",
index,
DISP_REG_GET(DISP_REG_WDMA_EN+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_SRC_SIZE+idx_offst)&0x3fff,
(DISP_REG_GET(DISP_REG_WDMA_SRC_SIZE+idx_offst)>>16)&0x3fff,
DISP_REG_GET(DISP_REG_WDMA_CLIP_COORD+idx_offst)&0x3fff,
(DISP_REG_GET(DISP_REG_WDMA_CLIP_COORD+idx_offst)>>16)&0x3fff,
DISP_REG_GET(DISP_REG_WDMA_CLIP_SIZE+idx_offst)&0x3fff,
(DISP_REG_GET(DISP_REG_WDMA_CLIP_SIZE+idx_offst)>>16)&0x3fff,
DISP_REG_GET(DISP_REG_WDMA_DST_W_IN_BYTE+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_DST_UV_PITCH+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_DST_ADDR0+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_DST_ADDR1+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_DST_ADDR2+idx_offst),
fmt_string(fmt_type(
(DISP_REG_GET(DISP_REG_WDMA_CFG+idx_offst)>>4)&0xf,
(DISP_REG_GET(DISP_REG_WDMA_CFG+idx_offst)>>11)&0x1
))
);
DDPDUMP("wdma%d:status=%s,in_req=%d,in_ack=%d, exec=%d, input_pixel=(L:%d,P:%d)\n",
index,
wdma_get_status(DISP_REG_GET_FIELD(FLOW_CTRL_DBG_FLD_WDMA_STA_FLOW_CTRL, DISP_REG_WDMA_FLOW_CTRL_DBG+idx_offst)),
DISP_REG_GET_FIELD(EXEC_DBG_FLD_WDMA_IN_REQ, DISP_REG_WDMA_FLOW_CTRL_DBG+idx_offst),
DISP_REG_GET_FIELD(EXEC_DBG_FLD_WDMA_IN_ACK, DISP_REG_WDMA_FLOW_CTRL_DBG+idx_offst),
DISP_REG_GET(DISP_REG_WDMA_EXEC_DBG+idx_offst)&0x1f,
(DISP_REG_GET(DISP_REG_WDMA_CT_DBG+idx_offst)>>16)&0xffff,
DISP_REG_GET(DISP_REG_WDMA_CT_DBG+idx_offst)&0xffff
);
return;
}
