Exemplo n.º 1
0
UINT32 mt65xx_disp_get_lcd_time(void)
{
#if 0
	UINT32 time0, time1, lcd_time;
	mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);

    LCD_CHECK_RET(LCD_WaitForNotBusy());

	time0 = gpt4_tick2time_us(gpt4_get_current_tick());
    LCD_CHECK_RET(LCD_StartTransfer(FALSE));

	if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
		DSI_clk_HS_mode(1);
		DSI_CHECK_RET(DSI_EnableClk());
	}
	else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
		DSI_clk_HS_mode(1);
		DPI_CHECK_RET(DPI_EnableClk());
		DSI_CHECK_RET(DSI_EnableClk());
	}
    LCD_CHECK_RET(LCD_WaitForNotBusy());

	time1 = gpt4_tick2time_us(gpt4_get_current_tick());

	lcd_time = time1 - time0;
	printf("lcd one %d \n", lcd_time);
	if(0 != lcd_time)	
		return (100000000/lcd_time);
	else
#endif
		return (6000);
}
Exemplo n.º 2
0
DISP_STATUS DISP_UpdateScreen(UINT32 x, UINT32 y, UINT32 width, UINT32 height)
{

    LCD_CHECK_RET(LCD_WaitForNotBusy());

    if ((lcm_drv->update) &&
	   ((lcm_params->type==LCM_TYPE_DBI) || ((lcm_params->type==LCM_TYPE_DSI) && (lcm_params->dsi.mode==CMD_MODE))))
		{
        lcm_drv->update(x, y, width, height);
    }	

    LCD_CHECK_RET(LCD_SetRoiWindow(x, y, width, height));
    LCD_CHECK_RET(LCD_FBSetStartCoord(x, y));

    LCD_CHECK_RET(LCD_StartTransfer(FALSE));

	if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
		DSI_clk_HS_mode(1);
		DSI_CHECK_RET(DSI_EnableClk());
	}
	else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
		DSI_clk_HS_mode(1);
		DPI_CHECK_RET(DPI_EnableClk());
		DSI_CHECK_RET(DSI_EnableClk());
	}
	
    return DISP_STATUS_OK;
}
static unsigned int lcm_compare_id()
{
  unsigned int id = 0;
  unsigned int lcd_id=0;
  unsigned char buffer[4];
  unsigned int data_array[16];
  SET_RESET_PIN(1);  //TE:should reset LCM firstly
  MDELAY(1);
  SET_RESET_PIN(0);
  MDELAY(20);
  SET_RESET_PIN(1);
  MDELAY(120);
  #ifdef BUILD_LK
    DSI_clk_HS_mode(1);
  #endif
  MDELAY(10);
  #ifdef BUILD_LK
    DSI_clk_HS_mode(0);
  #endif
 //data_array[0]=0x00063902;
 //data_array[1]=0x52AA55F0; // SET password
 //data_array[2]=0x00000108; 
 push_table(lcm_read_lcm_compare_id, sizeof(lcm_read_lcm_compare_id) / sizeof(struct LCM_setting_table), 1);
 read_reg_v2(0xF4, buffer, 3);
 
 id = buffer[0]; //we only need ID 0x00 0x80 0x00
 #ifndef BUILD_LK
   printk("<6>zhangjun [lcm_compare_id %x,%x,%x\n",buffer[0],buffer[1],buffer[2]);
 #else
   printf("<6>zhangjun [lcm_compare_id %x,%x,%x\n",buffer[0],buffer[1],buffer[2]);
 #endif
	if(0x79!= id)
		return 0;

	mt_set_gpio_mode(GPIO_LCM_ID, GPIO_LCM_ID_M_GPIO);
	mt_set_gpio_dir(GPIO_LCM_ID, GPIO_DIR_IN);		
	mt_set_gpio_pull_enable(GPIO_LCM_ID,GPIO_PULL_DISABLE);
	mt_set_gpio_pull_select(GPIO_LCM_ID,GPIO_PULL_DOWN);
	MDELAY(1);
	lcd_id =  mt_get_gpio_in(GPIO_LCM_ID);
#ifndef BUILD_LK
	printk("<6>vendor jingtai [lcm_compare_id] lcd_id =%x\n",lcd_id);
#else
	printf("<6>vendor jingtai [lcm_compare_id] lcd_id =%x\n",lcd_id);
#endif

	if(lcd_id)
		return 0;
	else
		return 1;

}
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(BOOL isMuextLocked)
{
    disp_drv_dsi_init_context();

    DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

    //DSI_CHECK_RET(DSI_handle_TE());
    
    DSI_SetMode(lcm_params->dsi.mode);
#ifndef MT65XX_NEW_DISP
    LCD_CHECK_RET(LCD_StartTransfer(FALSE, isMuextLocked));
#endif

    if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
        //if(1 != lcm_params->dsi.compatibility_for_nvk)
        if(1)
        {
            DSI_clk_HS_mode(1);
        }

        #ifndef MT65XX_NEW_DISP
            DSI_CHECK_RET(DSI_Start());
        #else
            DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
        #endif
    }
    else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
    {
        DSI_clk_HS_mode(1);
        #ifndef MT65XX_NEW_DISP
            DPI_CHECK_RET(DPI_EnableClk());
            DSI_CHECK_RET(DSI_Start());
        #else
            DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
        #endif
        #ifndef BUILD_UBOOT
            is_video_mode_running = true;
            
            if(lcm_params->dsi.noncont_clock)
                DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);
            
            if(lcm_params->dsi.lcm_int_te_monitor)
                DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);
        
        #endif		
    }
    
    if (DDMS_capturing)
        DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");		
    
    return DISP_STATUS_OK;
}
static void lcm_init(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_init\n");

	/* step1: sn65dsi8x enbable and init */
	/* GPIO42       VDD18_LVDS for SN65DSI83 power */
	lcm_set_gpio_output(GPIO_LCD_PWR2_EN, GPIO_OUT_ONE);
	MDELAY(20);

	/* GPIO127       LVDS_EN_R for SN65DSI83 */
	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE);
	MDELAY(5);

	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ZERO);
	MDELAY(20);

	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE);
	MDELAY(50);

	DSI_clk_HS_mode(0, NULL, 1);
	MDELAY(5);

	init_sn65dsi8x();
	MDELAY(10);

	/* step 2 :lvds lcd init */
	/* GPIO131        VDD33_LCD */
	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
	MDELAY(50);

	/* VGP6_PMU       AVDDVGH/VGL/VCOM for panel power */
	upmu_set_rg_vgp6_vosel(0x7);
	upmu_set_rg_vgp6_sw_en(0x1);

	/* GPIO103       LCM_RST for panel */
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ZERO);
	MDELAY(50);

	/* GPIO102       LCM_STBY_2V8 for panel */
	lcm_set_gpio_output(GPIO_LCD_STB_EN, GPIO_OUT_ONE);
#elif (defined BUILD_UBOOT)
#else
	pr_debug("[Kernel/LCM]lcm_init\n");

	DSI_clk_HS_mode(0, NULL, 1);
#endif
}
Exemplo n.º 6
0
static irqreturn_t _DSI_InterruptHandler(int irq, void *dev_id)
{   
    DSI_INT_STATUS_REG status = DSI_REG->DSI_INTSTA;

    if (status.RD_RDY)
    {        
        ///write clear RD_RDY interrupt
        DSI_REG->DSI_INTSTA.RD_RDY = 1;   

        /// write clear RD_RDY interrupt must be before DSI_RACK
        /// because CMD_DONE will raise after DSI_RACK, 
        /// so write clear RD_RDY after that will clear CMD_DONE too
        
		do
        {
            ///send read ACK
            DSI_REG->DSI_RACK.DSI_RACK = 1;
        } while(DSI_REG->DSI_STA.BUSY);

		wake_up_interruptible(&_dsi_dcs_read_wait_queue);
    }

    if (status.CMD_DONE)
    {
        DSI_REG->DSI_INTSTA.CMD_DONE = 1;
    	// Go back to LP mode.
    	DSI_clk_HS_mode(0);
        wake_up_interruptible(&_dsi_wait_queue);
    }

    return IRQ_HANDLED;
}
Exemplo n.º 7
0
static DISP_STATUS dsi_init(UINT32 fbVA, UINT32 fbPA, BOOL isLcmInited)
{
	if (!disp_drv_dsi_init_context())
		return DISP_STATUS_NOT_IMPLEMENTED;

	if(lcm_params->dsi.mode == CMD_MODE)
	{
		init_dsi(isLcmInited);
		MASKREG32(DSI_BASE + 0x10, 0x2, 0x2);
		if (NULL != lcm_drv->init && !isLcmInited)
		{
			lcm_drv->init();
			DSI_LP_Reset();
		}

		DSI_clk_HS_mode(1);

		DSI_SetMode(lcm_params->dsi.mode);
	}
	else {
        if (!isLcmInited)
        {
	        	//DSI_SetMode(0);
	       	 	//mdelay(100);
	        	//DSI_Stop();
        }
        else
        {
            is_video_mode_running = true;
        }
		
	init_dsi(isLcmInited);

	MASKREG32(DSI_BASE + 0x10, 0x2, 0x2);
	if (NULL != lcm_drv->init && !isLcmInited)
	{
		lcm_drv->init();
		DSI_LP_Reset();
	}

	DSI_SetMode(lcm_params->dsi.mode);
	}

	RDMASetTargetLine(0, lcm_params->height*4/5);

    dsi_config_ddp(fbPA);
	DPI_PowerOn();
	DPI_PowerOff();
#ifdef SPM_SODI_ENABLED
    if(lcm_params->dsi.mode == CMD_MODE)
    {
        spm_sodi_lcm_video_mode(FALSE);
    }
    else
    {
        spm_sodi_lcm_video_mode(TRUE);
    }
#endif
	return DISP_STATUS_OK;
}
static void lcm_resume(void)
{
	unsigned int data_array[1];

	MDELAY(5);
if(wakeup_by_swipe == false){
	//reset_lcd_module(0);
	//MDELAY(10); //seosc
	ldo_p5m5_dsv_5v5_on();
	MDELAY(5);
	reset_lcd_module(0);
	MDELAY(1);
	reset_lcd_module(1);
	MDELAY(1);
	reset_lcd_module(0);
	MDELAY(50);
}else{
	LCM_PRINT("[LCD] lcm_resume wakeup_by_swipe\n");
}
	DSI_clk_HS_mode(1);
	MDELAY(120);

	dsi_set_cmdq_V3(lcm_initialization_pre_sleep_out_V3, sizeof(lcm_initialization_pre_sleep_out_V3) / sizeof(LCM_setting_table_V3), 1);
	MDELAY(120);
	dsi_set_cmdq_V3(lcm_initialization_post_sleep_out_V3, sizeof(lcm_initialization_post_sleep_out_V3) / sizeof(LCM_setting_table_V3), 1);


	need_set_lcm_addr = 1;
	LCM_PRINT("[LCD] lcm_resume\n");
}
Exemplo n.º 9
0
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
    if (enable)
    {
        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {		
            DSI_SetMode(CMD_MODE);
        }
        mutex_lock(pLcmCmdMutex);
		//#ifdef MTK_DISP_CONFIG_SUPPORT
		if(get_fbconfig_start_lcm_config())
		{
		fbconfig_apply_new_lcm_setting();
		//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
		}
		else
		//#endif
        lcm_drv->resume();

        mutex_unlock(pLcmCmdMutex);

        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {
            //DSI_clk_HS_mode(1);
            DSI_WaitForNotBusy();
            DSI_SetMode(lcm_params->dsi.mode);
        }
    }
    else
    {
        LCD_CHECK_RET(LCD_WaitForNotBusy());
        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
            DSI_CHECK_RET(DSI_WaitForNotBusy());

        if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {		
            DPI_CHECK_RET(DPI_DisableClk());
            //msleep(200);
            DSI_Reset();
            DSI_clk_HS_mode(0);
            DSI_SetMode(CMD_MODE);
        }

        mutex_lock(pLcmCmdMutex);
		//#ifdef MTK_DISP_CONFIG_SUPPORT
		if(get_fbconfig_start_lcm_config())
		{
		fbconfig_apply_new_lcm_setting();
		//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
		}
		else
		//#endif
        lcm_drv->suspend();
        mutex_unlock(pLcmCmdMutex);
    }
    return 0;
}
static void lcm_resume(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_resume enter\n");

#else
#ifdef SN65DSI_DEBUG
	unsigned char temp;
#endif

	pr_debug("[Kernel/LCM]lcm_resume enter\n");

	DSI_clk_HS_mode(0, NULL, 1);
	MDELAY(50);

	/* step 1 resume sn65dsi8x */
	lcm_set_gpio_output(GPIO_LCD_PWR2_EN, GPIO_OUT_ONE);
	MDELAY(10);

	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE);
	MDELAY(5);

	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ZERO);
	MDELAY(20);

	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE);
	MDELAY(10);

	init_sn65dsi8x();
	MDELAY(10);

#ifdef SN65DSI_DEBUG
	sn65dsi83_read_byte(0x0a, &temp);
	pr_debug("lcm_resume cmd-- 0x0a=0x%x\n", temp);

	sn65dsi83_read_byte(0x0d, &temp);
	pr_debug("lcm_resume cmd-- 0x0d=0x%x\n", temp);

	sn65dsi83_read_byte(0x09, &temp);
	pr_debug("lcm_resume cmd-- 0x09=0x%x\n", temp);
#endif

	/* step 2 resume lvds */
	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
	MDELAY(50);

	/* hwPowerOn(MT65XX_POWER_LDO_VGP6, VOL_3300, "LCM"); */
	lcm_vgp_supply_enable();
	MDELAY(30);

	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ONE);
	MDELAY(5);

	lcm_set_gpio_output(GPIO_LCD_STB_EN, GPIO_OUT_ONE);
	MDELAY(5);
#endif
}
Exemplo n.º 11
0
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(void)
{
    disp_drv_dsi_init_context();

    DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

    //DSI_CHECK_RET(DSI_handle_TE());

    DSI_SetMode(lcm_params->dsi.mode);

    LCD_CHECK_RET(LCD_StartTransfer(FALSE));

    if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
        DSI_clk_HS_mode(1);
        DSI_CHECK_RET(DSI_EnableClk());
    }
    else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
    {
#ifndef BUILD_UBOOT
        spin_lock(&g_handle_esd_lock);
#endif
        DSI_clk_HS_mode(1);
        DPI_CHECK_RET(DPI_EnableClk());
        DSI_CHECK_RET(DSI_EnableClk());

#ifndef BUILD_UBOOT
        dsi_vdo_streaming = true;

        if(lcm_params->dsi.noncont_clock)
            DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);

        if(lcm_params->dsi.lcm_int_te_monitor)
            DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);

        spin_unlock(&g_handle_esd_lock);
#endif
    }

    if (DDMS_capturing)
        DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");

    return DISP_STATUS_OK;
}
Exemplo n.º 12
0
// called by "esd_recovery_kthread"
// protected by sem_early_suspend, sem_update_screen
void dsi_esd_reset(void)
{
     	/// we assume the power is on here
    	///  what we need is some setting for LCM init
   	if(lcm_params->dsi.mode == CMD_MODE)
	{
        	DSI_clk_HS_mode(0);
        	DSI_clk_ULP_mode(0);
        	DSI_lane0_ULP_mode(0);
    	}
	else
	{
		DSI_SetMode(CMD_MODE);
        	DSI_clk_HS_mode(0);
		// clock/data lane go to Ideal
		DSI_Reset();
	}

}
Exemplo n.º 13
0
static void lcm_suspend(void)
{
    unsigned int data_array[16];
    
    data_array[0] = 0x00280500;  //display off                        
    dsi_set_cmdq(data_array, 1, 1);
    MDELAY(5);
    lcd_reset(0);
    lcd_power_en(0);
    DSI_clk_HS_mode(0);
    MDELAY(10);
}
static void lcm_init(void)
{
	DSI_clk_HS_mode(1);
	MDELAY(120);
	init_lcm_registers();	/* SET EXTC ~ sleep out register */

	MDELAY(120);

	/* init_lcm_registers_added();     //Display On */
	need_set_lcm_addr = 1;
	LCM_PRINT("[SEOSCTEST] lcm_init \n");
	LCM_PRINT("[LCD] lcm_init \n");
}
Exemplo n.º 15
0
DISP_STATUS DISP_PanelEnable(BOOL enable)
{

    static BOOL s_enabled = FALSE;

    disp_drv_init_context();

    if (!lcm_drv->suspend || !lcm_drv->resume) {
        return DISP_STATUS_NOT_IMPLEMENTED;
    }

	if (enable && !s_enabled) {
		s_enabled = TRUE;

		if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
		{		
			DSI_SetMode(CMD_MODE);
		}

		lcm_drv->resume();

		if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
		{
			//DSI_clk_HS_mode(1);
			DSI_SetMode(lcm_params->dsi.mode);
			
			//DPI_CHECK_RET(DPI_EnableClk());
			//DSI_CHECK_RET(DSI_EnableClk());
		}
	}
	else if (!enable && s_enabled)
	{
		LCD_CHECK_RET(LCD_WaitForNotBusy());
		if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
			DSI_CHECK_RET(DSI_WaitForNotBusy());
		s_enabled = FALSE;

		if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
		{		
			DPI_CHECK_RET(DPI_DisableClk());
			udelay(200*1000);
			DSI_Reset();
			DSI_clk_HS_mode(0);
			DSI_SetMode(CMD_MODE);
		}

		lcm_drv->suspend();
	}

    return DISP_STATUS_OK;
}
static void lcm_suspend(void)
{
#ifndef BUILD_LK
	unsigned char temp;
 
	///step 1 power down lvds lcd
	mt_set_gpio_mode(LVDS_MIPI2_VCC_EN, GPIO_MODE_00);
    mt_set_gpio_dir(LVDS_MIPI2_VCC_EN, GPIO_DIR_OUT);
    mt_set_gpio_out(LVDS_MIPI2_VCC_EN, GPIO_OUT_ZERO);
	MDELAY(10);
    mt_set_gpio_mode(LVDS_LCM_STBY, GPIO_MODE_00);    
    mt_set_gpio_dir(LVDS_LCM_STBY, GPIO_DIR_OUT);
    mt_set_gpio_out(LVDS_LCM_STBY, GPIO_OUT_ZERO); // LCM_STBY     
    MDELAY(50);
    //mt_set_gpio_mode(LVDS_LCM_RESET, GPIO_MODE_00);    
   // mt_set_gpio_dir(LVDS_LCM_RESET, GPIO_DIR_IN);
   // mt_set_gpio_out(LVDS_LCM_RESET, GPIO_OUT_ZERO); // LCM_RST
    
	 MDELAY(20);
	mt_set_gpio_mode(LVDS_LCM_BIASON, GPIO_MODE_00);	
	 mt_set_gpio_dir(LVDS_LCM_BIASON, GPIO_DIR_OUT);
	 mt_set_gpio_out(LVDS_LCM_BIASON, GPIO_OUT_ZERO); // LCMBIASON :VGH VHL

    MDELAY(30); // avoid LCD resume transint
    mt_set_gpio_mode(LVDS_LCM_VCC, GPIO_MODE_00);    
    mt_set_gpio_dir(LVDS_LCM_VCC, GPIO_DIR_OUT);
    mt_set_gpio_out(LVDS_LCM_VCC, GPIO_OUT_ZERO); // / LCM VCC :enable LCD VCC
   //step 2 suspend sn65dsi8x
	sn65dsi83_read_byte(0x0a,&temp);//for test wether ti lock the pll clok
	printk("lcm_suspend  0x0a  value=0x%x \n",temp);

	sn65dsi83_read_byte(0x0d,&temp);
    	printk("lcm_suspend  0x0d  value=0x%x \n",temp);
       sn65dsi83_write_byte(0x0d, (temp&0xfe));//set bit0: 0
       //mt_set_gpio_out(GPIO133, GPIO_OUT_ZERO);
	   
      //step 3 set dsi LP mode
	DSI_clk_HS_mode(0);
	//DSI_no_continuous_clock();  
	//step 4:ldo power off
	lvds_kernel_power_deinit();
#else
printf("tM070ddh06--suspend \n");	

#endif	
    
}
Exemplo n.º 17
0
static void lcm_suspend(void)
{
	  unsigned int data_array[16];
  #ifdef BUILD_LK
		printf("%s, LK \n", __func__);
#else
		pr_debug("%s, kernel", __func__);
#endif
    data_array[0] = 0x00280500;  //display off                        
	  dsi_set_cmdq(data_array, 1, 1);
	  MDELAY(5);
	  lcd_bl_en(0);
    lcd_reset(0);
    lcd_power_en(0);
	  DSI_clk_HS_mode(0);
	  MDELAY(10);
}
static void lcm_suspend(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_suspend enter\n");
#else
	unsigned char temp;

	pr_debug("[Kernel/LCM]lcm_suspend enter\n");

	lcm_set_gpio_output(GPIO_LCD_PWR2_EN, GPIO_OUT_ZERO);
	MDELAY(30);		/* avoid LCD resume transint */

	/* step 1 power down lvds lcd */
	lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ZERO);
	MDELAY(10);

	/* LCMBIASON :VGH VHL */
	lcm_vgp_supply_enable();
	MDELAY(20);

	lcm_vgp_supply_disable();
	MDELAY(20);

	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ZERO);	/* LCM VCC :enable LCD VCC */
	MDELAY(20);

	lcm_set_gpio_output(GPIO_LCD_STB_EN, GPIO_OUT_ZERO);
	MDELAY(20);

	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ZERO);	/* LCM_STBY */
	MDELAY(50);

	/* step 2 suspend sn65dsi8x */
	sn65dsi83_read_byte(0x0a, &temp);	/* for test wether ti lock the pll clok */
	pr_debug("lcm_suspend  0x0a  value=0x%x\n", temp);

	sn65dsi83_read_byte(0x0d, &temp);
	pr_debug("lcm_suspend  0x0d  value=0x%x\n", temp);

	sn65dsi83_write_byte(0x0d, (temp & 0xfe));	/* set bit0: 0 */

	/* step 3 set dsi LP mode */
	DSI_clk_HS_mode(0, NULL, 0);
#endif
}
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
    if (enable)
    {
        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {		
            DSI_SetMode(CMD_MODE);
        }
        mutex_lock(pLcmCmdMutex);
        lcm_drv->resume();

        if(lcm_drv->check_status)
            lcm_drv->check_status();

        DSI_LP_Reset();
        mutex_unlock(pLcmCmdMutex);

        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {
            //DSI_clk_HS_mode(1);
            DSI_WaitForNotBusy();
            DSI_SetMode(lcm_params->dsi.mode);
        }
    }
    else
    {
        LCD_CHECK_RET(LCD_WaitForNotBusy());
        if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
            DSI_CHECK_RET(DSI_WaitForNotBusy());

        if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
        {		
            DPI_CHECK_RET(DPI_DisableClk());
            //msleep(200);
            //DSI_Reset();
            DSI_clk_HS_mode(0);
            DSI_SetMode(CMD_MODE);
        }

        mutex_lock(pLcmCmdMutex);
        lcm_drv->suspend();
        mutex_unlock(pLcmCmdMutex);
    }
    return 0;
}
Exemplo n.º 20
0
static void init_lcm_registers(void)
{
	  unsigned int data_array[16];
	  
		#ifdef BUILD_LK
		printf("%s, LK \n", __func__);
    #else
		pr_debug("%s, kernel", __func__);
    #endif
	  
	  data_array[0] = 0x00010500;  //software reset					 
	  dsi_set_cmdq(data_array, 1, 1);
  	MDELAY(10);
	DSI_clk_HS_mode(1);
	  MDELAY(80);
	  
	  data_array[0] = 0x00290500;  //display on                        
	  dsi_set_cmdq(data_array, 1, 1);
}
static void lcm_suspend(void)
{
	unsigned int data_array[16];
	dsi_set_cmdq_V3(lcm_initialization_sleep_in_V3, sizeof(lcm_initialization_sleep_in_V3) / sizeof(LCM_setting_table_V3), 1);

	MDELAY(120);
	lcm_set_pwm_for_mix(0);
	MDELAY(16);

	DPI_DisableClk();
	DSI_Reset();
	DSI_clk_HS_mode(1);
	DSI_SetMode(0);
	/* MDELAY(1); */

    dsi_set_cmdq_V3(lcm_suspend_ULPS_for_data0_in_V3, sizeof(lcm_suspend_ULPS_for_data0_in_V3) / sizeof(LCM_setting_table_V3), 1);
	MDELAY(200);
	LCM_PRINT("[LCD] lcm_suspend\n");
}
Exemplo n.º 22
0
unsigned int disphal_check_lcm(UINT32 color)
{
	unsigned int ret = 0;
    if(LCM_TYPE_DBI == lcm_params->type){//DBI not support
    	LCD_Check_LCM(color);
    }
    else if(LCM_TYPE_DPI == lcm_params->type){//DPI
    	ret = DPI_Check_LCM();
    }
    else if(LCM_TYPE_DSI == lcm_params->type){ //dsi 
		ret = DSI_Check_LCM(color);
		if(lcm_params->dsi.mode != CMD_MODE){
			DSI_SetMode(lcm_params->dsi.mode);
			DSI_clk_HS_mode(1);
       		DSI_CHECK_RET(DSI_StartTransfer(FALSE));
		}
    }
    else
    {
        printk("DISP_AutoTest():unknown interface\n");
        ret = 0;
    }
	return ret;
}
Exemplo n.º 23
0
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
    disp_drv_dsi_init_context();
    
    if(lcm_params->dsi.mode == CMD_MODE) {
    
        if (enable) {
            #if 0
                // Switch bus to MIPI TX.
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                DSI_PHY_clk_switch(TRUE, lcm_params);
                DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                DSI_CHECK_RET(DSI_PowerOn());
                DSI_WaitForNotBusy();		
                DSI_clk_HS_mode(0);
                DSI_clk_ULP_mode(0);			
                DSI_lane0_ULP_mode(0);	
                DSI_Reset();
                LCD_CHECK_RET(LCD_PowerOn());

            #else
                #ifndef MT65XX_NEW_DISP
                    DSI_PHY_clk_switch(TRUE, lcm_params); 
                    DSI_CHECK_RET(DSI_PowerOn());
                    if(Need_Wait_ULPS())
                        Wait_ULPS_Mode();
                    
                    DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);

                #else
                    // enable MMSYS CG
                    DSI_CHECK_RET(DSI_PowerOn());

                    // initialize clock setting
                    DSI_PHY_clk_setting(lcm_params);
					
					// initialize dsi timing
                    DSI_PHY_TIMCONFIG(lcm_params);

                    // restore dsi register
                    DSI_CHECK_RET(DSI_RestoreRegisters());

                    // enable sleep-out mode
                    DSI_CHECK_RET(DSI_SleepOut());

                    // enter HS mode
                    DSI_PHY_clk_switch(TRUE, lcm_params); 

                    // enter wakeup
                    DSI_CHECK_RET(DSI_Wakeup());

                    // enable clock
                    DSI_CHECK_RET(DSI_EnableClk());

                    // engine reset
                    DSI_Reset();
                #endif
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                
                #ifndef MT65XX_NEW_DISP
                    Wait_WakeUp();
                #endif
            
            #endif
        }
        else {
            // backup dsi register
            DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
            DSI_CHECK_RET(DSI_BackupRegisters());

            // enter ULPS mode
            DSI_clk_ULP_mode(1);
            DSI_lane0_ULP_mode(1);
            mdelay(1);
            
            // disable engine clock
            DSI_CHECK_RET(DSI_DisableClk());
            
            // disable CG
            DSI_CHECK_RET(DSI_PowerOff());

            // disable mipi pll
            DSI_PHY_clk_switch(FALSE, lcm_params);

            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
    } 
    else {
        if (enable) {
            #if 0
                // Switch bus to MIPI TX.
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                DSI_PHY_clk_switch(TRUE, lcm_params);
                DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                DSI_CHECK_RET(DSI_PowerOn());			
                DSI_clk_ULP_mode(0);			
                DSI_lane0_ULP_mode(0);
                DSI_clk_HS_mode(0);	
                DSI_Reset();
                DPI_CHECK_RET(DPI_PowerOn());
                LCD_CHECK_RET(LCD_PowerOn());
            #else
                #ifndef MT65XX_NEW_DISP
                    DSI_PHY_clk_switch(TRUE, lcm_params); 
                    DSI_CHECK_RET(DSI_PowerOn());
                    if(Need_Wait_ULPS())
                        Wait_ULPS_Mode();
                    
                    DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                #else
                    needStartDSI = true;

                    // enable MMSYS CG
                    DSI_CHECK_RET(DSI_PowerOn());

                    // initialize clock setting
                    DSI_PHY_clk_setting(lcm_params);
					
					// initialize dsi timing
                    DSI_PHY_TIMCONFIG(lcm_params);

                    // restore dsi register
                    DSI_CHECK_RET(DSI_RestoreRegisters());

                    // enable sleep-out mode
                    DSI_CHECK_RET(DSI_SleepOut());
                    
                    // enter HS mode
                    DSI_PHY_clk_switch(TRUE, lcm_params); 

                    // enter wakeup
                    DSI_CHECK_RET(DSI_Wakeup());

                    // enable clock
                    DSI_CHECK_RET(DSI_EnableClk());

                    // engine reset
                    DSI_Reset();

                #endif
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                
                #ifndef MT65XX_NEW_DISP
                    Wait_WakeUp();
                #endif
            #endif
        }
        else {
            #ifndef BUILD_UBOOT
                is_video_mode_running = false;
                
                if(lcm_params->dsi.noncont_clock)
                    DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
                
                if(lcm_params->dsi.lcm_int_te_monitor)
                    DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
            #endif

            // backup dsi register
            DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
            DSI_CHECK_RET(DSI_BackupRegisters());

            // enter ULPS mode
            DSI_clk_ULP_mode(1);
            DSI_lane0_ULP_mode(1);
            mdelay(1);

            // disable engine clock
            DSI_CHECK_RET(DSI_DisableClk());

            // disable CG
            DSI_CHECK_RET(DSI_PowerOff());

            // disable mipi pll
            DSI_PHY_clk_switch(FALSE, lcm_params);

            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
    }
    
    return DISP_STATUS_OK;
}
Exemplo n.º 24
0
static DISP_STATUS dsi_init(UINT32 fbVA, UINT32 fbPA, BOOL isLcmInited)
{
	if (!disp_drv_dsi_init_context()) 
		return DISP_STATUS_NOT_IMPLEMENTED;

	if(lcm_params->dsi.mode == CMD_MODE) {
#ifndef MT65XX_NEW_DISP
		init_lcd();
#endif
		init_dsi(isLcmInited);

		if (NULL != lcm_drv->init && !isLcmInited) 
		{
			lcm_drv->init();
			DSI_LP_Reset();
		}
#ifndef MT65XX_NEW_DISP
		DSI_clk_HS_mode(0);
#else
		DSI_clk_HS_mode(1);
#endif
		DSI_SetMode(lcm_params->dsi.mode);
#ifndef MT65XX_NEW_DISP
		DPI_PowerOn();
		DPI_PowerOff();

		init_lcd_te_control();
#endif
	}
	else {
#ifndef MT65XX_NEW_DISP
		init_intermediate_buffers(fbPA);

	    init_lcd();
		init_dpi(isLcmInited);
#endif
        if (!isLcmInited)
        {
        DSI_SetMode(0);
        mdelay(100);
        DSI_DisableClk();
        }
        else
        {
            is_video_mode_running = true;
        }
		init_dsi(isLcmInited);

		if (NULL != lcm_drv->init && !isLcmInited) {
			lcm_drv->init();
			DSI_LP_Reset();
		}

		DSI_SetMode(lcm_params->dsi.mode);

#ifndef BUILD_UBOOT	
#ifndef MT65XX_NEW_DISP
		if(lcm_params->dsi.lcm_ext_te_monitor)
		{
			is_video_mode_running = false;
			LCD_TE_SetMode(LCD_TE_MODE_VSYNC_ONLY);
			LCD_TE_SetEdgePolarity(LCM_POLARITY_RISING);
			LCD_TE_Enable(FALSE);
		}

		if(lcm_params->dsi.noncont_clock)
			DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);

		if(lcm_params->dsi.lcm_int_te_monitor)
			DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);			
#endif
#endif			
	}
#ifdef MT65XX_NEW_DISP
		{
			struct disp_path_config_struct config = {0};
			config.srcModule = DISP_MODULE_OVL;
				config.bgROI.x = 0;
				config.bgROI.y = 0;
				config.bgROI.width = DISP_GetScreenWidth();
				config.bgROI.height = DISP_GetScreenHeight();
				config.bgColor = 0x0;	// background color
	
				config.pitch = DISP_GetScreenWidth()*2;
				config.srcROI.x = 0;config.srcROI.y = 0;
				config.srcROI.height= DISP_GetScreenHeight();config.srcROI.width= DISP_GetScreenWidth();
				config.ovl_config.source = OVL_LAYER_SOURCE_MEM; 
	
        if(lcm_params->dsi.mode != CMD_MODE)
        {
            config.ovl_config.layer = FB_LAYER;
            config.ovl_config.layer_en = 0;
            disp_path_get_mutex();
            disp_path_config_layer(&config.ovl_config);
            disp_path_release_mutex();
            disp_path_wait_reg_update();
        }
        // Config FB_Layer port to be physical.
        {
            M4U_PORT_STRUCT portStruct;
            portStruct.ePortID = M4U_PORT_OVL_CH3;		   //hardware port ID, defined in M4U_PORT_ID_ENUM
            portStruct.Virtuality = 1;
            portStruct.Security = 0;
            portStruct.domain = 3;			  //domain : 0 1 2 3
            portStruct.Distance = 1;
            portStruct.Direction = 0;
            m4u_config_port(&portStruct);
        }
        config.ovl_config.layer = FB_LAYER;
        config.ovl_config.layer_en = 1; 
        config.ovl_config.fmt = OVL_INPUT_FORMAT_RGB565;
        config.ovl_config.addr = fbPA;	
        config.ovl_config.source = OVL_LAYER_SOURCE_MEM; 
        config.ovl_config.src_x = 0;
        config.ovl_config.src_y = 0;
        config.ovl_config.dst_x = 0;	   // ROI
        config.ovl_config.dst_y = 0;
        config.ovl_config.dst_w = DISP_GetScreenWidth();
        config.ovl_config.dst_h = DISP_GetScreenHeight();
        config.ovl_config.src_pitch = ALIGN_TO(DISP_GetScreenWidth(),32)*2; //pixel number
        config.ovl_config.keyEn = 0;
        config.ovl_config.key = 0xFF;	   // color key
        config.ovl_config.aen = 0;			  // alpha enable
        config.ovl_config.alpha = 0;	

        LCD_LayerSetAddress(FB_LAYER, fbPA);
        LCD_LayerSetFormat(FB_LAYER, LCD_LAYER_FORMAT_RGB565);
        LCD_LayerSetOffset(FB_LAYER, 0, 0);
        LCD_LayerSetSize(FB_LAYER,DISP_GetScreenWidth(),DISP_GetScreenHeight());
        LCD_LayerSetPitch(FB_LAYER, ALIGN_TO(DISP_GetScreenWidth(),32) * 2);
        LCD_LayerEnable(FB_LAYER, TRUE);                    
        if(lcm_params->dsi.mode == CMD_MODE)
            config.dstModule = DISP_MODULE_DSI_CMD;// DISP_MODULE_WDMA1
        else
            config.dstModule = DISP_MODULE_DSI_VDO;// DISP_MODULE_WDMA1
        config.outFormat = RDMA_OUTPUT_FORMAT_ARGB; 
        if(lcm_params->dsi.mode != CMD_MODE)
            disp_path_get_mutex();

        disp_path_config(&config);

        if(lcm_params->dsi.mode != CMD_MODE)
            disp_path_release_mutex();

        // Disable LK UI layer (Layer2)
        if(lcm_params->dsi.mode != CMD_MODE)
        {
            config.ovl_config.layer = FB_LAYER-1;
            config.ovl_config.layer_en = 0;
            disp_path_get_mutex();
            disp_path_config_layer(&config.ovl_config);
            disp_path_release_mutex();
            disp_path_wait_reg_update();
        }

        // Config LK UI layer port to be physical.
        {
            M4U_PORT_STRUCT portStruct;
            portStruct.ePortID = M4U_PORT_OVL_CH2;		   //hardware port ID, defined in M4U_PORT_ID_ENUM
            portStruct.Virtuality = 1;
            portStruct.Security = 0;
            portStruct.domain = 3;			  //domain : 0 1 2 3
            portStruct.Distance = 1;
            portStruct.Direction = 0;
            m4u_config_port(&portStruct);
        }
		}
#endif

	return DISP_STATUS_OK;
}
//<2012/10/11-14948-stevenchen, [Hawk40] Modify the infrastructure of LCM auto detection.
static unsigned int lcm_compare_id(void)
{
#ifdef LCM_DETECT_BY_PIN
	#if defined( BUILD_UBOOT ) || defined(BUILD_LK)
       //<2012/10/26-15740-stevenchen, [Hawk40] Init GPIO before reading LCM ID pin.
  		SET_GPIO_MODE( GPIO_LCM_ID_PIN, GPIO_LCM_ID_PIN_M_GPIO );
  		SET_GPIO_DIR_IN( GPIO_LCM_ID_PIN );
	//>2012/10/26-15740-stevenchen
		printf("[uboot/lk][Steven] LCM auto detect by ID pin \n");
		printf("[uboot/lk][Steven] ID pin = %d \n", mt_get_gpio_in(GPIO_LCM_ID_PIN));
	#endif
	//<2012/10/17-15296-stevenchen, [Hawk40] Modify HIGH/LOW definitions of LCM.
	/* Tianma LCM ID pin = LOW */
	return (mt_get_gpio_in(GPIO_LCM_ID_PIN)) ? 0 : 1;
	//>2012/10/17-15296-stevenchen
#else
	unsigned int id1 = 0, id2 = 0;
	unsigned char buffer[2];

	unsigned int data_array[16];
	
	//<2012/10/17-15290-stevenchen, [HAWK40] Fix reading LCM id is unstable.
	#if defined( BUILD_UBOOT ) || defined(BUILD_LK)
	DSI_clk_HS_mode(1);
	MDELAY(10);
	DSI_clk_HS_mode(0);
	#endif
	//>2012/10/17-15290-stevenchen

	SET_RESET_PIN(1);  //NOTE:should reset LCM firstly
	MDELAY(10);
	SET_RESET_PIN(0);
	MDELAY(10);
	SET_RESET_PIN(1);
	MDELAY(10);	

/*	
	data_array[0] = 0x00110500;		// Sleep Out
	dsi_set_cmdq(data_array, 1, 1);
	MDELAY(120);
*/
		
//*************Enable CMD2 Page1  *******************//
	data_array[0]=0x00063902;
	data_array[1]=0x52AA55F0;
	data_array[2]=0x00000108;
	dsi_set_cmdq(data_array, 3, 1);
	MDELAY(10); 

	data_array[0] = 0x00023700;// read id return two byte,version and id
	dsi_set_cmdq(data_array, 1, 1);
	MDELAY(10); 
	
	read_reg_v2(0xC5, buffer, 2);
	id1 = buffer[0]; //we only need ID
	id2 = buffer[1]; //we test buffer 1

//<2012/09/21-14199-stevenchen, [Hawk4.0] Add Novatek NT35510 LCM driver.
	#if defined( BUILD_UBOOT ) || defined(BUILD_LK)
		printf("[uboot/lk][Steven] %s, id1 = 0x%08X, id2 = 0x%08X\n", __func__, id1, id2 );
    	#else
		printk("[kernel][Steven] %s, id1 = 0x%08X, id2 = 0x%08X\n", __func__, id1, id2 );
	#endif
//>2012/09/21-14199-stevenchen

	#ifdef LCM_DETECT_BY_BOTH
		#if defined( BUILD_UBOOT ) || defined(BUILD_LK)
		//<2012/10/26-15740-stevenchen, [Hawk40] Init GPIO before reading LCM ID pin.
  			SET_GPIO_MODE( GPIO_LCM_ID_PIN, GPIO_LCM_ID_PIN_M_GPIO );
	  		SET_GPIO_DIR_IN( GPIO_LCM_ID_PIN );
		//>2012/10/26-15740-stevenchen
			printf( "[uboot/lk][Steven] LCM auto detect by ID & ID pin \n");
		#endif
	    	if(LCM_ID == id)
		{
			return 1;
		}
		else
		{
			/* Tianma LCM ID pin = HIGH */
			return (mt_get_gpio_in(GPIO_LCM_ID_PIN)) ? 1 : 0;
		}
	#else
		#if defined( BUILD_UBOOT ) || defined(BUILD_LK)
			printf( "[uboot/lk][Steven] LCM auto detect by ID \n");
		#endif
        	return (LCM_ID == id1)?1:0;
	#endif /* LCM_DETECT_BY_BOTH */
#endif /* LCM_DETECT_BY_PIN */ 
}
Exemplo n.º 26
0
static irqreturn_t _DPI_InterruptHandler(int irq, void *dev_id)
{   
    static int counter = 0;
    DPI_REG_INTERRUPT status = DPI_REG->INT_STATUS;
//    if (status.FIFO_EMPTY) ++ counter;

    if(status.VSYNC)
    {
        if(dpiIntCallback)
           dpiIntCallback(DISP_DPI_VSYNC_INT);
#ifndef BUILD_UBOOT
		if(atomic_read(&wait_dpi_vsync)){
			if(-1 != hrtimer_try_to_cancel(&hrtimer_vsync_dpi)){
				atomic_set(&wait_dpi_vsync, 0);
				atomic_set(&dpi_vsync, 1);
				wake_up_interruptible(&_vsync_wait_queue_dpi);
				hrtimer_start(&hrtimer_vsync_dpi, ktime_set(0, VSYNC_US_TO_NS(vsync_timer_dpi)), HRTIMER_MODE_REL);
			}
		}
#endif
    }

    if (status.VSYNC && counter) {
        DISP_LOG_PRINT(ANDROID_LOG_ERROR, "DPI", "[Error] DPI FIFO is empty, "
               "received %d times interrupt !!!\n", counter);
        counter = 0;
    }

	 if (status.FIFO_EMPTY)
	 {	 		
	 	int need_reset = 0;
	 	unsigned long long temp = sched_clock();

		unsigned int debug_while_loop_cnt = 0;
		volatile unsigned int dsi_state = INREG32(DSI_BASE+0x154);
		if((dsi_state & 0x1ff) == 0x80)
		{
			auto_sync_reset_count++;
			if(auto_sync_reset_count == 10)
			{
				auto_sync_reset_count = 0;
				need_reset = 2;
			}
		}
		else
		{
			auto_sync_reset_count = 0;
		}
		
		//printk("gmce,0x%08x, %d\n",(INREG32(DSI_BASE+0x154))&0x1ff, (unsigned int)(temp - last_fifo_empty_stamp));
		if(_fifo_empty_monitor_insert((unsigned int)(temp - last_fifo_empty_stamp)))
		{
			need_reset = 1;
		}
		
		last_fifo_empty_stamp = temp;
		if(need_reset)
		{
			unsigned int mode, suspend;

			mode = DSI_GetMode();
			suspend = DISP_GetSuspendMode();
			if ((mode != CMD_MODE) && !suspend)
			{      	
			DPI_DisableClk();
			#if 0
			while(1)
			{
				debug_while_loop_cnt++;
				dsi_state = INREG32(DSI_BASE+0x154);
				if((dsi_state &0x1ff) == 0x100) break;
				if(debug_while_loop_cnt > 0x1000000) 
				{
					printk("FATAL Error!! dsi in vact when dpi fifo empty, and can't into vfp until 0x100000 loops!!\n");
				}
	 }
			#endif

			DSI_clk_HS_mode(0);
			DSI_SetMode(CMD_MODE);
			DSI_Reset();
			DSI_SetMode(SYNC_PULSE_VDO_MODE);
			DSI_clk_HS_mode(1);
			DPI_EnableClk();
			DSI_EnableClk();
			}
			printk("[DSI/DPI]reset[%d] mode[%d], suspend[%d]\n", need_reset, mode, suspend);
			need_reset = 0;
		}		
	}
    _DPI_LogRefreshRate(status);
	OUTREG32(&DPI_REG->INT_STATUS, 0);
    return IRQ_HANDLED;
}
Exemplo n.º 27
0
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
	disp_drv_dsi_init_context();
	
	if(lcm_params->dsi.mode == CMD_MODE) {

		if (enable) {
#if 0
			// Switch bus to MIPI TX.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
			DSI_PHY_clk_switch(1);
			DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
			DSI_CHECK_RET(DSI_PowerOn());
			DSI_WaitForNotBusy();		
			DSI_clk_HS_mode(0);
			DSI_clk_ULP_mode(0);			
			DSI_lane0_ULP_mode(0);	
			DSI_Reset();
			LCD_CHECK_RET(LCD_PowerOn());
#else

			DSI_PHY_clk_switch(1); 
#ifndef MT65XX_NEW_DISP
			DSI_CHECK_RET(DSI_PowerOn());
			if(Need_Wait_ULPS())
				Wait_ULPS_Mode();
			
			DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else	
			if(lcm_params->dsi.pll_select == 1)
			{
					ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
  		  }
			DSI_PHY_clk_setting(lcm_params);
			DSI_CHECK_RET(DSI_PowerOn());
			DSI_clk_ULP_mode(0);			
			DSI_lane0_ULP_mode(0);
//			DSI_clk_HS_mode(1);	
#endif
			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

#ifndef MT65XX_NEW_DISP
			Wait_WakeUp();
			LCD_CHECK_RET(LCD_PowerOn());		
#endif

#endif
		} else {
#ifndef MT65XX_NEW_DISP
			LCD_CHECK_RET(LCD_PowerOff());
#endif
			DSI_clk_HS_mode(0);
			DSI_lane0_ULP_mode(1);
			DSI_clk_ULP_mode(1);
//			DSI_CHECK_RET(DSI_PowerOff());
			DSI_PHY_clk_switch(0);
			DSI_CHECK_RET(DSI_PowerOff());
			// Switch bus to GPIO, then power level will be decided by GPIO setting.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
			if(lcm_params->dsi.pll_select == 1)
				ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
		}
	} else {
	    if (enable) {
#if 0
			// Switch bus to MIPI TX.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
			DSI_PHY_clk_switch(1);
			DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
			DSI_CHECK_RET(DSI_PowerOn());			
			DSI_clk_ULP_mode(0);			
			DSI_lane0_ULP_mode(0);
			DSI_clk_HS_mode(0);	
			DSI_Reset();
			DPI_CHECK_RET(DPI_PowerOn());
			LCD_CHECK_RET(LCD_PowerOn());
#else
			DSI_PHY_clk_switch(1); 
#ifndef MT65XX_NEW_DISP
			DSI_CHECK_RET(DSI_PowerOn());
			if(Need_Wait_ULPS())
				Wait_ULPS_Mode();
			
			DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
			needStartDSI = true;
			if(lcm_params->dsi.pll_select == 1)
			{
					ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
			}
			DSI_PHY_clk_setting(lcm_params);
			DSI_CHECK_RET(DSI_PowerOn());
			DSI_clk_ULP_mode(0);			
			DSI_lane0_ULP_mode(0);
			DSI_clk_HS_mode(0);	
#endif
			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

#ifndef MT65XX_NEW_DISP
			Wait_WakeUp();
			DPI_CHECK_RET(DPI_PowerOn());
			LCD_CHECK_RET(LCD_PowerOn());		
#endif
#endif
	    } else {
#ifndef BUILD_UBOOT
			is_video_mode_running = false;
#ifndef MT65XX_NEW_DISP
			if(lcm_params->dsi.noncont_clock)
				DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
			
			if(lcm_params->dsi.lcm_int_te_monitor)
				DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
#endif
#ifndef MT65XX_NEW_DISP
			LCD_CHECK_RET(LCD_PowerOff());		
			DPI_CHECK_RET(DPI_PowerOff());
#endif
#if 1
			DSI_lane0_ULP_mode(1);
			DSI_clk_ULP_mode(1);	
			DSI_CHECK_RET(DSI_PowerOff());
#endif			
			DSI_PHY_clk_switch(0);
			// Switch bus to GPIO, then power level will be decided by GPIO setting.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
			if(lcm_params->dsi.pll_select == 1)
				ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
	    }
	}

    return DISP_STATUS_OK;
}
Exemplo n.º 28
0
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
    disp_drv_dsi_init_context();

    if(lcm_params->dsi.mode == CMD_MODE) {

        if (enable) {
#if 0
            // Switch bus to MIPI TX.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
            DSI_PHY_clk_switch(1);
            DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
            DSI_CHECK_RET(DSI_PowerOn());
            DSI_WaitForNotBusy();
            DSI_clk_HS_mode(0);
            DSI_clk_ULP_mode(0);
            DSI_lane0_ULP_mode(0);
            DSI_Reset();
            LCD_CHECK_RET(LCD_PowerOn());
#else

            DSI_PHY_clk_switch(1);
            DSI_CHECK_RET(DSI_PowerOn());
            if(Need_Wait_ULPS())
                Wait_ULPS_Mode();

            DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
            DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

            Wait_WakeUp();

            LCD_CHECK_RET(LCD_PowerOn());

#endif
        } else {
            LCD_CHECK_RET(LCD_PowerOff());
            DSI_clk_HS_mode(0);
            DSI_lane0_ULP_mode(1);
            DSI_clk_ULP_mode(1);
            DSI_CHECK_RET(DSI_PowerOff());
            DSI_PHY_clk_switch(0);
            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
    } else {
#if 0
#ifndef BUILD_UBOOT
        spin_lock(&g_handle_esd_lock);
#endif
#endif
        if (enable) {
#if 0
            // Switch bus to MIPI TX.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
            DSI_PHY_clk_switch(1);
            DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
            DSI_CHECK_RET(DSI_PowerOn());
            DSI_clk_ULP_mode(0);
            DSI_lane0_ULP_mode(0);
            DSI_clk_HS_mode(0);
            DSI_Reset();
            DPI_CHECK_RET(DPI_PowerOn());
            LCD_CHECK_RET(LCD_PowerOn());
#else
            DSI_PHY_clk_switch(1);
            DSI_CHECK_RET(DSI_PowerOn());
            if(Need_Wait_ULPS())
                Wait_ULPS_Mode();

            DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
            DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));

            Wait_WakeUp();

            DPI_CHECK_RET(DPI_PowerOn());
            LCD_CHECK_RET(LCD_PowerOn());
#endif
        } else {

#ifndef BUILD_UBOOT
            dsi_vdo_streaming = false;

            if(lcm_params->dsi.noncont_clock)
                DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);

            if(lcm_params->dsi.lcm_int_te_monitor)
                DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
            LCD_CHECK_RET(LCD_PowerOff());
            DPI_CHECK_RET(DPI_PowerOff());

            DSI_lane0_ULP_mode(1);
            DSI_clk_ULP_mode(1);
            DSI_CHECK_RET(DSI_PowerOff());

            DSI_PHY_clk_switch(0);
            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
#if 0
#ifndef BUILD_UBOOT
        spin_unlock(&g_handle_esd_lock);
#endif
#endif
    }

    return DISP_STATUS_OK;
}
Exemplo n.º 29
0
static DISP_STATUS dsi_init(UINT32 fbVA, UINT32 fbPA, BOOL isLcmInited)
{
    if (!disp_drv_dsi_init_context())
        return DISP_STATUS_NOT_IMPLEMENTED;

    if(lcm_params->dsi.mode == CMD_MODE) {

        init_lcd();
        init_dsi(isLcmInited);

        if (NULL != lcm_drv->init && !isLcmInited)
        {
            lcm_drv->init();
        }

        DSI_clk_HS_mode(0);

        DSI_SetMode(lcm_params->dsi.mode);

        DPI_PowerOn();
        DPI_PowerOff();

        init_lcd_te_control();
    }
    else {

#ifndef BUILD_UBOOT
        spin_lock(&g_handle_esd_lock);
#endif

        init_intermediate_buffers(fbPA);

        init_lcd();
        init_dpi(isLcmInited);
        init_dsi(isLcmInited);

        if (NULL != lcm_drv->init && !isLcmInited) {
            lcm_drv->init();
        }

        DSI_SetMode(lcm_params->dsi.mode);

#ifndef BUILD_UBOOT
        if(lcm_params->dsi.lcm_ext_te_monitor)
        {
            dsi_vdo_streaming = false;
            LCD_TE_SetMode(LCD_TE_MODE_VSYNC_ONLY);
            LCD_TE_SetEdgePolarity(LCM_POLARITY_RISING);
            LCD_TE_Enable(FALSE);
        }

        if(lcm_params->dsi.noncont_clock)
            DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);

        if(lcm_params->dsi.lcm_int_te_monitor)
            DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);

        spin_unlock(&g_handle_esd_lock);
#endif
    }

    return DISP_STATUS_OK;
}
Exemplo n.º 30
0
static DISP_STATUS dsi_init(UINT32 fbVA, UINT32 fbPA, BOOL isLcmInited)
{
    // DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
    if (!disp_drv_dsi_init_context()) 
        return DISP_STATUS_NOT_IMPLEMENTED;

    // DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
    if(lcm_params->dsi.mode == CMD_MODE) {
        #ifndef MT65XX_NEW_DISP
            init_lcd();
        #endif

        init_dsi(isLcmInited);
        mdelay(1);
        
        // DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
        if (NULL != lcm_drv->init && !isLcmInited) 
        {
            lcm_drv->init();
            DSI_LP_Reset();
        }
        // DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
        #ifndef MT65XX_NEW_DISP
            DSI_clk_HS_mode(0);
        #else
            DSI_clk_HS_mode(1);
        #endif

        // DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
        DSI_SetMode(lcm_params->dsi.mode);
        #ifndef MT65XX_NEW_DISP
            init_lcd_te_control();
        #endif
    }
    else {
        #ifndef MT65XX_NEW_DISP
            init_intermediate_buffers(fbPA);
            
            init_lcd();
            init_dpi(isLcmInited);
        #endif

        if (!isLcmInited)
        {
            DSI_SetMode(0);
            mdelay(100);
            DSI_Stop();
        }
        else
        {
            is_video_mode_running = true;
        }
        init_dsi(isLcmInited);
        mdelay(1);
        
        if (NULL != lcm_drv->init && !isLcmInited) {
            lcm_drv->init();
            DSI_LP_Reset();
        }
        
        DSI_SetMode(lcm_params->dsi.mode);
        
        #ifndef BUILD_UBOOT	
            if(lcm_params->dsi.lcm_ext_te_monitor)
            {
                is_video_mode_running = false;
                LCD_TE_SetMode(LCD_TE_MODE_VSYNC_ONLY);
                LCD_TE_SetEdgePolarity(LCM_POLARITY_RISING);
                LCD_TE_Enable(FALSE);
            }
            
            if(lcm_params->dsi.noncont_clock)
                DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
            
            if(lcm_params->dsi.lcm_int_te_monitor)
                DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);			
        #endif			
    }

#ifdef MT65XX_NEW_DISP
    {
        struct disp_path_config_struct config = {0};
        config.srcModule = DISP_MODULE_OVL;
        config.bgROI.x = 0;
        config.bgROI.y = 0;
        config.bgROI.width = DISP_GetScreenWidth();
        config.bgROI.height = DISP_GetScreenHeight();
        config.bgColor = 0x0;	// background color

        config.pitch = ALIGN_TO(DISP_GetScreenWidth(),32)*2;
        config.srcROI.x = 0;config.srcROI.y = 0;
        config.srcROI.height= DISP_GetScreenHeight();
        config.srcROI.width= DISP_GetScreenWidth();
        config.ovl_config.source = OVL_LAYER_SOURCE_MEM; 

        config.ovl_config.layer = FB_LAYER;
        config.ovl_config.layer_en = 1; 
        config.ovl_config.fmt = OVL_INPUT_FORMAT_RGB565;
        config.ovl_config.addr = fbPA;	
        config.ovl_config.vaddr = fbVA;	
        config.ovl_config.source = OVL_LAYER_SOURCE_MEM; 
        config.ovl_config.src_x = 0;
        config.ovl_config.src_y = 0;
        config.ovl_config.src_w = DISP_GetScreenWidth();
        config.ovl_config.src_h = DISP_GetScreenHeight();
        config.ovl_config.dst_x = 0;	   // ROI
        config.ovl_config.dst_y = 0;
        config.ovl_config.dst_w = DISP_GetScreenWidth();
        config.ovl_config.dst_h = DISP_GetScreenHeight();
        config.ovl_config.src_pitch = ALIGN_TO(DISP_GetScreenWidth(),32)*2; //pixel number
        config.ovl_config.keyEn = 0;
        config.ovl_config.key = 0xFF;	   // color key
        config.ovl_config.aen = 0;			  // alpha enable
        config.ovl_config.alpha = 0;	

        if(lcm_params->dsi.mode == CMD_MODE)
            config.dstModule = DISP_MODULE_DSI_CMD;// DISP_MODULE_WDMA1
        else
            config.dstModule = DISP_MODULE_DSI_VDO;// DISP_MODULE_WDMA1

        config.outFormat = RDMA_OUTPUT_FORMAT_ARGB; 

        LCD_LayerSetAddress(FB_LAYER, fbPA);
        LCD_LayerSetFormat(FB_LAYER, LCD_LAYER_FORMAT_RGB565);
        LCD_LayerSetOffset(FB_LAYER, 0, 0);
        LCD_LayerSetSize(FB_LAYER,DISP_GetScreenWidth(),DISP_GetScreenHeight());
        LCD_LayerSetPitch(FB_LAYER, ALIGN_TO(DISP_GetScreenWidth(),32) * 2);
        LCD_LayerEnable(FB_LAYER, TRUE);                    

#if defined(MTK_M4U_EXT_PAGE_TABLE)
        if(lcm_params->dsi.mode != CMD_MODE)
        {
            DSI_Wait_VDO_Idle();
            disp_path_get_mutex();
        }

        disp_path_config(&config);
        
        #if 1
        // Config FB_Layer port to be physical.
        {
            M4U_PORT_STRUCT portStruct;
            
            portStruct.ePortID = M4U_PORT_LCD_OVL;		   //hardware port ID, defined in M4U_PORT_ID_ENUM
            portStruct.Virtuality = 1;
            portStruct.Security = 0;
            portStruct.domain = 3;			  //domain : 0 1 2 3
            portStruct.Distance = 1;
            portStruct.Direction = 0;
            m4u_config_port(&portStruct);
        }
        // hook m4u debug callback function
        m4u_set_tf_callback(M4U_CLNTMOD_DISP, &disp_m4u_dump_reg);
        #endif

        if(lcm_params->dsi.mode != CMD_MODE)
        {
            disp_path_release_mutex();
            DSI_Start();
        }
        
#else
        if(lcm_params->dsi.mode != CMD_MODE){

            #define TIMECNT  1000000
            unsigned int reg1 = 0, reg2 = 0, reg3 = 0;
            unsigned int timeout_cnt = 0;
            unsigned int irq_mask;

            // dump before modification
            printk("[DISP] pa:0x%x, va:0x%x \n", fbPA, fbVA);		
            
            // enable frame done interrupt
            disp_path_get_mutex();
            OVLEnableIrq(0x2);
            disp_path_release_mutex();
            
            while (timeout_cnt < TIMECNT)
            {
                reg1 = DISP_REG_GET(DISP_REG_OVL_INTSTA);
                reg2 = DISP_REG_GET(DISP_REG_OVL_STA);
                // frame done interrupt
                if (((reg1 & 0x2) == 0x2) && ((reg2 & 0x1) == 0x0))
                {
                    DISP_REG_SET(DISP_REG_OVL_INTSTA, ~reg1);     

                    local_irq_save(irq_mask);
                    disp_path_get_mutex();
                    disp_path_config(&config);
                    disp_path_release_mutex();

                    #if 1  // defined(MTK_M4U_SUPPORT)
                    {
                        M4U_PORT_STRUCT portStruct;
                        
                        portStruct.ePortID = M4U_PORT_LCD_OVL;		   //hardware port ID, defined in M4U_PORT_ID_ENUM
                        portStruct.Virtuality = 1;
                        portStruct.Security = 0;
                        portStruct.domain = 3;			  //domain : 0 1 2 3
                        portStruct.Distance = 1;
                        portStruct.Direction = 0;
                        m4u_config_port(&portStruct);
                    }
                    // hook m4u debug callback function
                    m4u_set_tf_callback(M4U_CLNTMOD_DISP, &disp_m4u_dump_reg);
                    #endif
                    local_irq_restore(irq_mask);

                    break;
                }
                timeout_cnt++;
            }
            // sw timeout
            if (timeout_cnt >= TIMECNT)
            {
                printk("[DISP] timeout:%d \n", timeout_cnt);		
                ASSERT(0);
            }
            // dump after modification
            printk("[DISP] cnt:%d \n", timeout_cnt);		
        }
        else
        {
            disp_path_config(&config);

            #if 1  // defined(MTK_M4U_SUPPORT)
            {
                M4U_PORT_STRUCT portStruct;
                
                portStruct.ePortID = M4U_PORT_LCD_OVL;		   //hardware port ID, defined in M4U_PORT_ID_ENUM
                portStruct.Virtuality = 1;
                portStruct.Security = 0;
                portStruct.domain = 3;			  //domain : 0 1 2 3
                portStruct.Distance = 1;
                portStruct.Direction = 0;
                m4u_config_port(&portStruct);
            }
            // hook m4u debug callback function
            m4u_set_tf_callback(M4U_CLNTMOD_DISP, &disp_m4u_dump_reg);
            #endif
        }
#endif

    }
#endif

    printk("%s, config done\n", __func__);

    return DISP_STATUS_OK;
}