Exemplo n.º 1
0
void SetInterrupt(u32 _causemask, bool _bSet)
{
	_dbg_assert_msg_(POWERPC, Core::IsCPUThread(), "SetInterrupt from wrong thread");

	if (_bSet && !(m_InterruptCause & _causemask))
	{
		DEBUG_LOG(PROCESSORINTERFACE, "Setting Interrupt %s (set)", Debug_GetInterruptName(_causemask));
	}

	if (!_bSet && (m_InterruptCause & _causemask))
	{
		DEBUG_LOG(PROCESSORINTERFACE, "Setting Interrupt %s (clear)", Debug_GetInterruptName(_causemask));
	}

	if (_bSet)
		m_InterruptCause |= _causemask;
	else
		m_InterruptCause &= ~_causemask;// is there any reason to have this possibility?
		                                // F|RES: i think the hw devices reset the interrupt in the PI to 0
		                                // if the interrupt cause is eliminated. that isn't done by software (afaik)
	UpdateException();
}
Exemplo n.º 2
0
void SetInterrupt(u32 _causemask, bool _bSet)
{
	// TODO(ector): add sanity check that current thread id is cpu thread

	if (_bSet && !(m_InterruptCause & _causemask))
	{
		DEBUG_LOG(PROCESSORINTERFACE, "Setting Interrupt %s (set)", Debug_GetInterruptName(_causemask));
	}

	if (!_bSet && (m_InterruptCause & _causemask))
	{
		DEBUG_LOG(PROCESSORINTERFACE, "Setting Interrupt %s (clear)", Debug_GetInterruptName(_causemask));
	}

	if (_bSet)
		Common::AtomicOr(m_InterruptCause, _causemask);
	else
		Common::AtomicAnd(m_InterruptCause, ~_causemask);// is there any reason to have this possibility?
										// F|RES: i think the hw devices reset the interrupt in the PI to 0
										// if the interrupt cause is eliminated. that isnt done by software (afaik)
	UpdateException();
}