static DWORD WINAPI tick_func(void *arg)
{
int tick_counter = 0;
uint64 start = GetTicks_usec();
int64 ticks = 0;
uint64 next = GetTicks_usec();
while (!tick_thread_cancel) {
// Wait
next += 16625;
int64 delay = next - GetTicks_usec();
if (delay > 0)
Delay_usec(delay);
else if (delay < -16625)
next = GetTicks_usec();
ticks++;
// Pseudo Mac 1Hz interrupt, update local time
if (++tick_counter > 60) {
tick_counter = 0;
WriteMacInt32(0x20c, TimerDateTime());
}
// Trigger 60Hz interrupt
if (ReadMacInt32(XLM_IRQ_NEST) == 0) {
SetInterruptFlag(INTFLAG_VIA);
TriggerInterrupt();
}
}
uint64 end = GetTicks_usec();
D(bug("%lu ticks in %lu usec = %f ticks/sec\n", (unsigned long)ticks, (unsigned long)(end - start), ticks * 1000000.0 / (end - start)));
return 0;
}
void
TDAPA::PulseReset()
{
printf("pulse\n");
/* necessary delays already included in these methods */
OutReset(1);
Delay_usec(1000);
OutReset(0);
}
static DWORD WINAPI nvram_func(void *arg)
{
while (!nvram_thread_cancel) {
for (int i=0; i<60 && !nvram_thread_cancel; i++)
Delay_usec(999999); // Only wait 1 second so we quit promptly when nvram_thread_cancel becomes true
nvram_watchdog();
}
return 0;
}
void
TSASA::PulseReset()
{
close(dev_fd);
Delay_usec(1000);
dev_fd = open(dev_name, O_RDWR, 0);
if (dev_fd == -1) {
perror(dev_name);
throw Error_Device("Failed to reopen ppdev.");
}
}
static unsigned int WINAPI slirp_receive_func(void *arg)
{
D(bug("slirp_receive_func\n"));
thread_active_2 = true;
while (thread_active) {
// Wait for packets to arrive
fd_set rfds, wfds, xfds;
int nfds, ret, timeout;
// ... in the output queue
nfds = -1;
FD_ZERO(&rfds);
FD_ZERO(&wfds);
FD_ZERO(&xfds);
timeout = slirp_select_fill(&nfds, &rfds, &wfds, &xfds);
#if ! USE_SLIRP_TIMEOUT
timeout = 10000;
#endif
if (nfds < 0) {
/* Windows does not honour the timeout if there is not
descriptor to wait for */
Delay_usec(timeout);
ret = 0;
}
else {
struct timeval tv;
tv.tv_sec = 0;
tv.tv_usec = timeout;
ret = select(0, &rfds, &wfds, &xfds, &tv);
}
if (ret >= 0)
slirp_select_poll(&rfds, &wfds, &xfds);
}
D(bug("slirp_receive_func exit\n"));
thread_active_2 = false;
return 0;
}
void idle_wait(void)
{
#ifdef IDLE_USES_COND_WAIT
pthread_mutex_lock(&idle_lock);
pthread_cond_wait(&idle_cond, &idle_lock);
pthread_mutex_unlock(&idle_lock);
#else
#ifdef IDLE_USES_SEMAPHORE
LOCK_IDLE;
if (idle_sem_ok < 0)
idle_sem_ok = (sem_init(&idle_sem, 0, 0) == 0);
if (idle_sem_ok > 0) {
idle_sem_ok++;
UNLOCK_IDLE;
sem_wait(&idle_sem);
return;
}
UNLOCK_IDLE;
#endif
// Fallback: sleep 10 ms
Delay_usec(10000);
#endif
}
void
TSASA::SckDelay()
{
Delay_usec(5);
}
void
TDAPA::Init()
{
/* data=1, reset=0, sck=0 */
switch (pa_type) {
case PAT_DAPA:
par_ctrl = DAPA_SCK;
par_data = 0xFF;
par_data &= ~0x6; //0x6
par_data |= 0x0; //0x6
break;
case PAT_DAPA_2:
par_ctrl = DAPA_SCK;
par_data = 0xFF;
par_data &= ~0x6; //0x6
par_data |= 0x4; //0x6
break;
case PAT_STK200:
par_ctrl = 0;
par_data = 0xFF & ~(STK2_ENA1 | STK2_SCK);
break;
case PAT_ABB:
par_ctrl = ABB_EN;
par_data = 0xFF & ~ABB_SCK;
break;
case PAT_AVRISP:
par_ctrl = 0;
par_data = 0xFF & ~(AISP_ENA | AISP_SCK);
break;
case PAT_BSD:
par_ctrl = 0;
par_data = BSD_POWER | BSD_RESET;
break;
case PAT_FBPRG:
par_ctrl = 0;
par_data = FBPRG_POW | FBPRG_RESET;
break;
case PAT_ETT:
par_ctrl = ETT_DOUT;
par_data = ETT_SCK | ETT_RESET;
mosi_invert = 1;
break;
case PAT_DT006:
case PAT_MAXI:
par_ctrl = 0;
par_data = 0xFF;
break;
case PAT_XIL:
par_ctrl = 0;
par_data = 0xFF & ~(XIL_ENA | XIL_SCK | XIL_RESET);
break;
case PAT_DASA:
case PAT_DASA2:
break;
}
if (!pa_type_is_serial) {
ParportWriteCtrl();
ParportWriteData();
SckDelay();
ParportReadStatus();
}
OutEnaReset(1);
OutReset(0);
OutEnaSck(1);
OutSck(0);
/* Wait 100 ms as recommended for ATmega163 (SCK not low on power up). */
Delay_usec(100000);
PulseReset();
}
void
TDAPA::OutReset(int b)
/* FALSE means active Reset at the AVR */
{
if (reset_invert)
b = !b;
switch (pa_type) {
case PAT_DAPA:
case PAT_DAPA_2:
if (b) par_ctrl |= DAPA_RESET; else par_ctrl &= ~DAPA_RESET;
ParportWriteCtrl();
break;
case PAT_STK200:
if (b) par_data |= STK2_RESET; else par_data &= ~STK2_RESET;
ParportWriteData();
break;
case PAT_ABB:
if (b) par_data |= ABB_RESET; else par_data &= ~ABB_RESET;
ParportWriteData();
break;
case PAT_AVRISP:
if (b) par_data |= AISP_RESET; else par_data &= ~AISP_RESET;
ParportWriteData();
break;
case PAT_BSD:
if (b) par_data |= BSD_RESET; else par_data &= ~BSD_RESET;
ParportWriteData();
break;
case PAT_FBPRG:
if (b) par_data |= FBPRG_RESET; else par_data &= ~FBPRG_RESET;
ParportWriteData();
break;
case PAT_DT006:
if (b) par_data |= DT006_RESET; else par_data &= ~DT006_RESET;
ParportWriteData();
break;
case PAT_ETT:
if (b) par_data |= ETT_RESET; else par_data &= ~ETT_RESET;
ParportWriteData();
break;
case PAT_MAXI:
if (b) par_data |= MAXI_RESET; else par_data &= ~MAXI_RESET;
ParportWriteData();
break;
case PAT_XIL:
if (b) par_data |= XIL_RESET; else par_data &= ~XIL_RESET;
ParportWriteData();
break;
case PAT_DASA:
#ifdef TIOCMGET
SerialReadCtrl();
if (b) ser_ctrl |= TIOCM_RTS; else ser_ctrl &= ~TIOCM_RTS;
SerialWriteCtrl();
#endif /* TIOCMGET */
break;
case PAT_DASA2:
#if defined(TIOCMGET) && defined(TIOCCBRK)
ioctl(ppdev_fd, b ? TIOCCBRK : TIOCSBRK, 0);
#endif /* TIOCMGET */
break;
}
Delay_usec(b ? reset_high_time : RESET_LOW_TIME );
}
void
TDAPA::SckDelay()
{
Delay_usec(t_sck);
}
