/** EPP periodic task of ESC side EEPROM emulation.
*
*/
void EEP_process (void)
{
eep_stat_t stat;
/* check for eeprom event */
if ((ESCvar.ALevent & ESCREG_ALEVENT_EEP) == 0) {
return;
}
while (1) {
/* read eeprom status */
ESC_read (ESCREG_EECONTSTAT, &stat, sizeof (eep_stat_t));
stat.contstat.reg = etohs(stat.contstat.reg);
stat.addr = etohl(stat.addr);
/* check busy flag, exit if job finished */
if (!stat.contstat.bits.busy) {
return;
}
/* clear error bits */
stat.contstat.bits.csumErr = 0;
stat.contstat.bits.eeLoading = 0;
stat.contstat.bits.ackErr = 0;
stat.contstat.bits.wrErr = 0;
/* process commands */
switch (stat.contstat.bits.cmdReg) {
case EEP_CMD_IDLE:
break;
case EEP_CMD_READ:
case EEP_CMD_RELOAD:
/* handle read request */
if (EEP_read (stat.addr * sizeof(uint16_t), eep_buf, EEP_READ_SIZE) != 0) {
stat.contstat.bits.ackErr = 1;
} else {
ESC_write (ESCREG_EEDATA, eep_buf, EEP_READ_SIZE);
}
break;
case EEP_CMD_WRITE:
/* handle write request */
ESC_read (ESCREG_EEDATA, eep_buf, EEP_WRITE_SIZE);
if (EEP_write (stat.addr * sizeof(uint16_t), eep_buf, EEP_WRITE_SIZE) != 0) {
stat.contstat.bits.ackErr = 1;
}
break;
default:
stat.contstat.bits.ackErr = 1;
}
/* acknowledge command */
stat.contstat.reg = htoes(stat.contstat.reg);
ESC_write (ESCREG_EECONTSTAT, &stat.contstat.reg, sizeof(uint16_t));
}
}
/** ESC and CPU related HW init
*
* @param[in] arg = esc_cfg provided by the application
*/
void ESC_init (const esc_cfg_t * config)
{
eep_config_t ecat_config;
ESC_reset();
scu_configure_ethercat_signals(&port_control);
/* read config from emulated EEPROM */
memset(&ecat_config, 0, sizeof(eep_config_t));
EEP_read (0, (uint8_t *) &ecat_config, sizeof(eep_config_t));
ESC_enable();
/* words 0x0-0x3 */
ecat0->EEP_DATA[0U] = ecat_config.dword[0U];
ecat0->EEP_DATA[1U] = ecat_config.dword[1U];
ecat0->EEP_CONT_STAT |= (uint16_t)(BIT(10)); /* ESI EEPROM Reload */
/* words 0x4-0x7 */
ecat0->EEP_DATA[0U] = ecat_config.dword[2U];
ecat0->EEP_DATA[1U] = ecat_config.dword[3U];
ecat0->EEP_CONT_STAT |= (uint16_t)(BIT(10)); /* ESI EEPROM Reload */
while (ecat0->EEP_CONT_STAT & BIT(12)) /* ESI EEPROM loading status */
{
/* Wait until the EEPROM_Loaded signal is active */
}
/* Configure CPU interrupts */
if(config->use_interrupt != 0)
{
// ecat_isr_sem = sem_create(0);
// task_spawn ("soes_isr", isr_run, 9, 2048, NULL);
use_all_interrupts = 0;
ecat0->AL_EVENT_MASK = 0;
ecat0->AL_EVENT_MASK = (ESCREG_ALEVENT_SMCHANGE |
ESCREG_ALEVENT_EEP |
ESCREG_ALEVENT_CONTROL |
ESCREG_ALEVENT_SM0 |
ESCREG_ALEVENT_SM1);
int_connect (IRQ_ECAT0_SR0, ecat_isr, NULL);
int_enable (IRQ_ECAT0_SR0);
// /* Activate for running external sync IRQ */
// scu_put_peripheral_in_reset (SCU_PERIPHERAL_ERU1);
// scu_ungate_clock_to_peripheral (SCU_PERIPHERAL_ERU1);
// scu_release_peripheral_from_reset (SCU_PERIPHERAL_ERU1);
//
// eru_configure(&cfg);
// /* Let the stack decide when to enable */
// int_disable(cfg.irq);
}
}
// basic module initialization
void BSC_init(void)
{
frame_t fr;
// fifoes init
FIFO_init(&BSC.in_fifo, &BSC.in_buf, NB_IN_FRAMES, sizeof(frame_t));
FIFO_init(&BSC.out_fifo, &BSC.out_buf, NB_OUT_FRAMES, sizeof(frame_t));
// thread init
PT_INIT(&BSC.in_pt);
PT_INIT(&BSC.out_pt);
// reset time-out
BSC.time_out = 0;
BSC.is_running = FALSE;
// register own call-back for specific commands
BSC.interf.channel = 0;
BSC.interf.cmde_mask = _CM(FR_NO_CMDE)
| _CM(FR_RAM_READ)
| _CM(FR_RAM_WRITE)
| _CM(FR_EEP_READ)
| _CM(FR_EEP_WRITE)
| _CM(FR_FLH_READ)
| _CM(FR_FLH_WRITE)
| _CM(FR_SPI_READ)
| _CM(FR_SPI_WRITE)
| _CM(FR_WAIT)
| _CM(FR_CONTAINER);
BSC.interf.queue = &BSC.in_fifo;
DPT_register(&BSC.interf);
// drivers init
SLP_init();
EEP_init();
SPI_init(SPI_MASTER, SPI_THREE, SPI_MSB, SPI_DIV_16);
// read reset frame
EEP_read(0x00, (u8*)&fr, sizeof(frame_t));
while ( ! EEP_is_fini() )
;
// check if the frame is valid
if ( fr.dest == 0xff || fr.orig == 0xff || fr.cmde == 0xff || fr.status == 0xff ) {
return;
}
// enqueue the reset frame
FIFO_put(&BSC.out_fifo, &fr);
// lock the dispatcher to be able to treat the frame
DPT_lock(&BSC.interf);
}
// find the start address the new logging session
// and return the log index found in eeprom
static u8 LOG_find_eeprom_start(void)
{
u8 buf[2];
// scan the whole eeprom
while (1) {
// read the 2 first octets of the log at LOG.addr
EEP_read(LOG.eeprom_addr, buf, sizeof(buf));
// wait end of reading
while ( !EEP_is_fini() )
;
// if the read octets are erased eeprom
if ( (buf[0] == 0xff) && (buf[1] == 0xff) ) {
// the new log session start address is found (here)
//
// the previous index is known from the previous read (see below)
// so increment it
LOG.index++;
// finally the scan is over
return LOG.index;
}
// extract index
LOG.index = buf[0];
// check the next log block
LOG.eeprom_addr += sizeof(log_t);
// if address is out of range
if ( LOG.eeprom_addr >= EEPROM_END_ADDR ) {
// eeprom is full
// so give up
// the log thread protection will prevent overwriting
return 0xff;
}
}
}
