struct feature_entry {
uint32_t reg;
uint32_t bit;
#define CPU_FLAG_NAME_MAX_LEN 64
char name[CPU_FLAG_NAME_MAX_LEN];
};
#define FEAT_DEF(name, reg, bit) \
[RTE_CPUFLAG_##name] = {reg, bit, #name},
#ifdef RTE_ARCH_ARMv7
#define PLATFORM_STR "v7l"
typedef Elf32_auxv_t _Elfx_auxv_t;
const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(SWP, REG_HWCAP, 0)
FEAT_DEF(HALF, REG_HWCAP, 1)
FEAT_DEF(THUMB, REG_HWCAP, 2)
FEAT_DEF(A26BIT, REG_HWCAP, 3)
FEAT_DEF(FAST_MULT, REG_HWCAP, 4)
FEAT_DEF(FPA, REG_HWCAP, 5)
FEAT_DEF(VFP, REG_HWCAP, 6)
FEAT_DEF(EDSP, REG_HWCAP, 7)
FEAT_DEF(JAVA, REG_HWCAP, 8)
FEAT_DEF(IWMMXT, REG_HWCAP, 9)
FEAT_DEF(CRUNCH, REG_HWCAP, 10)
FEAT_DEF(THUMBEE, REG_HWCAP, 11)
FEAT_DEF(NEON, REG_HWCAP, 12)
FEAT_DEF(VFPv3, REG_HWCAP, 13)
FEAT_DEF(VFPv3D16, REG_HWCAP, 14)
FEAT_DEF(TLS, REG_HWCAP, 15)
};
typedef uint32_t hwcap_registers_t[REG_MAX];
struct feature_entry {
uint32_t reg;
uint32_t bit;
#define CPU_FLAG_NAME_MAX_LEN 64
char name[CPU_FLAG_NAME_MAX_LEN];
};
#define FEAT_DEF(name, reg, bit) \
[RTE_CPUFLAG_##name] = {reg, bit, #name},
const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(PPC_LE, REG_HWCAP, 0)
FEAT_DEF(TRUE_LE, REG_HWCAP, 1)
FEAT_DEF(PSERIES_PERFMON_COMPAT, REG_HWCAP, 6)
FEAT_DEF(VSX, REG_HWCAP, 7)
FEAT_DEF(ARCH_2_06, REG_HWCAP, 8)
FEAT_DEF(POWER6_EXT, REG_HWCAP, 9)
FEAT_DEF(DFP, REG_HWCAP, 10)
FEAT_DEF(PA6T, REG_HWCAP, 11)
FEAT_DEF(ARCH_2_05, REG_HWCAP, 12)
FEAT_DEF(ICACHE_SNOOP, REG_HWCAP, 13)
FEAT_DEF(SMT, REG_HWCAP, 14)
FEAT_DEF(BOOKE, REG_HWCAP, 15)
FEAT_DEF(CELLBE, REG_HWCAP, 16)
FEAT_DEF(POWER5_PLUS, REG_HWCAP, 17)
FEAT_DEF(POWER5, REG_HWCAP, 18)
FEAT_DEF(POWER4, REG_HWCAP, 19)
