void write_impl(uint8_t * addressE, const uint8_t * data, int size) { SYS_UnlockReg(); /* Enable FMC ISP function */ FMC_Open(); while(size > 0) { int adr = (int) addressE & (PAGE_SIZE - 1); int less_size; if(adr+size > PAGE_SIZE) { less_size = PAGE_SIZE - adr; } else { less_size = size; } write_impl_less(addressE, data, less_size); addressE += less_size; data += less_size; size -= less_size; } /* Disable FMC ISP function */ FMC_Close(); SYS_LockReg(); }
void UpdateBoardVersion(bool erase) { /* Enable ISP function */ #ifdef M451 SYS_UnlockReg(); FMC_Open(); #else DrvFMC_EnableISP(); #endif if(erase) { DATA_FLASH_Write(BOARD_CODE_BASE,0xffffffff); } else { BoardVersion = DATA_FLASH_Read(BOARD_CODE_BASE); if(BoardVersion==0xFFFFFFFF) { DATA_FLASH_Write(BOARD_CODE_BASE,BOARD_CODE); printf("Update Board Code:%d\n", BOARD_CODE); } else printf("Board Code:%d\n", BoardVersion); } #ifdef M451 FMC_Close(); SYS_LockReg(); #else DrvFMC_DisableISP(); #endif }
/*---------------------------------------------------------------------------------------------------------*/ int32_t main(void) { uint32_t au32Config[2]; /* Unlock protected registers */ SYS_UnlockReg(); SYS_Init(); UART0_Init(); printf("\n\n"); printf("+-------------------------------------------------------------+\n"); printf("| NuMicro USB Virtual COM and MassStorage Sample Code |\n"); printf("+-------------------------------------------------------------+\n"); /* Enable FMC ISP function */ FMC_Open(); /* Check User Configuration. If not match, to re-define Data Flash size and to enable Data Flash function. */ FMC_ReadConfig(au32Config, 2); if(((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE)) { FMC_EnableConfigUpdate(); FMC_Erase(FMC_CONFIG0_ADDR); au32Config[0] &= ~0x1; au32Config[1] = DATA_FLASH_BASE; if(FMC_WriteConfig(au32Config, 2) < 0) return -1; FMC_ReadConfig(au32Config, 2); if(((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE)) { printf("Error: Program Config Failed!\n"); /* Disable FMC ISP function */ FMC_Close(); return -1; } /* Reset Chip to reload new CONFIG value */ SYS->IPRST0 = SYS_IPRST0_CHIPRST_Msk; } printf("NuMicro USB MassStorage Start!\n"); USBD_Open(&gsInfo, VCOM_MSC_ClassRequest, NULL); USBD_SetConfigCallback(MSC_SetConfig); /* Endpoint configuration */ VCOM_MSC_Init(); USBD_Start(); NVIC_EnableIRQ(USBD_IRQn); NVIC_EnableIRQ(UART0_IRQn); while(1) { VCOM_TransferData(); MSC_ProcessCmd(); } }
/*---------------------------------------------------------------------------------------------------------*/ int32_t main (void) { uint32_t au32Config[2]; SYS_Init(); UART0_Init(); printf("NuMicro USB composite device Sample.(HID Transfer and Mass storage)\n"); SYS_UnlockReg(); /* Enable FMC ISP function */ FMC_Open(); /* Check if Data Flash Size is 64K. If not, to re-define Data Flash size and to enable Data Flash function */ if (FMC_ReadConfig(au32Config, 2) < 0) return -1; if (((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE) ) { FMC_ENABLE_CFG_UPDATE(); au32Config[0] &= ~0x1; au32Config[1] = DATA_FLASH_BASE; if (FMC_WriteConfig(au32Config, 2) < 0) return -1; FMC_ReadConfig(au32Config, 2); if (((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE)) { printf("Error: Program Config Failed!\n"); /* Disable FMC ISP function */ FMC_Close(); SYS_LockReg(); return -1; } /* Reset Chip to reload new CONFIG value */ SYS->IPRST_CTL1 = SYS_IPRST_CTL1_CHIP_RST_Msk; } SYS_LockReg(); USBD_Open(&gsInfo, HID_ClassRequest, NULL); /* Endpoint configuration */ HID_Init(); NVIC_EnableIRQ(USBD_IRQn); USBD_Start(); while(1) { if (g_usbd_UsbConfig) MSC_ProcessCmd(); } }
void FlashInit() { #ifdef M451 SYS_UnlockReg(); FMC_Open(); SetDataFlashBase(DATA_FLASH_TEST_BASE); DATA_Flash_Start_ADD = FMC_ReadDataFlashBaseAddr(); FMC_Close(); SYS_LockReg(); #else DrvFMC_EnableISP(); /* Read Data Flash base address */ DATA_Flash_Start_ADD = DrvFMC_ReadDataFlashBaseAddr(); DrvFMC_DisableISP(); #endif printf("Flash initilize - [OK]\n"); }
//============================================================================ // u32addr : 0-1024 //============================================================================ uint32_t DATA_FLASH_Read(uint32_t u32add) { uint32_t u32data; #ifdef M451 SYS_UnlockReg(); FMC_Open(); u32data = FMC_Read(u32add*4+DATA_Flash_Start_ADD); FMC_Close(); SYS_LockReg(); #else __set_PRIMASK(1); UNLOCKREG(); DrvFMC_EnableISP(); DrvFMC_Read(u32add*4+DATA_Flash_Start_ADD, &u32data); DrvFMC_DisableISP(); LOCKREG(); __set_PRIMASK(0); #endif return u32data; }
//============================================================================ // DATA FLASH OPERATION // u32addr : 0-1024 (For 4KBytes Data Flash) // u32data : 0-0xFFFFFFFF (4Bytes) //============================================================================ void DATA_FLASH_Write(uint32_t u32addr,uint32_t u32data) { uint32_t i=0; #ifdef M451 SYS_UnlockReg(); FMC_Open(); for(i=0; i<PAGE_SIZE; i++) data_buff[i] = FMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048); FMC_Erase(DATA_Flash_Start_ADD+u32addr/PAGE_SIZE*2048); data_buff[u32addr%PAGE_SIZE]=u32data; for(i=0; i<PAGE_SIZE; i++) FMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048, data_buff[i]); FMC_Close(); SYS_LockReg(); #else uint32_t data_buff[PAGE_SIZE]; __set_PRIMASK(1);//Avoid interrupt UNLOCKREG(); DrvFMC_EnableISP(); for(i=0; i<PAGE_SIZE; i++) DrvFMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, &data_buff[i]); DrvFMC_Erase(DATA_Flash_Start_ADD+u32addr/128*512); data_buff[u32addr%128]=u32data; for(i=0; i<PAGE_SIZE; i++) DrvFMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, data_buff[i]); DrvFMC_DisableISP(); LOCKREG(); __set_PRIMASK(0); #endif }
void DataFlashRead(uint32_t addr, uint32_t size, uint32_t buffer) { /* This is low level read function of USB Mass Storage */ int32_t len; /* Modify the address to MASS_STORAGE_OFFSET */ addr += MASS_STORAGE_OFFSET; len = (int32_t)size; SYS_UnlockReg(); FMC_Open(); while(len >= FLASH_PAGE_SIZE) { FMC_ReadPage(addr, (uint32_t *)buffer); addr += FLASH_PAGE_SIZE; buffer += FLASH_PAGE_SIZE; len -= FLASH_PAGE_SIZE; } FMC_Close(); SYS_LockReg(); }
int aprom() { uint8_t u8Item; uint32_t u32Data; char *acBootMode[] = {"LDROM+IAP", "LDROM", "APROM+IAP", "APROM"}; uint32_t u32CBS; /* Unlock protected registers */ SYS_UnlockReg(); /* Init system clock and multi-function I/O */ SYS_Init(); /* Init UART */ UART_Init(); printf("\n\n"); printf("+----------------------------------------+\n"); printf("| NUC029 FMC IAP Sample Code |\n"); printf("| [APROM code] |\n"); printf("+----------------------------------------+\n"); /* Enable FMC ISP function */ FMC_Open(); if(SetIAPBoot() < 0) { printf("Failed to set IAP boot mode!\n"); goto lexit; } /* Get boot mode */ printf(" Boot Mode ............................. "); u32CBS = (FMC->ISPSTA & FMC_ISPSTA_CBS_Msk) >> FMC_ISPSTA_CBS_Pos; printf("[%s]\n", acBootMode[u32CBS]); u32Data = FMC_ReadCID(); printf(" Company ID ............................ [0x%08x]\n", u32Data); u32Data = FMC_ReadDID(); printf(" Device ID ............................. [0x%08x]\n", u32Data); u32Data = FMC_ReadPID(); printf(" Product ID ............................ [0x%08x]\n", u32Data); /* Read User Configuration */ printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE)); printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE + 4)); do { printf("\n\n\n"); printf("+----------------------------------------+\n"); printf("| Select |\n"); printf("+----------------------------------------+\n"); printf("| [0] Load IAP code to LDROM |\n"); printf("| [1] Run IAP program (in LDROM) |\n"); printf("+----------------------------------------+\n"); printf("Please select..."); u8Item = UART_GetChar(); printf("%c\n", u8Item); switch(u8Item) { case '0': FMC_EnableLDUpdate(); if(LoadImage((uint32_t)&loaderImage1Base, (uint32_t)&loaderImage1Limit, FMC_LDROM_BASE, FMC_LDROM_SIZE) != 0) { printf("Load image to LDROM failed!\n"); goto lexit; } FMC_DisableLDUpdate(); break; case '1': printf("\n\nChange VECMAP and branch to LDROM...\n"); UART_WAIT_TX_EMPTY(UART0); /* To make sure all message has been print out */ /* Mask all interrupt before changing VECMAP to avoid wrong interrupt handler fetched */ __set_PRIMASK(1); /* Set VECMAP to LDROM for booting from LDROM */ FMC_SetVectorPageAddr(FMC_LDROM_BASE); /* Software reset to boot to LDROM */ NVIC_SystemReset(); break; default : break; } } while(1); lexit: /* Disable FMC ISP function */ FMC_Close(); /* Lock protected registers */ SYS_LockReg(); printf("\nFMC Sample Code Completed.\n"); while(1); }
void DataFlashWrite(uint32_t addr, uint32_t size, uint32_t buffer) { /* This is low level write function of USB Mass Storage */ int32_t len, i, offset; uint32_t *pu32; uint32_t alignAddr; /* Modify the address to MASS_STORAGE_OFFSET */ addr += MASS_STORAGE_OFFSET; len = (int32_t)size; SYS_UnlockReg(); FMC_Open(); if ( len == FLASH_PAGE_SIZE && ((addr & (FLASH_PAGE_SIZE-1)) == 0) ) { FMC_Erase(addr); while (len >= FLASH_PAGE_SIZE) { FMC_ProgramPage(addr, (uint32_t *) buffer); len -= FLASH_PAGE_SIZE; buffer += FLASH_PAGE_SIZE; addr += FLASH_PAGE_SIZE; } } else { do { alignAddr = addr & 0x1FE00; /* Get the sector offset*/ offset = ( addr & (FLASH_PAGE_SIZE-1) ); if ( offset || (size < FLASH_PAGE_SIZE) ) { /* Non 4k alignment. Note: It needs to avoid add MASS_STORAGE_OFFSET twice. */ DataFlashRead(alignAddr - MASS_STORAGE_OFFSET, FLASH_PAGE_SIZE, (uint32_t)&g_sectorBuf[0]); } /* Update the data */ pu32 = (uint32_t *)buffer; len = FLASH_PAGE_SIZE - offset; if (size < len) len = size; for (i=0; i<len/4; i++) { g_sectorBuf[offset/4 + i] = pu32[i]; } FMC_Erase(alignAddr); for(i=0; i<16; i++) { FMC_ProgramPage(alignAddr + (i << 8), (uint32_t *) g_sectorBuf + (i << 8)); } size -= len; addr += len; buffer += len; } while (size > 0); } FMC_Close(); SYS_LockReg(); }
int main() { uint32_t i, u32Data; /* Init System, IP clock and multi-function I/O */ SYS_Init(); /* Init UART0 for printf */ UART0_Init(); /*---------------------------------------------------------------------------------------------------------*/ /* SAMPLE CODE */ /*---------------------------------------------------------------------------------------------------------*/ printf("\n\nCPU @ %dHz\n", SystemCoreClock); SYS_UnlockReg(); /* Enable FMC ISP function */ FMC_Open(); if (set_data_flash_base(DATA_FLASH_TEST_BASE) < 0) { printf("Failed to set Data Flash base address!\n"); goto lexit; } /* Read BS */ printf(" Boot Mode ............................. "); if (FMC_GetBootSource() == 0) printf("[APROM]\n"); else { printf("[LDROM]\n"); printf(" WARNING: The driver sample code must execute in AP mode!\n"); goto lexit; } u32Data = FMC_ReadCID(); printf(" Company ID ............................ [0x%08x]\n", u32Data); u32Data = FMC_ReadPID(); printf(" Product ID ............................ [0x%08x]\n", u32Data); for (i = 0; i < 3; i++) { u32Data = FMC_ReadUID(i); printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data); } for (i = 0; i < 4; i++) { u32Data = FMC_ReadUCID(i); printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data); } /* Read User Configuration */ printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE)); printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE+4)); /* Read Data Flash base address */ u32Data = FMC_ReadDataFlashBaseAddr(); printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data); printf("\n\nLDROM test =>\n"); FMC_ENABLE_LD_UPDATE(); if (flash_test(FMC_LDROM_BASE, FMC_LDROM_END, TEST_PATTERN) < 0) { printf("\n\nLDROM test failed!\n"); goto lexit; } FMC_DISABLE_LD_UPDATE(); printf("\n\nAPROM test =>\n"); FMC_ENABLE_AP_UPDATE(); if (flash_test(APROM_TEST_BASE, DATA_FLASH_TEST_BASE, TEST_PATTERN) < 0) { printf("\n\nAPROM test failed!\n"); goto lexit; } FMC_DISABLE_AP_UPDATE(); printf("\n\nData Flash test =>\n"); if (flash_test(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0) { printf("\n\nUHB test failed!\n"); goto lexit; } lexit: /* Disable FMC ISP function */ FMC_Close(); /* Lock protected registers */ SYS_LockReg(); printf("\nFMC Sample Code Completed.\n"); while (1); }
/*---------------------------------------------------------------------------------------------------------*/ int32_t main(void) { uint32_t u32TrimInit; uint32_t au32Config[2]; /* Unlock protected registers */ SYS_UnlockReg(); SYS_Init(); UART0_Init(); printf("\n"); printf("+-------------------------------------------------------------+\n"); printf("| NuMicro USB Virtual COM and MassStorage Sample Code |\n"); printf("+-------------------------------------------------------------+\n"); /* Enable FMC ISP function */ FMC_Open(); /* Check if Data Flash Size is 64K. If not, to re-define Data Flash size and to enable Data Flash function */ if(FMC_ReadConfig(au32Config, 2) < 0) return -1; if(((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE)) { FMC_EnableConfigUpdate(); au32Config[0] &= ~0x1; au32Config[1] = DATA_FLASH_BASE; FMC_Erase(CONFIG_BASE); if(FMC_WriteConfig(au32Config, 2) < 0) return -1; FMC_ReadConfig(au32Config, 2); if(((au32Config[0] & 0x01) == 1) || (au32Config[1] != DATA_FLASH_BASE)) { printf("Error: Program Config Failed!\n"); /* Disable FMC ISP function */ FMC_Close(); return -1; } /* Reset Chip to reload new CONFIG value */ SYS->IPRSTC1 = SYS_IPRSTC1_CHIP_RST_Msk; } printf("NuMicro USB MassStorage Start!\n"); /* Open USB controller */ USBD_Open(&gsInfo, VCOM_MSC_ClassRequest, NULL); USBD_SetConfigCallback(MSC_SetConfig); /* Endpoint configuration */ VCOM_MSC_Init(); USBD_Start(); #if CRYSTAL_LESS /* Backup init trim */ u32TrimInit = M32(TRIM_INIT); /* Enable USB crystal-less */ SYS->HIRCTCTL = 0x201 | (31 << SYS_HIRCTCTL_BOUNDARY_Pos); #endif NVIC_EnableIRQ(USBD_IRQn); NVIC_EnableIRQ(UART02_IRQn); while(1) { #if CRYSTAL_LESS /* Re-start crystal-less when any error found */ if (SYS->HIRCTSTS & (SYS_HIRCTSTS_CLKERIF_Msk | SYS_HIRCTSTS_TFAILIF_Msk)) { SYS->HIRCTSTS = SYS_HIRCTSTS_CLKERIF_Msk | SYS_HIRCTSTS_TFAILIF_Msk; if((u32TrimInit < 0x1E6) || (u32TrimInit > 0x253)) /* Re-enable crystal-less */ SYS->HIRCTCTL = 0x201 | (1 << SYS_HIRCTCTL_BOUNDARY_Pos); else /* Re-enable crystal-less */ SYS->HIRCTCTL = 0x201 | (31 << SYS_HIRCTCTL_BOUNDARY_Pos); //printf("USB trim fail. Just retry. SYS->HIRCTSTS = 0x%x, SYS->HIRCTCTL = 0x%x\n", SYS->HIRCTSTS, SYS->HIRCTCTL); } #endif VCOM_TransferData(); MSC_ProcessCmd(); } }
int main() { uint32_t i, u32Data; /* Unlock protected registers */ SYS_UnlockReg(); SYS_Init(); UART_Init(); /* This sample code is used to show how to use StdDriver API to implement ISP functions. */ printf("\n\n"); printf("+----------------------------------------+\n"); printf("| NUC029xDE FMC Sample Code |\n"); printf("+----------------------------------------+\n"); //SYS_UnlockReg(); /* Enable FMC ISP function */ FMC_Open(); if(SetDataFlashBase(DATA_FLASH_TEST_BASE) < 0) { printf("Failed to set Data Flash base address!\n"); goto lexit; } /* Read BS */ printf(" Boot Mode ............................. "); if(FMC_GetBootSource() == 0) printf("[APROM]\n"); else { printf("[LDROM]\n"); printf(" WARNING: The driver sample code must execute in AP mode!\n"); goto lexit; } u32Data = FMC_ReadCID(); printf(" Company ID ............................ [0x%08x]\n", u32Data); u32Data = FMC_ReadDID(); printf(" Device ID ............................. [0x%08x]\n", u32Data); u32Data = FMC_ReadPID(); printf(" Product ID ............................ [0x%08x]\n", u32Data); for(i = 0; i < 3; i++) { u32Data = FMC_ReadUID(i); printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data); } for(i = 0; i < 4; i++) { u32Data = FMC_ReadUCID(i); printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data); } /* Read User Configuration */ printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE)); printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE + 4)); /* Read Data Flash base address */ u32Data = FMC_ReadDataFlashBaseAddr(); printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data); printf("\n\nLDROM test =>\n"); FMC_EnableLDUpdate(); if(FlashTest(FMC_LDROM_BASE, FMC_LDROM_BASE + FMC_LDROM_SIZE, TEST_PATTERN) < 0) { printf("\n\nLDROM test failed!\n"); goto lexit; } FMC_DisableLDUpdate(); printf("\n\nAPROM test =>\n"); FMC_EnableAPUpdate(); if(FlashTest(APROM_TEST_BASE, APROM_TEST_END, TEST_PATTERN) < 0) { printf("\n\nAPROM test failed!\n"); goto lexit; } FMC_DisableAPUpdate(); printf("\n\nData Flash test =>\n"); if(FlashTest(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0) { printf("\n\nUHB test failed!\n"); goto lexit; } lexit: /* Disable FMC ISP function */ FMC_Close(); /* Lock protected registers */ SYS_LockReg(); printf("\nFMC Sample Code Completed.\n"); while(1); }