/* The function nios2_print_insn_arg uses the character pointed
to by ARGPTR to determine how it print the next token or separator
character in the arguments to an instruction. */
static int
nios2_print_insn_arg (const char *argptr,
unsigned long opcode, bfd_vma address,
disassemble_info *info,
const struct nios2_opcode *op)
{
unsigned long i = 0;
struct nios2_reg *reg_base;
switch (*argptr)
{
case ',':
case '(':
case ')':
(*info->fprintf_func) (info->stream, "%c", *argptr);
break;
case 'c':
/* Control register index. */
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_IMM5 (opcode);
break;
case iw_F3X6L5_type:
i = GET_IW_F3X6L5_IMM5 (opcode);
break;
default:
bad_opcode (op);
}
reg_base = nios2_control_regs ();
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
break;
case 'd':
reg_base = nios2_regs;
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_C (opcode);
break;
case iw_custom_type:
i = GET_IW_CUSTOM_C (opcode);
if (GET_IW_CUSTOM_READC (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F3X6L5_type:
case iw_F3X6_type:
i = GET_IW_F3X6L5_C (opcode);
break;
case iw_F3X8_type:
i = GET_IW_F3X8_C (opcode);
if (GET_IW_F3X8_READC (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F2_type:
i = GET_IW_F2_B (opcode);
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 's':
reg_base = nios2_regs;
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_A (opcode);
break;
case iw_i_type:
i = GET_IW_I_A (opcode);
break;
case iw_custom_type:
i = GET_IW_CUSTOM_A (opcode);
if (GET_IW_CUSTOM_READA (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F2I16_type:
i = GET_IW_F2I16_A (opcode);
break;
case iw_F2X4I12_type:
i = GET_IW_F2X4I12_A (opcode);
break;
case iw_F1X4I12_type:
i = GET_IW_F1X4I12_A (opcode);
break;
case iw_F1X4L17_type:
i = GET_IW_F1X4L17_A (opcode);
break;
case iw_F3X6L5_type:
case iw_F3X6_type:
i = GET_IW_F3X6L5_A (opcode);
break;
case iw_F2X6L10_type:
i = GET_IW_F2X6L10_A (opcode);
break;
case iw_F3X8_type:
i = GET_IW_F3X8_A (opcode);
if (GET_IW_F3X8_READA (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F1X1_type:
i = GET_IW_F1X1_A (opcode);
break;
case iw_F1I5_type:
i = 27; /* Implicit stack pointer reference. */
break;
case iw_F2_type:
i = GET_IW_F2_A (opcode);
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 't':
reg_base = nios2_regs;
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_B (opcode);
break;
case iw_i_type:
i = GET_IW_I_B (opcode);
break;
case iw_custom_type:
i = GET_IW_CUSTOM_B (opcode);
if (GET_IW_CUSTOM_READB (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F2I16_type:
i = GET_IW_F2I16_B (opcode);
break;
case iw_F2X4I12_type:
i = GET_IW_F2X4I12_B (opcode);
break;
case iw_F3X6L5_type:
case iw_F3X6_type:
i = GET_IW_F3X6L5_B (opcode);
break;
case iw_F2X6L10_type:
i = GET_IW_F2X6L10_B (opcode);
break;
case iw_F3X8_type:
i = GET_IW_F3X8_B (opcode);
if (GET_IW_F3X8_READB (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
break;
case iw_F1I5_type:
i = GET_IW_F1I5_B (opcode);
break;
case iw_F2_type:
i = GET_IW_F2_B (opcode);
break;
case iw_T1X1I6_type:
i = 0;
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 'D':
switch (op->format)
{
case iw_T1I7_type:
i = GET_IW_T1I7_A3 (opcode);
break;
case iw_T2X1L3_type:
i = GET_IW_T2X1L3_B3 (opcode);
break;
case iw_T2X1I3_type:
i = GET_IW_T2X1I3_B3 (opcode);
break;
case iw_T3X1_type:
i = GET_IW_T3X1_C3 (opcode);
break;
case iw_T2X3_type:
if (op->num_args == 3)
i = GET_IW_T2X3_A3 (opcode);
else
i = GET_IW_T2X3_B3 (opcode);
break;
default:
bad_opcode (op);
}
i = nios2_r2_reg3_mappings[i];
(*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name);
break;
case 'M':
/* 6-bit unsigned immediate with no shift. */
switch (op->format)
{
case iw_T1X1I6_type:
i = GET_IW_T1X1I6_IMM6 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'N':
/* 6-bit unsigned immediate with 2-bit shift. */
switch (op->format)
{
case iw_T1X1I6_type:
i = GET_IW_T1X1I6_IMM6 (opcode) << 2;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'S':
switch (op->format)
{
case iw_T1I7_type:
i = GET_IW_T1I7_A3 (opcode);
break;
case iw_T2I4_type:
i = GET_IW_T2I4_A3 (opcode);
break;
case iw_T2X1L3_type:
i = GET_IW_T2X1L3_A3 (opcode);
break;
case iw_T2X1I3_type:
i = GET_IW_T2X1I3_A3 (opcode);
break;
case iw_T3X1_type:
i = GET_IW_T3X1_A3 (opcode);
break;
case iw_T2X3_type:
i = GET_IW_T2X3_A3 (opcode);
break;
case iw_T1X1I6_type:
i = GET_IW_T1X1I6_A3 (opcode);
break;
default:
bad_opcode (op);
}
i = nios2_r2_reg3_mappings[i];
(*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name);
break;
case 'T':
switch (op->format)
{
case iw_T2I4_type:
i = GET_IW_T2I4_B3 (opcode);
break;
case iw_T3X1_type:
i = GET_IW_T3X1_B3 (opcode);
break;
case iw_T2X3_type:
i = GET_IW_T2X3_B3 (opcode);
break;
default:
bad_opcode (op);
}
i = nios2_r2_reg3_mappings[i];
(*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name);
break;
case 'i':
/* 16-bit signed immediate. */
switch (op->format)
{
case iw_i_type:
i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16;
break;
case iw_F2I16_type:
i = (signed) (GET_IW_F2I16_IMM16 (opcode) << 16) >> 16;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'I':
/* 12-bit signed immediate. */
switch (op->format)
{
case iw_F2X4I12_type:
i = (signed) (GET_IW_F2X4I12_IMM12 (opcode) << 20) >> 20;
break;
case iw_F1X4I12_type:
i = (signed) (GET_IW_F1X4I12_IMM12 (opcode) << 20) >> 20;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'u':
/* 16-bit unsigned immediate. */
switch (op->format)
{
case iw_i_type:
i = GET_IW_I_IMM16 (opcode);
break;
case iw_F2I16_type:
i = GET_IW_F2I16_IMM16 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'U':
/* 7-bit unsigned immediate with 2-bit shift. */
switch (op->format)
{
case iw_T1I7_type:
i = GET_IW_T1I7_IMM7 (opcode) << 2;
break;
case iw_X1I7_type:
i = GET_IW_X1I7_IMM7 (opcode) << 2;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'V':
/* 5-bit unsigned immediate with 2-bit shift. */
switch (op->format)
{
case iw_F1I5_type:
i = GET_IW_F1I5_IMM5 (opcode) << 2;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'W':
/* 4-bit unsigned immediate with 2-bit shift. */
switch (op->format)
{
case iw_T2I4_type:
i = GET_IW_T2I4_IMM4 (opcode) << 2;
break;
case iw_L5I4X1_type:
i = GET_IW_L5I4X1_IMM4 (opcode) << 2;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'X':
/* 4-bit unsigned immediate with 1-bit shift. */
switch (op->format)
{
case iw_T2I4_type:
i = GET_IW_T2I4_IMM4 (opcode) << 1;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'Y':
/* 4-bit unsigned immediate without shift. */
switch (op->format)
{
case iw_T2I4_type:
i = GET_IW_T2I4_IMM4 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'o':
/* 16-bit signed immediate address offset. */
switch (op->format)
{
case iw_i_type:
i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16;
break;
case iw_F2I16_type:
i = (signed) (GET_IW_F2I16_IMM16 (opcode) << 16) >> 16;
break;
default:
bad_opcode (op);
}
address = address + 4 + i;
(*info->print_address_func) (address, info);
break;
case 'O':
/* 10-bit signed address offset with 1-bit shift. */
switch (op->format)
{
case iw_I10_type:
i = (signed) (GET_IW_I10_IMM10 (opcode) << 22) >> 21;
break;
default:
bad_opcode (op);
}
address = address + 2 + i;
(*info->print_address_func) (address, info);
break;
case 'P':
/* 7-bit signed address offset with 1-bit shift. */
switch (op->format)
{
case iw_T1I7_type:
i = (signed) (GET_IW_T1I7_IMM7 (opcode) << 25) >> 24;
break;
default:
bad_opcode (op);
}
address = address + 2 + i;
(*info->print_address_func) (address, info);
break;
case 'j':
/* 5-bit unsigned immediate. */
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_IMM5 (opcode);
break;
case iw_F3X6L5_type:
i = GET_IW_F3X6L5_IMM5 (opcode);
break;
case iw_F2X6L10_type:
i = GET_IW_F2X6L10_MSB (opcode);
break;
case iw_X2L5_type:
i = GET_IW_X2L5_IMM5 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'k':
/* Second 5-bit unsigned immediate field. */
switch (op->format)
{
case iw_F2X6L10_type:
i = GET_IW_F2X6L10_LSB (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'l':
/* 8-bit unsigned immediate. */
switch (op->format)
{
case iw_custom_type:
i = GET_IW_CUSTOM_N (opcode);
break;
case iw_F3X8_type:
i = GET_IW_F3X8_N (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%lu", i);
break;
case 'm':
/* 26-bit unsigned immediate. */
switch (op->format)
{
case iw_j_type:
i = GET_IW_J_IMM26 (opcode);
break;
case iw_L26_type:
i = GET_IW_L26_IMM26 (opcode);
break;
default:
bad_opcode (op);
}
/* This translates to an address because it's only used in call
instructions. */
address = (address & 0xf0000000) | (i << 2);
(*info->print_address_func) (address, info);
break;
case 'e':
/* Encoded enumeration for addi.n/subi.n. */
switch (op->format)
{
case iw_T2X1I3_type:
i = nios2_r2_asi_n_mappings[GET_IW_T2X1I3_IMM3 (opcode)];
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%lu", i);
break;
case 'f':
/* Encoded enumeration for slli.n/srli.n. */
switch (op->format)
{
case iw_T2X1L3_type:
i = nios2_r2_shi_n_mappings[GET_IW_T2X1I3_IMM3 (opcode)];
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%lu", i);
break;
case 'g':
/* Encoded enumeration for andi.n. */
switch (op->format)
{
case iw_T2I4_type:
i = nios2_r2_andi_n_mappings[GET_IW_T2I4_IMM4 (opcode)];
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%lu", i);
break;
case 'h':
/* Encoded enumeration for movi.n. */
switch (op->format)
{
case iw_T1I7_type:
i = GET_IW_T1I7_IMM7 (opcode);
if (i == 125)
i = 0xff;
else if (i == 126)
i = -2;
else if (i == 127)
i = -1;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'R':
{
unsigned long reglist = 0;
int dir = 1;
int k, t;
switch (op->format)
{
case iw_F1X4L17_type:
/* Encoding for ldwm/stwm. */
i = GET_IW_F1X4L17_REGMASK (opcode);
if (GET_IW_F1X4L17_RS (opcode))
{
reglist = ((i << 14) & 0x00ffc000);
if (i & (1 << 10))
reglist |= (1 << 28);
if (i & (1 << 11))
reglist |= (1 << 31);
}
else
reglist = i << 2;
dir = GET_IW_F1X4L17_REGMASK (opcode) ? 1 : -1;
break;
case iw_L5I4X1_type:
/* Encoding for push.n/pop.n. */
reglist |= (1 << 31);
if (GET_IW_L5I4X1_FP (opcode))
reglist |= (1 << 28);
if (GET_IW_L5I4X1_CS (opcode))
{
int val = GET_IW_L5I4X1_REGRANGE (opcode);
reglist |= nios2_r2_reg_range_mappings[val];
}
dir = (op->match == MATCH_R2_POP_N ? 1 : -1);
break;
default:
bad_opcode (op);
}
t = 0;
(*info->fprintf_func) (info->stream, "{");
for (k = (dir == 1 ? 0 : 31);
(dir == 1 && k < 32) || (dir == -1 && k >= 0);
k += dir)
if (reglist & (1 << k))
{
if (t)
(*info->fprintf_func) (info->stream, ",");
else
t++;
(*info->fprintf_func) (info->stream, "%s", nios2_regs[k].name);
}
(*info->fprintf_func) (info->stream, "}");
break;
}
case 'B':
/* Base register and options for ldwm/stwm. */
switch (op->format)
{
case iw_F1X4L17_type:
if (GET_IW_F1X4L17_ID (opcode) == 0)
(*info->fprintf_func) (info->stream, "--");
i = GET_IW_F1X4I12_A (opcode);
(*info->fprintf_func) (info->stream, "(%s)",
nios2_builtin_regs[i].name);
if (GET_IW_F1X4L17_ID (opcode))
(*info->fprintf_func) (info->stream, "++");
if (GET_IW_F1X4L17_WB (opcode))
(*info->fprintf_func) (info->stream, ",writeback");
if (GET_IW_F1X4L17_PC (opcode))
(*info->fprintf_func) (info->stream, ",ret");
break;
default:
bad_opcode (op);
}
break;
default:
(*info->fprintf_func) (info->stream, "unknown");
break;
}
return 0;
}
/* The function nios2_print_insn_arg uses the character pointed
to by ARGPTR to determine how it print the next token or separator
character in the arguments to an instruction. */
static int
nios2_print_insn_arg (const char *argptr,
unsigned long opcode, bfd_vma address,
disassemble_info *info,
const struct nios2_opcode *op)
{
unsigned long i = 0;
struct nios2_reg *reg_base;
switch (*argptr)
{
case ',':
case '(':
case ')':
(*info->fprintf_func) (info->stream, "%c", *argptr);
break;
case 'd':
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_C (opcode);
reg_base = nios2_regs;
break;
case iw_custom_type:
i = GET_IW_CUSTOM_C (opcode);
if (GET_IW_CUSTOM_READC (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
else
reg_base = nios2_regs;
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 's':
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_A (opcode);
reg_base = nios2_regs;
break;
case iw_i_type:
i = GET_IW_I_A (opcode);
reg_base = nios2_regs;
break;
case iw_custom_type:
i = GET_IW_CUSTOM_A (opcode);
if (GET_IW_CUSTOM_READA (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
else
reg_base = nios2_regs;
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 't':
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_B (opcode);
reg_base = nios2_regs;
break;
case iw_i_type:
i = GET_IW_I_B (opcode);
reg_base = nios2_regs;
break;
case iw_custom_type:
i = GET_IW_CUSTOM_B (opcode);
if (GET_IW_CUSTOM_READB (opcode) == 0)
reg_base = nios2_coprocessor_regs ();
else
reg_base = nios2_regs;
break;
default:
bad_opcode (op);
}
if (i < NUMREGNAMES)
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
else
(*info->fprintf_func) (info->stream, "unknown");
break;
case 'i':
/* 16-bit signed immediate. */
switch (op->format)
{
case iw_i_type:
i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16;
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'u':
/* 16-bit unsigned immediate. */
switch (op->format)
{
case iw_i_type:
i = GET_IW_I_IMM16 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'o':
/* 16-bit signed immediate address offset. */
switch (op->format)
{
case iw_i_type:
i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16;
break;
default:
bad_opcode (op);
}
address = address + 4 + i;
(*info->print_address_func) (address, info);
break;
case 'j':
/* 5-bit unsigned immediate. */
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_IMM5 (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'l':
/* 8-bit unsigned immediate. */
switch (op->format)
{
case iw_custom_type:
i = GET_IW_CUSTOM_N (opcode);
break;
default:
bad_opcode (op);
}
(*info->fprintf_func) (info->stream, "%lu", i);
break;
case 'm':
/* 26-bit unsigned immediate. */
switch (op->format)
{
case iw_j_type:
i = GET_IW_J_IMM26 (opcode);
break;
default:
bad_opcode (op);
}
/* This translates to an address because it's only used in call
instructions. */
address = (address & 0xf0000000) | (i << 2);
(*info->print_address_func) (address, info);
break;
case 'c':
/* Control register index. */
switch (op->format)
{
case iw_r_type:
i = GET_IW_R_IMM5 (opcode);
break;
default:
bad_opcode (op);
}
reg_base = nios2_control_regs ();
(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
break;
default:
(*info->fprintf_func) (info->stream, "unknown");
break;
}
return 0;
}
