static void do_get_hw_residencies(void *arg) { struct cpuinfo_x86 *c = ¤t_cpu_data; struct hw_residencies *hw_res = arg; if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 ) return; switch ( c->x86_model ) { /* Ivy bridge */ case 0x3A: /* Sandy bridge */ case 0x2A: case 0x2D: GET_PC2_RES(hw_res->pc2); GET_CC7_RES(hw_res->cc7); /* fall through */ /* Nehalem */ case 0x1A: case 0x1E: case 0x1F: case 0x2E: /* Westmere */ case 0x25: case 0x2C: case 0x2F: GET_PC3_RES(hw_res->pc3); GET_PC6_RES(hw_res->pc6); GET_PC7_RES(hw_res->pc7); GET_CC3_RES(hw_res->cc3); GET_CC6_RES(hw_res->cc6); break; } }
static void do_get_hw_residencies(void *arg) { struct cpuinfo_x86 *c = ¤t_cpu_data; struct hw_residencies *hw_res = arg; if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 ) return; switch ( c->x86_model ) { /* 4th generation Intel Core (Haswell) */ case 0x45: GET_PC8_RES(hw_res->pc8); GET_PC9_RES(hw_res->pc9); GET_PC10_RES(hw_res->pc10); /* fall through */ /* Sandy bridge */ case 0x2A: case 0x2D: /* Ivy bridge */ case 0x3A: case 0x3E: /* Haswell */ case 0x3C: case 0x3F: case 0x46: /* Broadwell */ case 0x3D: case 0x4F: case 0x56: /* future */ case 0x4E: GET_PC2_RES(hw_res->pc2); GET_CC7_RES(hw_res->cc7); /* fall through */ /* Nehalem */ case 0x1A: case 0x1E: case 0x1F: case 0x2E: /* Westmere */ case 0x25: case 0x2C: case 0x2F: GET_PC3_RES(hw_res->pc3); GET_PC6_RES(hw_res->pc6); GET_PC7_RES(hw_res->pc7); GET_CC3_RES(hw_res->cc3); GET_CC6_RES(hw_res->cc6); break; /* next gen Xeon Phi */ case 0x57: GET_CC3_RES(hw_res->mc0); /* abusing GET_CC3_RES */ GET_CC6_RES(hw_res->mc6); /* abusing GET_CC6_RES */ GET_PC2_RES(hw_res->pc2); GET_PC3_RES(hw_res->pc3); GET_PC6_RES(hw_res->pc6); GET_PC7_RES(hw_res->pc7); PHI_CC6_RES(hw_res->cc6); break; /* various Atoms */ case 0x27: GET_PC3_RES(hw_res->pc2); /* abusing GET_PC3_RES */ GET_PC6_RES(hw_res->pc4); /* abusing GET_PC6_RES */ GET_PC7_RES(hw_res->pc6); /* abusing GET_PC7_RES */ break; /* Silvermont */ case 0x37: GET_MC6_RES(hw_res->mc6); /* fall through */ case 0x4A: case 0x4D: case 0x5A: case 0x5D: /* Airmont */ case 0x4C: GET_PC7_RES(hw_res->pc6); /* abusing GET_PC7_RES */ GET_CC1_RES(hw_res->cc1); GET_CC6_RES(hw_res->cc6); break; } }