Exemplo n.º 1
0
void us_ticker_free(void)
{
    GIC_DisableIRQ(OSTMI1TINT_IRQn);
    GIC_ClearPendingIRQ(OSTMI1TINT_IRQn);

    /* Power Control for Peripherals      */
    CPGSTBCR5 |= (CPG_STBCR5_BIT_MSTP50); /* disable OSTM1 clock */
}
Exemplo n.º 2
0
void lp_ticker_free(void)
{
    GIC_DisableIRQ(LP_TICKER_TIMER_IRQn);
    GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);

    MTU2TIER  &= ~MTU2_TIER_n_TGIEA;
    lp_ticker_inited = 0;
    mtu2_free();
}
uint64_t getPhy0Clock64(void)
{
    int was_masked = __disable_irq();
    uint32_t currentPhy0Clock = getPhy0Clock();
    uint32_t currentMsecCount = msecCount;
    if (GIC_GetIRQStatus(WrapAroundIrq) & 1) {
        currentMsecCount = ++msecCount;
        currentPhy0Clock = 0;
        GIC_ClearPendingIRQ(WrapAroundIrq);
    }
    if (!was_masked) {
        __enable_irq();
    }
    return phy0ClockPeriod * (uint64_t)currentMsecCount + currentPhy0Clock;
}
Exemplo n.º 4
0
void lp_ticker_init(void)
{
    GIC_DisableIRQ(LP_TICKER_TIMER_IRQn);
    GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);

    /* Power Control for Peripherals      */
    mtu2_init();

    if (lp_ticker_inited) return;
    lp_ticker_inited = 1;

    MTU2TCR   = MTU2_TCR_TPSC;
    MTU2TSTR  |= MTU2_TSTR_CST;
    MTU2TIER  |= MTU2_TIER_n_TGIEA;

    // INTC settings
    InterruptHandlerRegister(LP_TICKER_TIMER_IRQn, (void (*)(uint32_t))lp_ticker_irq_handler);
    GIC_SetPriority(LP_TICKER_TIMER_IRQn, 5);
    GIC_SetConfiguration(LP_TICKER_TIMER_IRQn, 3);
}
Exemplo n.º 5
0
void us_ticker_init(void)
{
    GIC_DisableIRQ(OSTMI1TINT_IRQn);
    GIC_ClearPendingIRQ(OSTMI1TINT_IRQn);

    /* Power Control for Peripherals      */
    CPGSTBCR5 &= ~(CPG_STBCR5_BIT_MSTP50); /* enable OSTM1 clock */

    if (us_ticker_inited) return;
    us_ticker_inited = 1;

    // timer settings
    OSTM1TT   = 0x01;    /* Stop the counter and clears the OSTM1TE bit.     */
    OSTM1CTL  = 0x02;    /* Free running timer mode. Interrupt disabled when star counter  */

    OSTM1TS   = 0x1;     /* Start the counter and sets the OSTM0TE bit.     */

    // INTC settings
    InterruptHandlerRegister(OSTMI1TINT_IRQn, (void (*)(uint32_t))us_ticker_irq_handler);
    GIC_SetPriority(OSTMI1TINT_IRQn, 5);
    GIC_SetConfiguration(OSTMI1TINT_IRQn, 3);
}
Exemplo n.º 6
0
void lp_ticker_clear_interrupt(void)
{
    MTU2TSR = (MTU2TSR & 0xFE);
    GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);
}
Exemplo n.º 7
0
void us_ticker_clear_interrupt(void)
{
    GIC_ClearPendingIRQ(OSTMI1TINT_IRQn);
}
Exemplo n.º 8
0
void us_ticker_clear_interrupt(void) {
    GIC_ClearPendingIRQ(US_TICKER_TIMER_IRQn);
}