//Carefull w/ register state , we may need to implement state push/pop
//GetRegister : Get the register , needs flag for mode
virtual x86_gpr_reg GetRegister(x86_gpr_reg d_reg,u32 sh4_reg,u32 mode)
{
checkvr(sh4_reg);
//No move , or RtR move + reload
if (IsRegAllocated(sh4_reg))
{
if ( r_alloced[sh4_reg].InReg==false)
{
if ((mode & RA_NODATA)==0)
{
//if we must load , and its not loaded
x86e->Emit(op_mov32,r_alloced[sh4_reg].x86reg,GetRegPtr(sh4_reg));
r_alloced[sh4_reg].Dirty=false;//not dirty .ffs, we just loaded it....
}
else
{
r_alloced[sh4_reg].Dirty=true;//its dirty, we dint load data :)
}
}
r_alloced[sh4_reg].InReg=true;
//nada
if (mode & RA_FORCE)
{
//move to forced reg , if needed
if ((r_alloced[sh4_reg].x86reg!=d_reg) && ((mode & RA_NODATA)==0))
x86e->Emit(op_mov32,d_reg,r_alloced[sh4_reg].x86reg);
return d_reg;
}
else
{
//return allocated reg
return r_alloced[sh4_reg].x86reg;
}
}
else
{
//MtoR move , force has no effect (allways forced) ;)
if (0==(mode & RA_NODATA))
x86e->Emit(op_mov32,d_reg,GetRegPtr(sh4_reg));
return d_reg;
}
//yes it realy can't come here
// __asm int 3;
//return EAX;
}
//WriteBackRegister : write reg to reg location
virtual void WriteBackRegister(u32 reg)
{
checkvr(reg);
if (IsRegAllocated(reg) && r_alloced[reg].InReg && r_alloced[reg].Dirty)
{
r_alloced[reg].Dirty=false;
x86e->Emit(op_mov32,GetRegPtr(reg),r_alloced[reg].x86reg);
}
}
//FlushRegister : write reg to reg location , and dealloc it
virtual void FlushRegister(u32 reg)
{
checkvr(reg);
if (IsRegAllocated(reg) && r_alloced[reg].InReg)
{
if (r_alloced[reg].Dirty)
x86e->Emit(op_mov32,GetRegPtr(reg),r_alloced[reg].x86reg);
r_alloced[reg].InReg=false;
r_alloced[reg].Dirty=false;
}
}
//Carefull w/ register state , we may need to implement state push/pop
//GetRegister : Get the register , needs flag for mode
virtual x86_sse_reg GetRegister(x86_sse_reg d_reg,u32 reg,u32 mode)
{
ensure_valid(reg);
if (IsRegAllocated(reg))
{
fprinfo* r1= GetInfo(reg);
if (r1->Loaded==false)
{
if ((mode & RA_NODATA)==0)
{
x86e->Emit(op_movss,r1->reg,GetRegPtr(reg));
r1->WritenBack=true;//data on reg is same w/ data on mem
}
else
r1->WritenBack=false;//data on reg is not same w/ data on mem
}
//we reg is now on sse reg :)
r1->Loaded=true;
if (mode & RA_FORCE)
{
if ((mode & RA_NODATA)==0)
x86e->Emit(op_movss,d_reg,r1->reg);
return d_reg;
}
else
{
return r1->reg;
}
}
else
{
if ((mode & RA_NODATA)==0)
x86e->Emit(op_movss,d_reg,GetRegPtr(reg));
return d_reg;
}
// __debugbreak();
//return XMM_Error;
}
virtual void LoadRegisterGPR(x86_gpr_reg to,u32 from)
{
if (IsRegAllocated(from))
{
fprinfo* r1= GetInfo(from);
if ((x86_caps.sse_2) && (r1->Loaded==true) && (r1->WritenBack==false))
{
x86_sse_reg freg=GetRegister(XMM0,from,RA_DEFAULT);
assert(freg!=XMM0);
x86e->Emit(op_movd_xmm_to_r32,to,freg);
}
else
{
WriteBackRegister(from);
x86e->Emit(op_mov32,to,GetRegPtr(from));
}
}
else
{
x86e->Emit(op_mov32,to,GetRegPtr(from));
}
}
virtual void SaveRegister(u32 reg,u32 from)
{
checkvr(reg);
if (!IsRegAllocated(reg))
{
x86e->Emit(op_mov32,GetRegPtr(reg),from);
}
else
{
x86_gpr_reg x86reg=GetRegister(EAX,reg,RA_NODATA);
x86e->Emit(op_mov32,x86reg,from);
}
MarkDirty(reg);
}
virtual void SaveRegisterGPR(u32 to,x86_gpr_reg from)
{
if (IsRegAllocated(to))
{
if (x86_caps.sse_2)
{
x86_sse_reg freg=GetRegister(XMM0,to,RA_NODATA);
assert(freg!=XMM0);
//x86e->Emit(op_int3);
//x86e->SSE2_MOVD_32R_to_XMM(freg,from);
x86e->Emit(op_movd_xmm_from_r32,freg,from);
}
else
{
x86e->Emit(op_mov32,GetRegPtr(to),from);
ReloadRegister(to);
}
}
else
{
x86e->Emit(op_mov32,GetRegPtr(to),from);
}
}
//Save registers
virtual void SaveRegister(u32 reg,x86_sse_reg from)
{
ensure_valid(reg);
if (IsRegAllocated(reg))
{
fprinfo* r1= GetInfo(reg);
r1->Loaded=true;
r1->WritenBack=false;
if (r1->reg!=from)
x86e->Emit(op_movss,r1->reg,from);
}
else
x86e->Emit(op_movss,GetRegPtr(reg),from);
}
//WriteBackRegister : write reg to reg location
virtual void WriteBackRegister(u32 reg)
{
ensure_valid(reg);
if (IsRegAllocated(reg))
{
fprinfo* r1= GetInfo(reg);
if (r1->Loaded)
{
if (r1->WritenBack==false)
{
x86e->Emit(op_movss,GetRegPtr(reg),r1->reg);
r1->WritenBack=true;
}
}
}
}
virtual void SaveRegister(u32 reg,float* from)
{
ensure_valid(reg);
if (IsRegAllocated(reg))
{
fprinfo* r1= GetInfo(reg);
r1->Loaded=true;
r1->WritenBack=false;
x86e->Emit(op_movss,r1->reg,(u32*)from);
}
else
{
x86e->Emit(op_movss,XMM0,(u32*)from);
x86e->Emit(op_movss,GetRegPtr(reg),XMM0);
}
}