void main(void)
{
InitSysCtrl();
InitSpiaGpio();
Gpio_select();
/*
EALLOW;
SysCtrlRegs.WDCR = 0x00AF; // re-enable the watchdog
EDIS;
*/
DINT;
IER = 0x0000;
IFR = 0x0000;
InitPieCtrl();
InitPieVectTable();
InitAdc();
spi_fifo_init();
Setup_ePWM(); // ePWM
Setup_ADC(); // ADC setup
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SPIRXINTA = &spiRxFifoIsr;
PieVectTable.SPITXINTA = &spiTxFifoIsr;
PieVectTable.SEQ1INT = &adc1_isr;
PieVectTable.EPWM1_INT = &ePWM1A_compare_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER6.bit.INTx1 = 1; // Enable PIE Group 6, INT 1
PieCtrlRegs.PIEIER6.bit.INTx2 = 1; // Enable PIE Group 6, INT 2
PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // adc1 (seq1 - pwm)
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // epwm1
IER |= 25; // Enable CPU INT6
EINT; // Enable Global Interrupts
ERTM;
while (1)
{
if (AdcRegs.ADCST.bit.INT_SEQ1 == 1) // ADC seq1 interrupt for pwm (at prd)
{
flag1 = 1;
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
}
if (EPwm1Regs.ETFLG.bit.INT == 1) // epwm interrupt for pwm of second converter (at prd)
{
flag2 = 1;
EPwm1Regs.ETCLR.bit.INT = 1;
}
}
}
void Gpio_PortF(void)
{
// GPIO Test #5:
// Configure Upper bits [14:8] of Port F as outputs and bits [7:0] as inputs
// Loop back bits [14:8] to bits [6:0], also loopback bit #8, to bit #7
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 14-8 DIR as outputs, 7-0 as inputs.
Gpio_select();
Test_status[Test_var] = 0x0007;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPFSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPFCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPFSET.all = 0x5500; // Test Set
asm(" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x55D5 ) error(1);
GpioDataRegs.GPFTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x2A2A ) error(1);
test_count++;
}
Test_var++;
} // End of Test #5
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this example use the following configuration:
Gpio_select();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
// Step 5. User specific code:
#if EXAMPLE1
// This example uses DATA registers to toggle I/O's
Gpio_example1();
#endif // - EXAMPLE1
#if EXAMPLE2
// This example uses SET/CLEAR registers to toggle I/O's
Gpio_example2();
#endif
#if EXAMPLE3
// This example uses TOGGLE registers to toggle I/O's
Gpio_example3();
#endif
}
void Gpio_PortB(void)
{
// GPIO Test #4:
// Configure Upper 8 bits of Port B as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Set input qualifier to 0x0002
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 as inputs.
var3= 0x0002; // Set input qualifier to 2
Gpio_select();
// Test #4A: Set delay so that the input gets rejected.
// Delay must be < ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0005;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPBCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #24 || NOP"); // Delay < (6 * 2 * 2) CPUCLK cycles
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0x0000 ) error(1);
GpioDataRegs.GPBSET.all = 0x5500; // Test Set
asm(" RPT #24 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0x5555 ) error(1);
GpioDataRegs.GPBTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #24 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// Test #4B: Set delay so that the input is qualified successfully
// Delay must be >= ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0006;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPBCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #29 || NOP"); // Delay = (6 * 2 * 2) CPUCLK cycles
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPBSET.all = 0x5500; // Test Set
asm(" RPT #29 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPBTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #29 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
} // End of Test #4
void Gpio_PortA(void)
{
// GPIO Test #1:
// Configure Upper 8 bits of Port A as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Don't set any input qualifier
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 DIR as inputs
var3= 0x0000; // Don't set any input qualifier
Gpio_select();
test_count = 0;
Test_status[Test_var] = 0x0001;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// End of Test #1
// GPIO Test #2:
// Configure Upper 8 bits of Port as inputs and lower 8 bits as outputs
// Loop back bits [7:0] to bits [15:8]
// Don't set any input qualifier
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0x00FF; // sets GPIO 15-8 DIR as inputs, 7-0 DIR as outputs
var3= 0x0000; // Don't set any input qualifier
Gpio_select();
test_count = 0;
Test_status[Test_var] = 0x0002;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPACLEAR.all = 0x00FF; // Test Clear
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x00AA; // Test Set
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
GpioDataRegs.GPATOGGLE.all = 0x0055; // Test Toggle
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xFFFF ) error(1);
test_count++;
}
Test_var++;
// End of Test #2
// GPIO Test #3:
// Configure Upper 8 bits of Port as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Set input qualifier to 0x0001
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 as inputs.
var3= 0x0001; // Set input qualifier to 1
Gpio_select();
// Test #3A: Set delay so that the input gets rejected.
// delay must be < ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0003;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm (" RPT #14 || NOP"); // Delay < ( 6 * 2 ) CPUCLK cycles
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #14 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #14 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// Test #3B: Set delay so that the input is qualified successfully
// delay must be >= ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0004;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) // repeat the tests 4 times
{
GpioDataRegs.GPASET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm (" RPT #16 || NOP"); // Delay = (6 * 2 * 1) CPUCLK cycles
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #16 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #16 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
} // End of Test #3
