int qdss_fuse_trace_access_non_secure(void)
{
unsigned int uNIDEN_DISABLE;
unsigned int uDBGGEN_DISABLE;
uNIDEN_DISABLE = HWIO_INF(OEM_CONFIG1, DAP_NIDEN_DISABLE);
uDBGGEN_DISABLE = HWIO_INF(OEM_CONFIG1, DAP_DBGEN_DISABLE);
return ((!uDBGGEN_DISABLE) || (!uNIDEN_DISABLE)) ? 1 : 0;
}
int qdss_fuse_trace_access_secure(void)
{
unsigned int uSPIDEN_DISABLE;
unsigned int uSPNIDEN_DISABLE;
uSPNIDEN_DISABLE = HWIO_INF(OEM_CONFIG1, DAP_SPNIDEN_DISABLE);
uSPIDEN_DISABLE = HWIO_INF(OEM_CONFIG1, DAP_SPIDEN_DISABLE);
return ((!uSPIDEN_DISABLE) || (!uSPNIDEN_DISABLE)) ? 1 : 0;
}
boolean HAL_clk_LPMIsOn
(
HAL_clk_ClockDescType *pmClockDesc
)
{
if((HWIO_INF(LPASS_AUDIO_CORE_LPM_CBCR, CLK_OFF) == 0) &&
(HWIO_INF(LPASS_AUDIO_CORE_LPM_MEM0_CBCR, CLK_OFF) == 0) &&
(HWIO_INF(LPASS_AUDIO_CORE_LPM_MEM1_CBCR, CLK_OFF) == 0) &&
(HWIO_INF(LPASS_AUDIO_CORE_LPM_MEM2_CBCR, CLK_OFF) == 0) &&
(HWIO_INF(LPASS_AUDIO_CORE_LPM_MEM3_CBCR, CLK_OFF) == 0))
{
return TRUE;
}
else
{
return FALSE;
}
} /* HAL_clk_LPMIsOn */
/*===========================================================================
FUNCTION HSU_PHY_UTILS_SPOOF_DISCONNECT
DESCRIPTION
This function causes the device to disconnect from host,
while USB cable can still be attached.
DEPENDENCIES
None.
RETURN VALUE
TRUE - Operation successful. FALSE - Otherwise.
SIDE EFFECTS
None.
===========================================================================*/
boolean hsu_phy_utils_spoof_disconnect(void)
{
#ifdef FEATURE_HS_USB_INTEGRATED_PHY
#ifndef FEATURE_HS_USB_HAL
const uint32 MAX_SPOOF_DISCONNECT_GUARD_LOOP = 10000;
uint32 loop_itor;
#endif /* FEATURE_HS_USB_HAL */
#endif /* FEATURE_HS_USB_INTEGRATED_PHY */
/* Stop the core */
#ifdef FEATURE_HS_USB_HAL
HAL_hsusb_ClearBits32(0, HAL_HSUSB_USBCMD_ADDR, HAL_HSUSB_USBCMD_RS_BMSK);
#else /* FEATURE_HS_USB_HAL */
HWIO_OUTF(USB_OTG_HS_USBCMD, RS, 0);
#endif /* FEATURE_HS_USB_HAL */
#ifdef FEATURE_HS_USB_INTEGRATED_PHY
/* SW workaround for intg. phy in which clearing the RS bit does not pull down D+
Write function control register:
bits [3,4] (OpMode) = [0,1] (Non-Driving)
bit [6] (SuspendM) = [1] (Normal Power) */
#ifdef FEATURE_HS_USB_HAL
if (HAL_hsusb_WriteUlpiPhy(0, 0, 0x4, 0x48) == HAL_HSUSB_Success)
{
return TRUE;
}
#else /* FEATURE_HS_USB_HAL */
HWIO_OUT(USB_OTG_HS_ULPI_VIEWPORT, 0x60040048);
for (loop_itor = 0 ; loop_itor < MAX_SPOOF_DISCONNECT_GUARD_LOOP
; ++loop_itor)
{
/* Wait until the ULPI running bit is cleared */
if (!(HWIO_INF(USB_OTG_HS_ULPI_VIEWPORT, ULPIRUN)))
{
return TRUE;
}
}
#endif /* FEATURE_HS_USB_HAL */
HSU_MSG_ERROR("hsu_os_bus_spoof_disconnect: couldn't write termselect",
0, 0, 0);
return FALSE;
#else /* !FEATURE_HS_USB_INTEGRATED_PHY */
return TRUE;
#endif /* FEATURE_HS_USB_INTEGRATED_PHY */
} /* hsu_phy_utils_spoof_disconnect */
/**
Internal API which returns whether a clock is on or not.
@param[in] eClockId - The ID of the clock to enable.
@return
TRUE - The clock is on.
FALSE - Otherwise.
@dependencies
None.
*/
boolean uClock_IsOn(uClockIdType eClockId)
{
uint32 nVal = 0;
switch(eClockId)
{
case CLOCK_GCC_BLSP1_QUP1_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP1_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_QUP2_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP2_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_QUP3_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP3_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_QUP4_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP4_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_QUP5_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP5_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_QUP6_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP1_QUP6_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP1_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP1_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP2_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP2_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP3_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP3_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP4_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP4_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP5_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP5_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_QUP6_APPS_CLK:
nVal = HWIO_INF(GCC_BLSP2_QUP6_I2C_APPS_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP1_AHB_CLK:
nVal = HWIO_INF(GCC_BLSP1_AHB_CBCR, CLK_OFF);
break;
case CLOCK_GCC_BLSP2_AHB_CLK:
nVal = HWIO_INF(GCC_BLSP2_AHB_CBCR, CLK_OFF);
break;
default:
break;
}
if(nVal != 0)
{
return(FALSE);
}
else
{
return(TRUE);
}
} /* uClock_IsOn */
