//==========================================================================
// Initialize driver & hardware state
//==========================================================================
void cyg_lpc2xxx_i2c_init(struct cyg_i2c_bus *bus)
{
cyg_lpc2xxx_i2c_extra* extra = (cyg_lpc2xxx_i2c_extra*)bus->i2c_extra;
cyg_uint16 duty_cycle;
cyg_drv_mutex_init(&extra->i2c_lock);
cyg_drv_cond_init(&extra->i2c_wait, &extra->i2c_lock);
cyg_drv_interrupt_create(I2C_ISRVEC(extra),
I2C_ISRPRI(extra),
(cyg_addrword_t) extra,
&lpc2xxx_i2c_isr,
&lpc2xxx_i2c_dsr,
&(extra->i2c_interrupt_handle),
&(extra->i2c_interrupt_data));
cyg_drv_interrupt_attach(extra->i2c_interrupt_handle);
CLR_CON(extra, CON_EN | CON_STA | CON_SI | CON_AA);
HAL_WRITE_UINT8(I2C_ADR(extra), 0);
//
// Setup I2C bus frequency
//
duty_cycle = (I2C_CLK(extra) / I2C_BUS_FREQ(extra)) / 2;
HAL_WRITE_UINT16(I2C_SCLL(extra), duty_cycle);
HAL_WRITE_UINT16(I2C_SCLH(extra), duty_cycle);
SET_CON(extra, CON_EN);
}
void i2c_frequency(i2c_t *obj, int hz) {
uint32_t PCLK = PeripheralClock;
uint32_t pulse = PCLK / (hz * 2);
// I2C Rate
I2C_SCLL(obj, pulse);
I2C_SCLH(obj, pulse);
}
void i2c_frequency(i2c_t *obj, int hz) {
// [TODO] set pclk to /4
uint32_t PCLK = SystemCoreClock / 4;
uint32_t pulse = PCLK / (hz * 2);
// I2C Rate
I2C_SCLL(obj, pulse);
I2C_SCLH(obj, pulse);
}
void i2c_frequency(i2c_t *obj, int hz) {
// No peripheral clock divider on the M0
uint32_t PCLK = SystemCoreClock;
uint32_t pulse = PCLK / (hz * 2);
// I2C Rate
I2C_SCLL(obj, pulse);
I2C_SCLH(obj, pulse);
}
void i2c_frequency(i2c_t *obj, int hz) {
#if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
// [TODO] set pclk to /4
uint32_t PCLK = SystemCoreClock / 4;
#elif defined(TARGET_LPC11U24)
// No peripheral clock divider on the M0
uint32_t PCLK = SystemCoreClock;
#endif
uint32_t pulse = PCLK / (hz * 2);
// I2C Rate
I2C_SCLL(obj, pulse);
I2C_SCLH(obj, pulse);
}
