Exemplo n.º 1
0
void writeByte(uint8_t devAddr, uint8_t regAddr, uint8_t data)
{
	I2CbeginTransmission(devAddr);
	I2Cwrite(regAddr);
	I2Cwrite(data);
	I2CendTransmission();
}
Exemplo n.º 2
0
void readByte(uint8_t devAddr, uint8_t regAddr, uint8_t *b )
{
	I2CbeginTransmission(devAddr);
	I2Cwrite(regAddr);
	I2CendTransmission();
	msDelay(2);

	I2CrequestFrom(devAddr, 1);	// read a single byte
	*b = (uint8_t)I2Cread();
}
Exemplo n.º 3
0
// initialize HMC5843
void init_HMC5843()
{
	// The default (factory) HMC5843 7-bit slave address is 0x3C for write operations, 
	// or 0x3D for read operations.  Put the HMC5843 into continuous mode by sending 
	// 0x3C 0x02 0x00 to write the 00 into the second register or mode register

	//I2Cwrite(0x03c, 0, 24); 	// put hmc at 50hz
	//I2Cwrite(0x03c, 1, 0); 	// put hmc .7Ga mode
	I2Cwrite(0x03c, 2, 0); 		// put hmc in continuous mode

	// note that you need to wait 100ms after this before first calling recieve
	microcontroller_delay_ms(100);
}
Exemplo n.º 4
0
void readBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t *data)
{
	int i;
	I2CbeginTransmission(devAddr);
	I2Cwrite(regAddr);
	msDelay(2);
	I2CendTransmission();
	msDelay(2);
	I2CrequestFrom(devAddr, 14);
	msDelay(5);

	for (i = 0; i < length; i++)
		{
			data[i] = I2Cread();
		}
}
Exemplo n.º 5
0
void InitializeIMU(void){

    I2Cinitialize();  //Turn on and initialize I2C module 1
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x6B, 0x00); //Initialize MPU6050
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x19, 0x01); //Set Sample Rate Divider
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x1A, 0x01); //Set DLPF
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x1B, 0x10); //Change Gyro sensitivity
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x6A, 0x00); //Disable Aux I2C
    ShortDelay(5000);
    I2Cwrite((0x68 << 1)|I2C_WRITE, 0x37, 0x02); //Aux I2C Bypass
    //WriteString(UART2,"Initialized MPU6050\r\n");
    ShortDelay(10000);
    I2Cwrite((0x1E << 1)|I2C_WRITE, 0x02, 0x00); //Initialize H
    ShortDelay(50000);
}
Exemplo n.º 6
0
////////////////////////////////////////////////////////////////////////////////
/// @brief	Application main function.
////////////////////////////////////////////////////////////////////////////////
void main(void) {

  // Initializations
  SET_MAIN_CLOCK_SOURCE(CRYSTAL);
  SET_MAIN_CLOCK_SPEED(MHZ_26);
  CLKCON = (CLKCON & 0xC7);

  init_peripherals();
  
  P0 &= ~0x40;                            // Pulse the Codec Reset line (high to low, low to high)
  P0 |= 0x40;
  
  init_codec();                           // Initilize the Codec
  
  INT_SETFLAG(INUM_DMA, INT_CLR);         // clear the DMA interrupt flag
  I2SCFG0 |= 0x01;                        // Enable the I2S interface

  DMA_SET_ADDR_DESC0(&DmaDesc0);          // Set up DMA configuration table for channel 0
  DMA_SET_ADDR_DESC1234(&DmaDesc1_4[0]);  // Set up DMA configuration table for channels 1 - 4
  dmaMemtoMem(AF_BUF_SIZE);               // Set up DMA Channel 0 for memmory to memory data transfers
  initRf();                               // Set radio base frequency and reserve DMA channels 1 and 2 for RX/TX buffers
  dmaAudio();                             // Set up DMA channels 3 and 4 for the Audio In/Out buffers
  DMAIRQ = 0;
  DMA_ARM_CHANNEL(4);                     // Arm DMA channel 4

  macTimer3Init();

  INT_ENABLE(INUM_T1, INT_ON);            // Enable Timer 1 interrupts
  INT_ENABLE(INUM_DMA, INT_ON);           // Enable DMA interrupts
  INT_GLOBAL_ENABLE(INT_ON);              // Enable Global interrupts

  MAStxData.macPayloadLen = TX_PAYLOAD_LEN;
  MAStxData.macField = MAC_ADDR;

  while (1)  {        // main program loop
    setChannel(channel[band][ActiveChIdx]);             // SetChannel will set the MARCSTATE to IDLE
    ActiveChIdx = (ActiveChIdx + 1) & 0x03;
    
    SCAL();           // Start PLL calibration at new channel

    if ((P1 & 0x08) != aux_option_status) {             // if the 'SEL AUX IN' option bit has changed state
      if ((P1 & 0x08) == 0) {                           // SEL AUX IN has changed state to true
        I2Cwrite(MIC1LP_LEFTADC, 0xFC);                 // Disconnect MIC1LP/M from the Left ADC, Leave Left DAC enabled
        I2Cwrite(MIC2L_MIC2R_LEFTADC, 0x2F);            // Connect AUX In (MIC2L) to Left ADC
        I2Cwrite(LEFT_ADC_PGA_GAIN, 0x00);              // Set PGA gain to 0 dB
        aux_option_status &= ~0x08;
      }
      else {                                            // SEL AUX IN has changed state to false
        I2Cwrite(MIC2L_MIC2R_LEFTADC, 0xFF);            // Disconnect AUX In (MIC2L) from Left ADC
        I2Cwrite(MIC1LP_LEFTADC, 0x84);                 // Connect the internal microphone to the Left ADC using differential inputs (gain = 0 dB); Power Up the Left ADC
        I2Cwrite(LEFT_ADC_PGA_GAIN, 0x3C);              // Enable PGA and set gain to 30 dB
        aux_option_status |= 0x08;
      }
    }
     
    if ((P1 & 0x04) != agc_option_status) {             // if the 'ENA AGC' option bit has changed state
      if ((P1 & 0x04) == 0) {                           // ENA AGC has changed state to true
        I2Cwrite(LEFT_AGC_CNTRL_A, 0x90);               // Left AGC Control Register A - Enable, set target level to -8 dB
        I2Cwrite(LEFT_AGC_CNTRL_B, 0xC8);               // Left AGC Control Register B - Set maximum gain to  to 50 dB
        I2Cwrite(LEFT_AGC_CNTRL_C, 0x00);               // Left AGC Control Register C - Disable Silence Detection
        agc_option_status &= ~0x04;
      }
      else {                                            // SEL AUX IN has changed state to false
        I2Cwrite(LEFT_AGC_CNTRL_A, 0x10);               // Left AGC Control Register A - Disable
        agc_option_status |= 0x04;
      }    
    }
    
// Check the band selection bits

    band = 2;                             // if the switch is not in position 1 or 2, in must be in position 3
    
    if ((P1 & 0x10) == 0)                 // check if switch is in position 1
      band = 0;
    
    else if ((P0 & 0x04) == 0)            // check if switch is in position 2
      band = 1;
    
// Now wait for the "audio frame ready" signal

    while (audioFrameReady == FALSE);     // Wait until an audioframe is ready to be transmitted
    
    audioFrameReady = FALSE;              // Reset the flag

// Move data from the CODEC (audioOut) buffer to the TX buffer using DMA Channel 0

    SET_WORD(DmaDesc0.SRCADDRH, DmaDesc0.SRCADDRL, audioOut[activeOut]);
    SET_WORD(DmaDesc0.DESTADDRH, DmaDesc0.DESTADDRL, MAStxData.payload);
    DmaDesc0.SRCINC = SRCINC_1;           // Increment Source address 
    DMAARM |= DMA_CHANNEL_0;
    DMAREQ |= DMA_CHANNEL_0;              // Enable memory-to-memory transfer using DMA channel 0
    while ((DMAARM & DMA_CHANNEL_0) > 0); // Wait for transfer to complete

    while (MARCSTATE != 0x01);            // Wait for calibration to complete
   
    P2 |= 0x08;                   // Debug - Set P2_3 (TP2)
    rfSendPacket(MASTER_TX_TIMEOUT_WO_CALIB);
    P2 &= ~0x08;                  // Debug - Reset P2_3 (TP2)
  
  }   // end of 'while (1)' loop
}
Exemplo n.º 7
0
void writeReg(uint8_t address, uint8_t data)
{
    I2Cwrite((0x20 + 0x07) << 1, address, data);
}