INC_UINT8 INC_EBI_READ_BURST(INC_UINT8 ucI2CID, INC_UINT16 uiAddr, INC_UINT8* pData, INC_UINT16 nSize)
{
INC_UINT16 uiLoop, nIndex = 0, anLength[2], uiCMD, unDataCnt;
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
if(nSize > INC_MPI_MAX_BUFF) return INC_ERROR;
memset((INC_INT8*)anLength, 0, sizeof(anLength));
if(nSize > INC_TDMB_LENGTH_MASK) {
anLength[nIndex++] = INC_TDMB_LENGTH_MASK;
anLength[nIndex++] = nSize - INC_TDMB_LENGTH_MASK;
}
else anLength[nIndex++] = nSize;
INC_INTERRUPT_LOCK();
for(uiLoop = 0; uiLoop < nIndex; uiLoop++){
uiCMD = INC_REGISTER_CTRL(SPI_MEMREAD_CMD) | (anLength[uiLoop] & INC_TDMB_LENGTH_MASK);
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr & 0xff;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD & 0xff;
for(unDataCnt = 0 ; unDataCnt < anLength[uiLoop]; unDataCnt++){
*pData++ = *(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS & 0xff;
}
}
INC_INTERRUPT_FREE();
return INC_SUCCESS;
}
INC_UINT16 INC_SPI_REG_READ(INC_UINT8 ucI2CID, INC_UINT16 uiAddr)
{
INC_UINT16 uiRcvData = 0;
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
INC_UINT16 uiCMD = INC_REGISTER_CTRL(SPI_REGREAD_CMD) | 1;
INC_UINT8 auiBuff[6];
INC_UINT8 cCnt = 0;
INC_UINT8 acRxBuff[2];
struct spi_message msg;
struct spi_transfer transfer[2];
int status;
INC_MUTEX_LOCK();
auiBuff[cCnt++] = uiNewAddr >> 8;
auiBuff[cCnt++] = uiNewAddr & 0xff;
auiBuff[cCnt++] = uiCMD >> 8;
auiBuff[cCnt++] = uiCMD & 0xff;
/* TODO SPI Write code here... */
memset( &msg, 0, sizeof( msg ) );
memset( transfer, 0, sizeof( transfer ) );
spi_message_init( &msg );
msg.spi=spi_dmb;
transfer[0].tx_buf = (u8 *) auiBuff;
transfer[0].rx_buf = (u8 *) NULL;
transfer[0].len = 4;
transfer[0].bits_per_word = 8;
transfer[0].delay_usecs = 0;
spi_message_add_tail( &(transfer[0]), &msg );
transfer[1].tx_buf = (u8 *) NULL;
transfer[1].rx_buf = (u8 *) acRxBuff;
transfer[1].len = 2;
transfer[1].bits_per_word = 8;
transfer[1].delay_usecs = 0;
spi_message_add_tail( &(transfer[1]), &msg );
status = spi_sync(spi_dmb, &msg);
uiRcvData = (INC_UINT16)(acRxBuff[0] << 8)|(INC_UINT16)acRxBuff[1];
/* TODO SPI Read code here... */
INC_MUTEX_FREE();
return uiRcvData;
}
INC_UINT16 INC_EBI_READ(INC_UINT8 ucI2CID, INC_UINT16 uiAddr)
{
INC_UINT16 uiRcvData = 0;
INC_UINT16 uiCMD = INC_REGISTER_CTRL(SPI_REGREAD_CMD) | 1;
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
INC_INTERRUPT_LOCK();
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr & 0xff;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD & 0xff;
uiRcvData = (*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS & 0xff) << 8;
uiRcvData |= (*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS & 0xff);
INC_INTERRUPT_FREE();
return uiRcvData;
}
INC_UINT8 INC_EBI_WRITE(INC_UINT8 ucI2CID, INC_UINT16 uiAddr, INC_UINT16 uiData)
{
INC_UINT16 uiCMD = INC_REGISTER_CTRL(SPI_REGWRITE_CMD) | 1;
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
INC_MUTEX_LOCK();
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiNewAddr & 0xff;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD >> 8;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiCMD & 0xff;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = (uiData >> 8) & 0xff;
*(volatile INC_UINT8*)STREAM_PARALLEL_ADDRESS = uiData & 0xff;
INC_MUTEX_FREE();
return INC_SUCCESS;
}
INC_UINT8 INC_SPI_READ_BURST(INC_UINT8 ucI2CID, INC_UINT16 uiAddr, INC_UINT8* pBuff, INC_UINT16 wSize)
{
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
INC_UINT16 uiCMD;
INC_UINT8 auiBuff[6];
//INC_UINT16 uiLoop, nIndex = 0, anLength[2], unDataCnt;
struct spi_message msg;
struct spi_transfer transfer[2];
int status;
INC_MUTEX_LOCK();
auiBuff[0] = uiNewAddr >> 8;
auiBuff[1] = uiNewAddr & 0xff;
uiCMD = INC_REGISTER_CTRL(SPI_MEMREAD_CMD) | (wSize & 0xFFF);
auiBuff[2] = uiCMD >> 8;
auiBuff[3] = uiCMD & 0xff;
memset( &msg, 0, sizeof( msg ) );
memset( transfer, 0, sizeof( transfer ) );
spi_message_init( &msg );
msg.spi=spi_dmb;
transfer[0].tx_buf = (u8 *) auiBuff;
transfer[0].rx_buf = (u8 *)NULL;
transfer[0].len = 4;
transfer[0].bits_per_word = 8;
transfer[0].delay_usecs = 0;
spi_message_add_tail( &(transfer[0]), &msg );
transfer[1].tx_buf = (u8 *) NULL;
transfer[1].rx_buf = (u8 *)pBuff;
transfer[1].len = wSize;
transfer[1].bits_per_word = 8;
transfer[1].delay_usecs = 0;
spi_message_add_tail( &(transfer[1]), &msg );
status = spi_sync(spi_dmb, &msg);
INC_MUTEX_FREE();
return INC_SUCCESS;
}
INC_UINT8 INC_SPI_REG_WRITE(INC_UINT8 ucI2CID, INC_UINT16 uiAddr, INC_UINT16 uiData)
{
INC_UINT16 uiNewAddr = (ucI2CID == TDMB_I2C_ID82) ? (uiAddr | 0x8000) : uiAddr;
INC_UINT16 uiCMD = INC_REGISTER_CTRL(SPI_REGWRITE_CMD) | 1;
INC_UINT8 auiBuff[6];
INC_UINT8 cCnt = 0;
/* TODO SPI SDO Send code here... */
struct spi_message msg;
struct spi_transfer transfer;
int status;
INC_MUTEX_LOCK();
auiBuff[cCnt++] = uiNewAddr >> 8;
auiBuff[cCnt++] = uiNewAddr & 0xff;
auiBuff[cCnt++] = uiCMD >> 8;
auiBuff[cCnt++] = uiCMD & 0xff;
auiBuff[cCnt++] = uiData >> 8;
auiBuff[cCnt++] = uiData & 0xff;
memset( &msg, 0, sizeof( msg ) );
memset( &transfer, 0, sizeof( transfer ) );
spi_message_init( &msg );
msg.spi=spi_dmb;
transfer.tx_buf = (u8 *) auiBuff;
transfer.rx_buf = NULL;
transfer.len = 6;
transfer.bits_per_word = 8;
transfer.delay_usecs = 0;
spi_message_add_tail( &transfer, &msg );
status = spi_sync(spi_dmb, &msg);
/* TODO SPI SDO Send code here... */
INC_MUTEX_FREE();
return INC_SUCCESS;
}
