/*---------------------------------------------------------------------------*/
static uint8_t ds28_reset(void) {
uint8_t result;
OW_DRIVE();
udelay(500); /* 480 < tH < 640 */
OW_RELEASE(); /* Releases the bus */
udelay(tI);
result = INP();
udelay(tJ);
return result;
}
/*---------------------------------------------------------------------------*/
static int
owreset(void)
{
int result;
OUTP_0();
udelay(tH);
OUTP_1(); /* Releases the bus */
udelay(tI);
result = INP();
udelay(tJ);
return result;
}
void khyt1331_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned short adr, i;
unsigned char status, enclam;
/* figure out which crate caused interrupt */
for (i = 0; i < 4; i++) {
adr = io_base + (i << 4);
status = INP(adr + 6);
if (status != 0xFF && (status & (1 << 3))) {
enclam = (INP(adr + 8) & 0x1F); // mask upper 3 bits
interrupt_info = (i << 16) | enclam;
printk(KERN_INFO "khyt1331: interrupt crate %d, station %d\n", i, enclam);
/* disable interrupts */
OUTP(adr + 10, 40);
/* increment interrupt counter */
interrupt_count++;
/* wake user process */
wake_up_interruptible(&wq);
/* send signal to user process */
kill_fasync(&async_queue, SIGIO, POLL_IN);
}
}
/* signal raw interrupt response time
adr = io_base;
OUTP(adr, 0xFF);
OUTP(adr+8, 1);
OUTP(adr+6, 1);
OUTP(adr+10, 16);
OUTP(adr, 0);
OUTP(adr+10, 16);
*/
}
Byte Processor::execInstruction() {
#ifdef R_UM_OPT_ENABLE_LOGGING
#ifdef R_UM_OPT_PRC_DEBUG
ic_ ++;
#endif
#endif
Word instr = (*mm_)(0, pc_ ++);
switch (decodeInstruction(instr)) {
case IC_CNDMOV:
return CNDMOV(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_ARRIDX:
return ARRIDX(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_ARRAMD:
return ARRAMD(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_ADD:
return ADD(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_MUL:
return MUL(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_DIV:
return DIV(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_NOTAND:
return NOTAND(decodeAreg(instr), decodeBreg(instr),
decodeCreg(instr));
case IC_HLT:
return HLT();
case IC_ALLOC:
return ALLOC(decodeBreg(instr), decodeCreg(instr));
case IC_ABAND:
return ABAND(decodeCreg(instr));
case IC_OUTP:
return OUTP(decodeCreg(instr));
case IC_INP:
return INP(decodeCreg(instr));
case IC_LDPRG:
return LDPRG(decodeBreg(instr), decodeCreg(instr));
case IC_ORTHO:
return ORTHO(decodeOreg(instr), decodeVal(instr));
default:
assert(false);
return HLT();
}
}
/*---------------------------------------------------------------------------*/
static unsigned ds28_read_byte(void) {
unsigned result = 0;
int i = 7;
do {
OW_DRIVE();
udelay(tA);
OW_RELEASE(); /* Releases the bus */
udelay(tE);
if (INP()) result |= 0x80; /* LSbit first */
udelay(tF);
if (i == 0) return result;
i--;
result >>= 1;
} while (1);
}
void ResetDevice_m(void)
{
/*
* If we are using the VGA aperture on a Mach 32, put its
* VGA controller into planar mode.
*/
if (phwDeviceExtension->FrameLength == 0x10000)
{
OUTPW(reg1CE, SavedExtRegs[0]);
OUTPW(reg1CE, SavedExtRegs[1]);
OUTPW(reg1CE, SavedExtRegs[2]);
OUTP(reg1CE, 0xBE);
OUTPW(reg1CE, (WORD)(((INP(reg1CF) & 0xF7) << 8) | 0xBE));
}
UninitTiDac_m();
Passth8514_m(SHOW_VGA);
} /* ResetDevice_m() */
/*---------------------------------------------------------------------------*/
static unsigned
owreadb(void)
{
unsigned result = 0;
int i = 7;
do {
OUTP_0();
udelay_tA();
OUTP_1(); /* Releases the bus */
udelay(tE);
if(INP()) {
result |= 0x80; /* LSbit first */
}
udelay(tF);
if(i == 0) {
return result;
}
i--;
result >>= 1;
} while(1);
}
void SetCurrentMode_m(struct query_structure *QueryPtr, struct st_mode_table *CrtTable)
{
WORD MiscOptions; /* Contents of MISC_OPTIONS register */
USHORT Scratch; /* Temporary variable */
/*
* Put the DAC in a known state before we start.
*/
UninitTiDac_m();
Passth8514_m(SHOW_ACCEL); // turn vga pass through off
/*
* On cards with the "MISC_OPTIONS doesn't report video memory size
* correctly" bug, reset MISC_OPTIONS to show the true amount of
* video memory. This is done here rather than when we determine
* how much memory is present in order to avoid trashing the "blue
* screen" (no adverse effects on operation, but would generate
* large numbers of user complaints).
*/
if (((QueryPtr->q_asic_rev == CI_68800_6) || (QueryPtr->q_asic_rev == CI_68800_AX)) &&
(QueryPtr->q_VGA_type == 1) &&
((QueryPtr->q_memory_type == VMEM_DRAM_256Kx4) ||
(QueryPtr->q_memory_type == VMEM_DRAM_256Kx16) ||
(QueryPtr->q_memory_type == VMEM_DRAM_256Kx4_GRAP)))
{
MiscOptions = INPW(MISC_OPTIONS) & MEM_SIZE_STRIPPED;
switch (QueryPtr->q_memory_size)
{
case VRAM_512k:
MiscOptions |= MEM_SIZE_512K;
break;
case VRAM_1mb:
MiscOptions |= MEM_SIZE_1M;
break;
case VRAM_2mb:
MiscOptions |= MEM_SIZE_2M;
break;
case VRAM_4mb:
MiscOptions |= MEM_SIZE_4M;
break;
}
OUTPW(MISC_OPTIONS, MiscOptions);
}
setmode_m(CrtTable, (ULONG) &(phwDeviceExtension->RomBaseRange), (ULONG) phwDeviceExtension->ModelNumber);
/*
* On a Mach 8 card, 1280x1024 can only be done in split
* pixel mode. If we are running on a Mach 8, and this
* resolution was selected, go into split pixel mode.
*
* Bit 4 of EXT_GE_CONFIG is set for split pixel mode and
* clear for normal mode. Bit 3 must be set, since clearing
* it accesses EEPROM read/write mode.
*/
if ((phwDeviceExtension->ModelNumber == _8514_ULTRA)
|| (phwDeviceExtension->ModelNumber == GRAPHICS_ULTRA))
{
if (QueryPtr->q_desire_x == 1280)
OUTPW(EXT_GE_CONFIG, 0x0018);
else OUTPW(EXT_GE_CONFIG, 0x0008);
}
/*
* Default to 8 bits per pixel. Modes which require a different
* setting will change this in the init_ti_<depth>_m() function.
*/
OUTP(DAC_MASK, 0xff);
if (phwDeviceExtension->ModelNumber == MACH32_ULTRA)
{
switch (CrtTable->m_pixel_depth) // program the DAC for the
{ // other resolutions
case 4:
case 8:
InitTi_8_m((WORD)(CrtTable->ColourDepthInfo | 0x0a));
break;
case 16:
InitTi_16_m((WORD)(CrtTable->ColourDepthInfo | 0x0a), (ULONG) &(phwDeviceExtension->RomBaseRange)); /* 16 bit 565 */
break;
case 24:
case 32:
/*
* RGB/BGR and 24/32 bit mode information is
* stored in CrtTable->ColourDepthInfo.
*/
InitTi_24_m((WORD)(CrtTable->ColourDepthInfo | 0x0a), (ULONG) &(phwDeviceExtension->RomBaseRange));
break;
}
}
/*
* If we are going to be using the VGA aperture on a Mach 32,
* initialize the bank manager by saving the ATI extended register
* values and putting the VGA controller into packed pixel mode.
*
* We can't identify this case by looking at
* phwDeviceExtension->FrameLength because it is set to 0x10000
* when the VGA aperture is being used in the
* IOCTL_VIDEO_MAP_VIDEO_MEMORY packet which may or may not
* have been called by the time we reach this point.
*/
if ((phwDeviceExtension->ModelNumber == MACH32_ULTRA) &&
(QueryPtr->q_aperture_cfg == 0) &&
(QueryPtr->q_VGA_type == 1))
{
for (Scratch = 0; Scratch <= 2; Scratch++)
{
OUTP(reg1CE, (BYTE)(SavedExtRegs[Scratch] & 0x00FF));
SavedExtRegs[Scratch] = (SavedExtRegs[Scratch] & 0x00FF) | (INP(reg1CF) << 8);
}
OUTPW(HI_SEQ_ADDR, 0x0F02);
OUTPW(HI_SEQ_ADDR, 0x0A04);
OUTPW(reg3CE, 0x1000);
OUTPW(reg3CE, 0x0001);
OUTPW(reg3CE, 0x0002);
OUTPW(reg3CE, 0x0003);
OUTPW(reg3CE, 0x0004);
OUTPW(reg3CE, 0x0005);
OUTPW(reg3CE, 0x0506);
OUTPW(reg3CE, 0x0F07);
OUTPW(reg3CE, 0xFF08);
OUTPW(reg1CE, 0x28B0); /* Enable 256 colour, 1M video RAM */
OUTPW(reg1CE, 0x04B6); /* Select linear addressing */
OUTP(reg1CE, 0xBE);
OUTPW(reg1CE, (WORD)(((INP(reg1CF) & 0xF7) << 8) | 0xBE));
}
/*
* phwDeviceExtension->ReInitializing becomes TRUE in
* IOCTL_VIDEO_SET_COLOR_REGISTERS packet of ATIMPStartIO().
*
* If this is not the first time we are switching into graphics
* mode, set the palette to the last set of colours that was
* selected while in graphics mode.
*/
if (phwDeviceExtension->ReInitializing)
{
SetPalette_m(phwDeviceExtension->Clut,
phwDeviceExtension->FirstEntry,
phwDeviceExtension->NumEntries);
}
/*
* Clear visible screen.
*
* 24 and 32 BPP would require a q_desire_y value beyond the
* maximum allowable clipping value (1535) if we clear the screen
* using a normal blit. Since these pixel depths are only supported
* up to 800x600, we can fake it by doing a 16BPP blit of double the
* screen height, clipping the special case of 640x480 24BPP on
* a 1M card (this is the only true colour mode that will fit in
* 1M, so if we hit this case on a 1M card, we know which mode
* we're dealing with) to avoid running off the end of video memory.
*/
if (CrtTable->m_pixel_depth >= 24)
{
/*
* Save the colour depth configuration and switch into 16BPP
*/
Scratch = INPW(R_EXT_GE_CONFIG);
OUTPD(EXT_GE_CONFIG, (Scratch & 0xFFCF) | PIX_WIDTH_16BPP);
CheckFIFOSpace_m(SIXTEEN_WORDS);
OUTPW(DP_CONFIG, 0x2011);
OUTPW(ALU_FG_FN, 0x7); // Paint
OUTPW(FRGD_COLOR, 0); // Black
OUTPW(CUR_X, 0);
OUTPW(CUR_Y, 0);
OUTPW(DEST_X_START, 0);
OUTPW(DEST_X_END, QueryPtr->q_desire_x);
if (QueryPtr->q_memory_size == VRAM_1mb)
OUTPW(DEST_Y_END, 720); /* Only 640x480 24BPP will fit in 1M */
else
OUTPW(DEST_Y_END, (WORD)(2*(QueryPtr->q_desire_y)));
/*
* Let the blit finish then restore the colour depth configuration
*/
WaitForIdle_m();
OUTPD(EXT_GE_CONFIG, Scratch);
}
else{
/*
* Other colour depths can be handled by a normal blit, and the
* LFB may not be available, so use a blit to clear the screen.
*/
CheckFIFOSpace_m(SIXTEEN_WORDS);
OUTPW(DP_CONFIG, 0x2011);
OUTPW(ALU_FG_FN, 0x7); // Paint
OUTPW(FRGD_COLOR, 0); // Black
OUTPW(CUR_X, 0);
OUTPW(CUR_Y, 0);
OUTPW(DEST_X_START, 0);
OUTPW(DEST_X_END, QueryPtr->q_desire_x);
OUTPW(DEST_Y_END, QueryPtr->q_desire_y);
}
#if 0
/*
* In 800x600 24BPP, set the offset to start 1 pixel into video
* memory to avoid screen tearing. The MAP_VIDEO_MEMORY packet
* must adjust the framebuffer base to compensate for this.
*/
if ((QueryPtr->q_desire_x == 800) && (QueryPtr->q_pix_depth == 24))
{
OUTPW(CRT_OFFSET_LO, 3);
}
else
{
OUTPW(CRT_OFFSET_HI, 0);
}
#endif
WaitForIdle_m();
return;
} /* SetCurrentMode_m() */
static int khyt1331_ioctl(struct inode *inode, struct file *file,
unsigned int opcode, unsigned long param)
{
int i, j;
int c, n, a, f, data_size, write_flag, read_flag;
unsigned char status;
unsigned short adr = 0;
unsigned int lam;
CNAF_BUF cnaf_buf;
void *buf;
// printk(KERN_INFO "khyt1331: ioctl %d, param %lX\n", opcode, param);
switch (opcode) {
/*---- initialization functions --------------------------------*/
case OP_CRATE_ZINIT:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 34);
break;
case OP_CRATE_CLEAR:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 36);
break;
case OP_CRATE_CHECK:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
/* dummy clear inhibit operation */
OUTP(adr + 8, 1);
OUTP(adr + 6, 2);
OUTP(adr + 10, 32);
/* readback n, a, f */
a = INP(adr + 10);
n = INP(adr + 10);
f = INP(adr + 10);
if (n != 1 || a != 2 || f != 32)
return 0;
return 1;
/*---- normal CAMAC functions ----------------------------------*/
case OP_CNAF8:
case OP_CNAF16:
case OP_CNAF24:
/*
printk(KERN_INFO "khyt1331: CNAF: %d %d %d %d %d\n",
cnaf_buf.c, cnaf_buf.n, cnaf_buf.a, cnaf_buf.f, cnaf_buf.d);
*/
if (copy_from_user(&cnaf_buf, (void *) param, sizeof(cnaf_buf)) > 0)
return -EFAULT;
if (cnaf_buf.c > 3 || cnaf_buf.c < 0)
return -EINVAL;
adr = io_base + (cnaf_buf.c << 4);
OUTP(adr + 8, cnaf_buf.n);
if (cnaf_buf.f >= 8) {
/* write operation */
OUTP(adr, (unsigned char) cnaf_buf.d);
if (opcode != OP_CNAF8) {
OUTP(adr + 2, *(((unsigned char *) &cnaf_buf.d) + 1));
if (opcode == OP_CNAF24)
OUTP(adr + 4, *(((unsigned char *) &cnaf_buf.d) + 2));
}
}
OUTP(adr + 6, cnaf_buf.a);
OUTP(adr + 10, cnaf_buf.f);
status = (unsigned char) INP(adr + 6);
cnaf_buf.q = status & 1;
cnaf_buf.x = status >> 7;
if (cnaf_buf.f < 8) {
cnaf_buf.d = 0;
/* read operation */
*((unsigned char *) &cnaf_buf.d) = INP(adr);
if (opcode != OP_CNAF8) {
*(((unsigned char *) &cnaf_buf.d) + 1) = INP(adr + 2);
if (opcode == OP_CNAF24)
*(((unsigned char *) &cnaf_buf.d) + 2) = INP(adr + 4);
}
}
if (copy_to_user((void *) param, &cnaf_buf, sizeof(cnaf_buf)) > 0)
return -EFAULT;
break;
/*---- repeat CAMAC functions ----------------------------------*/
case OP_CNAF8R:
case OP_CNAF16R:
case OP_CNAF24R:
data_size = opcode == OP_CNAF8R ? 1 : opcode == OP_CNAF16R ? 2 : 4;
if (copy_from_user(&cnaf_buf, (void *) param, sizeof(cnaf_buf)) > 0)
return -EFAULT;
printk(KERN_INFO "khyt1331: CNAFR: %d %d %d %d %lX %d %d\n",
cnaf_buf.c, cnaf_buf.n, cnaf_buf.a, cnaf_buf.f, cnaf_buf.d,
cnaf_buf.r, cnaf_buf.m);
/* check for valid crate parameter */
if (cnaf_buf.c > 3 || cnaf_buf.c < 0)
return -EINVAL;
/* check for valid repeat count, allow 1M max. size */
if (cnaf_buf.r < 0 || cnaf_buf.r > 1024 * 1024)
return -EINVAL;
/* check for valid repeat mode */
if (cnaf_buf.m < RM_COUNT || cnaf_buf.m > RM_NSCAN)
return -EINVAL;
/* allocate local data buffer */
buf = kmalloc(cnaf_buf.r * data_size, GFP_KERNEL);
if (buf == NULL)
return -ENOMEM;
read_flag = (cnaf_buf.f < 8);
write_flag = (cnaf_buf.f >= 16 && cnaf_buf.f <= 23);
if (write_flag) {
/* copy data buffer */
if (copy_from_user(buf, (void *) cnaf_buf.d, cnaf_buf.r * data_size) > 0) {
kfree(buf);
return -EFAULT;
}
}
/* Turn on the Q-mode for repeat until Q=1 in the INPW(adr+12) */
if (cnaf_buf.m == RM_QMODE)
OUTP(adr + 1, 0x10);
adr = io_base + (cnaf_buf.c << 4);
OUTP(adr + 8, cnaf_buf.n);
OUTP(adr + 6, cnaf_buf.a);
if (write_flag) {
if (data_size == 1) {
OUTP(adr, *((unsigned char *) buf));
} else if (data_size == 2) {
//printk("OUT0: %d\n", *((unsigned short *) buf));
OUTP(adr, *((unsigned char *) buf));
OUTP(adr + 2, *((unsigned char *) buf + 1));
} else if (data_size == 4) {
OUTP(adr, *((unsigned char *) buf));
OUTP(adr + 2, *((unsigned char *) buf + 1));
OUTP(adr + 4, *((unsigned char *) buf + 2));
}
}
/* trigger first cycle */
OUTP(adr + 10, cnaf_buf.f);
if (read_flag) {
if (data_size == 1) {
*((unsigned char *) buf) = INP(adr);
} else if (data_size == 2) {
*((unsigned char *) buf) = INP(adr);
*((unsigned char *) buf + 1) = INP(adr + 2);
} else if (data_size == 4) {
*((unsigned char *) buf) = INP(adr);
*((unsigned char *) buf + 1) = INP(adr + 2);
*((unsigned char *) buf + 1) = INP(adr + 4);
}
/* trigger first cycle */
INPW(adr + 12);
INP(adr + 6); /* some delay */
}
/* repeat cycles */
for (i = 1; i < cnaf_buf.r; i++) {
if (write_flag) {
if (data_size == 1) {
OUTPW(adr + 12, *((unsigned char *) buf + i));
} else if (data_size == 2) {
//printk("OUT%d: %d\n", i, *((unsigned short *) buf+i));
OUTPW(adr + 12, *((unsigned short *) buf + i));
} else if (data_size == 4) {
/* write high byte */
OUTP(adr + 4, *((unsigned char *) buf + 4 * i + 2));
/* write low and middle bytes to repeat register */
OUTPW(adr + 12, *((unsigned short *) buf + 2 * i));
}
}
if (read_flag) {
if (data_size == 1) {
*((unsigned char *) buf + i) = (unsigned char) INPW(adr + 12);
} else if (data_size == 2) {
*((unsigned short *) buf + i) = INPW(adr + 12);
} else if (data_size == 4) {
/* read high byte */
*((unsigned char *) buf + 4 * i + 2) = INP(adr + 4);
/* read low and middle bytes from repeat register */
*((unsigned short *) buf + i) = INPW(adr + 12);
}
}
if (cnaf_buf.m == RM_QMODE) {
/* in Q mode, test FAIL bit in status register */
status = (unsigned char) INP(adr + 6);
if ((status & (1 << 5)) > 0)
break;
}
if (cnaf_buf.m == RM_ASCAN)
OUTP(adr + 6, ++cnaf_buf.a);
if (cnaf_buf.m == RM_NSCAN)
OUTP(adr + 8, ++cnaf_buf.n);
for (j = 0; j < 1000; j++)
udelay(1000);
}
/* Turn off the Q-mode */
if (cnaf_buf.m == RM_QMODE)
OUTP(adr + 1, 0);
if (read_flag)
if (copy_to_user((void *) cnaf_buf.d, buf, i * data_size) > 0) {
kfree(buf);
return -EFAULT;
}
kfree(buf);
break;
case OP_INHIBIT_SET:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 33);
break;
case OP_INHIBIT_CLEAR:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 32);
break;
case OP_INHIBIT_TEST:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
status = INP(adr + 6);
return (status & (1 << 1)) > 0;
case OP_LAM_ENABLE:
c = param >> 16;
n = param & 0xFF;
if (c > 3 || c < 0 || n > 24 || n < 0)
return -EINVAL;
adr = io_base + (c << 4);
OUTP(adr + 10, 64 + n);
break;
case OP_LAM_DISABLE:
c = param >> 16;
n = param & 0xFF;
if (c > 3 || c < 0 || n > 24 || n < 0)
return -EINVAL;
adr = io_base + (c << 4);
OUTP(adr + 10, 128 + n);
break;
case OP_LAM_READ:
/*
return a BITWISE coded station NOT the station number
i.e.: n = 5 ==> lam = 0x10
*/
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
status = INP(adr + 6);
if (status & (1 << 3)) {
lam = (INP(adr + 8) & 0x1F); // mask upper 3 bits
lam = 1 << (lam - 1);
} else
lam = 0;
return lam;
case OP_LAM_CLEAR:
c = param >> 16;
n = param & 0xFF;
if (c > 3 || c < 0 || n > 24 || n < 0)
return -EINVAL;
adr = io_base + (c << 4);
/* restart LAM scanner in controller */
INP(adr + 8);
break;
case OP_INTERRUPT_ENABLE:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 41);
break;
case OP_INTERRUPT_DISABLE:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
OUTP(adr + 10, 40);
break;
case OP_INTERRUPT_TEST:
if (param > 3 || param < 0)
return -EINVAL;
adr = io_base + (param << 4);
status = INP(adr + 6);
return (status & (1 << 2)) > 0;
}
/* signal success */
return 1;
}
/*****************************************************************************
* DrvMovePointer -
****************************************************************************/
VOID DrvMovePointer(
SURFOBJ* pso,
LONG x,
LONG y,
RECTL* prcl)
{
PPDEV ppdev;
INT xx, yy;
ppdev = (PPDEV) pso->dhpdev;
// If x is -1 then take down the cursor.
if (x == -1)
{
DISABLE_SPRITE(ppdev);
return;
}
// Adjust the actual pointer position depending upon
// the hot spot.
x -= ppdev->W32SpriteData.ptlHot.x;
y -= ppdev->W32SpriteData.ptlHot.y;
if (ppdev->ulChipID == ET6000)
{
char xPreset = 0;
char yPreset = 0;
if (x < 0)
{
xPreset = (CHAR)~x;
x = 0;
}
if (y < 0)
{
yPreset = (CHAR)~y;
y = 0;
}
ET6K_HORZ_PRESET(ppdev, xPreset);
ET6K_VERT_PRESET(ppdev, yPreset);
ET6K_SPRITE_HORZ_POSITION(ppdev, x);
ET6K_SPRITE_VERT_POSITION(ppdev, y);
return;
}
else
{
//
// Adjust pointer x position for color depth
//
x *= ppdev->cBpp;
// Yet another bug.
// If the cursor is moved entirely off the screen, it could cause
// the screen to shake. So, we have to disable the cursor if it
// is moved entirely off the screen.
if ((x < - ((LONG) (ppdev->W32SpriteData.szlPointer.cx))) ||
(x > ((LONG) (ppdev->cxScreen * ppdev->cBpp))) ||
(y < - ((LONG) (ppdev->W32SpriteData.szlPointer.cy))) ||
(y > ((LONG) (ppdev->cyScreen))))
{
ppdev->W32SpriteData.fl |= POINTER_DISABLED;
DISABLE_SPRITE(ppdev);
return;
}
// We may have disabled the sprite if it went off the screen.
// So, now have to detect if we did and re-enable it if necessary.
// (remembering to keep track of the state).
if (ppdev->W32SpriteData.fl & POINTER_DISABLED)
{
ppdev->W32SpriteData.fl &= ~POINTER_DISABLED;
ENABLE_SPRITE(ppdev);
}
// The W32 non-rev-B has a problem with a vertical offset of 0x3f.
// All the other W32's have a problem with the last nibble being
// 0x0F for both the horizontal and the verical.
// Never set the bad presets on the chips in question.
if (x <= 0)
{
if ((ppdev->ulChipID == W32) &&
(ppdev->ulRevLevel != REV_B))
{
xx = -x;
if ((xx & 0x0F) == 0x0F)
xx &= ~0x01;
SET_HORZ_PRESET(xx);
}
else
{
SET_HORZ_PRESET(-x);
}
x = 0;
}
else
{
SET_HORZ_PRESET(0);
}
if (y <= 0)
{
if (ppdev->ulChipID == W32)
{
yy = -y;
if (ppdev->ulRevLevel != REV_B)
{
if (yy == 0x3F)
yy = 0x3E;
}
else
{
if ((yy & 0x0F) == 0x0F)
yy &= ~0x01;
}
SET_VERT_PRESET(yy);
}
else
{
SET_VERT_PRESET(-y);
}
y = 0;
}
else
{
SET_VERT_PRESET(0);
}
// You guessed it. Another bug.
// On the W32 Rev B you can not put the cursor on the bottom line
// of the display. And if were in interlaced mode you can't put it
// on the bottom two lines.
if ((ppdev->ulChipID == W32) &&
(ppdev->ulRevLevel == REV_B))
{
INT i;
if (y > (i = ppdev->cyScreen - 2))
{
OUTP(0x3D4, 0x35);
if (INP(0x3D5) & 0x80)
y = i;
}
else if (y > (i+1))
{
y = i+1;
}
}
//////////////////////////////////////////////////////
// Set the position of the sprite.
if ((ppdev->ulChipID == W32I) ||
(ppdev->ulChipID == W32P))
{
// You bet, one more bug, and this one is a lulu.
// First we have to set the vertical position before the horz
// position. Why you ask, because, if this is a W32 Rev B or later
// we may have to toggle a bit in a test register to really set the
// vertical position, but of course we don't want to set anything
// else at this point.
BYTE status, byte;
// Wait for horz display interval.
while ( (INP(0x3DA) & 0x02));
while (!((status = INP(0x3DA)) & 0x02));
SET_VERT_POSITION(y);
// Check if the sprite is being displayed at this very moment.
// And if it is then skip the test bit stuff.
if (!(status & 0x04))
{
// Looks like we will have to toggle the test bit to
// really set the vertical position.
ENABLE_KEY(ppdev);
OUTP(0x3D4, 0x37);
byte = INP(0x3D5);
byte |= 0x40;
OUTP(0x3D5, byte);
byte &= ~0x40;
OUTP(0x3D5, byte);
DISABLE_KEY(ppdev);
}
SET_HORZ_POSITION(x);
}
else
{
// For consistency sake, we're going to set the vertical first
// even for non-W32 Rev B chips.
SET_VERT_POSITION(y);
SET_HORZ_POSITION(x);
}
return;
}
}
RString msg = RString("index ") + ::acdk::lang::Integer::toString(index) + " is out of bounds";
::acdk::sql::RSQLException ex = new SQLException(msg);
hndl->_addException(ex);
SQLTHROW(hndl->_getExceptions());
}
if (_colDesc[index - 1] == Nil)
{
RODBCColumn cd = new ODBCColumn(_getODBCHandle(), index);
_colDesc->set(index - 1, cd);
}
if (wasCurPos0 == true)
_fetched = true;
}
int
ODBCResultSet::_getColumnIndex(INP(RString) colname) THROWS1(::acdk::sql::RSQLException)
{
ACDK_NLOG("acdk.sql.odbc", Debug, SBSTR("column count: " << _colDesc->length()));
for (int i = 0; i < _colDesc->length(); ++i)
{
_chkindex(i + 1);
RString realcolname = _colDesc[i]->getColumnName();
ACDK_NLOG("acdk.sql.odbc", Debug, SBSTR("column name: " << realcolname));
if (realcolname->equalsIgnoreCase(colname) == true)
return i + 1;
}
THROW1(SQLException, "Columnname: " + colname + " does not exists");
return Nil;
}
/*