irom io_error_t io_mcp_init(const struct io_info_entry_T *info)
{
int ix;
int instance, pin;
uint8_t i2cbuffer[0x16];
mcp_data_pin_t *mcp_pin_data;
if(i2c_send_1(info->address, IODIR(0)) != i2c_error_ok)
return(io_error);
if(i2c_receive(info->address, sizeof(i2cbuffer), i2cbuffer) != i2c_error_ok)
return(io_error);
for(ix = DEFVAL(0); ix < 0x0b; ix++)
if(i2cbuffer[ix] != 0x00)
return(io_error);
for(ix = 0x0e; ix < 0x0f; ix++)
if(i2cbuffer[ix] != 0x00)
return(io_error);
for(instance = 0; instance < io_mcp_instance_size; instance++)
{
for(pin = 0; pin < 16; pin++)
{
mcp_pin_data = &mcp_data_pin_table[instance][pin];
mcp_pin_data->counter = 0;
mcp_pin_data->debounce = 0;
}
}
pin_output_cache[0] = 0;
pin_output_cache[1] = 0;
return(io_ok);
}
void HardwareSerial::begin(unsigned int baud) {
// for now, do nothing. We will use whatever the ISP had set up.
measurePCLK();
#if MCU == MCU_ARM7TDMI
//Set up the pins
if(port==0) {
gpio_set_write(0);
gpio_set_read(1);
set_pin(0,1); //TX0
set_pin(1,1); //RX0
} else {
gpio_set_write(8);
gpio_set_read(9);
set_pin(8,1); //TX1
set_pin(9,1); //RX1
}
#else
//This only knows how to set up UART0.
IODIR(0)|= (1<<2); //TX set to output
IODIR(0)&=~(1<<3); //RX set to input
IOCON(0,2)=(0b010 << 0) | //Function TX0
(0b00 << 3) | //No pullup/pulldown
(0b0 << 5) | //No hysteresis
(0b0 << 6) | //No inversion
(0b0 << 9) | //Standard slew
(0b0 <<10) ; //Not open-drain
IOCON(0,3)=(0b010 << 0) | //Function RX0
(0b00 << 3) | //No pullup/pulldown
(0b0 << 5) | //No hysteresis
(0b0 << 6) | //No inversion
(0b0 << 9) | //Standard slew
(0b0 <<10) ; //Not open-drain
#endif
ULCR(port) = (3 << 0) | //8 data bits
(0 << 2) | //1 stop bit
(0 << 3) | //No parity
(0 << 4) | //I said, no parity!
(0 << 6) | //No break transmission
(1 << 7); //DLAB = 1
//DLAB - Divisor Latch Access bit. When set, a certain memory address
// maps to the divisor latches, which control the baud rate. When
// cleared, those same addresses correspond to the processor end
// of the FIFOs. In other words, set the DLAB to change the baud
// rate, and clear it to use the FIFOs.
unsigned int Denom=PCLK/baud;
unsigned int UDL=Denom/16;
UDLM(port)=(UDL >> 8) & 0xFF;
UDLL(port)=(UDL >> 0) & 0xFF;
UFDR(port)=0x10; //reset nilpotent value
UFCR(port) = (1 << 0) | //FIFOs on
(1 << 1) | //Clear rx FIFO
(1 << 2) | //Clear tx FIFO
(3 << 6); //Rx watermark=14 bytes
ULCR(port) = ULCR(port) & ~(1<<7); //Turn of DLAB - FIFOs accessable
UIER(port)=0;
}
irom io_error_t io_mcp_init_pin_mode(string_t *error_message, const struct io_info_entry_T *info, io_data_pin_entry_t *pin_data, const io_config_pin_entry_t *pin_config, int pin)
{
int bank, bankpin;
bank = (pin & 0x08) >> 3;
bankpin = pin & 0x07;
if(clear_set_register(error_message, info->address, IPOL(bank), 1 << bankpin, 0) != io_ok) // polarity inversion = 0
return(io_error);
if(clear_set_register(error_message, info->address, GPINTEN(bank), 1 << bankpin, 0) != io_ok) // pc int enable = 0
return(io_error);
if(clear_set_register(error_message, info->address, DEFVAL(bank), 1 << bankpin, 0) != io_ok) // compare value = 0
return(io_error);
if(clear_set_register(error_message, info->address, INTCON(bank), 1 << bankpin, 0) != io_ok) // compare source = 0
return(io_error);
if(clear_set_register(error_message, info->address, GPPU(bank), 1 << bankpin, 0) != io_ok) // pullup = 0
return(io_error);
if(clear_set_register(error_message, info->address, GPIO(bank), 1 << bankpin, 0) != io_ok) // gpio = 0
return(io_error);
if(clear_set_register(error_message, info->address, OLAT(bank), 1 << bankpin, 0) != io_ok) // latch = 0
return(io_error);
switch(pin_config->llmode)
{
case(io_pin_ll_disabled):
{
break;
}
case(io_pin_ll_input_digital):
case(io_pin_ll_counter):
{
if(clear_set_register(error_message, info->address, IODIR(bank), 0, 1 << bankpin) != io_ok) // direction = 1
return(io_error);
if(pin_config->flags.pullup && (clear_set_register(error_message, info->address, GPPU(bank), 0, 1 << bankpin) != io_ok))
return(io_error);
if((pin_config->llmode == io_pin_ll_counter) && (clear_set_register(error_message, info->address, GPINTEN(bank), 0, 1 << bankpin) != io_ok)) // pc int enable = 1
return(io_error);
break;
}
case(io_pin_ll_output_digital):
{
if(clear_set_register(error_message, info->address, IODIR(bank), 1 << bankpin, 0) != io_ok) // direction = 0
return(io_error);
break;
}
default:
{
if(error_message)
string_cat(error_message, "invalid mode for this pin\n");
return(io_error);
}
}
return(io_ok);
}
