/******************************************************************************
*
* ip_VLANInit - initialize "port-based VLANs" for the specified enet unit.
*/
static void
ip_VLANInit(int ethUnit)
{
int phyUnit;
uint32_t phyBase;
uint32_t phyReg;
phyBase = IP_GLOBALREGBASE;
for (phyUnit=0; phyUnit < IP_PHY_MAX; phyUnit++) {
if (IP_ETHUNIT(phyUnit) != ethUnit) {
continue;
}
phy_reg_write(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_24_REG + ((phyUnit == 5) ? (phyUnit + 1) : phyUnit),
IP_VLAN_TABLE_SETTING(phyUnit));
/* Send all packets to all ports */
phyReg = phy_reg_read(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN1_OUTPUT_PORT_MASK_S);
phy_reg_write(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG, phyReg);
}
phyReg = phy_reg_read(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG);
phyReg = phyReg | TAG_VLAN_ENABLE;
phyReg = phyReg & ~VID_INDX_SEL_M;
phy_reg_write(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG, phyReg);
}
void vlan_init(int portmask)
{
int phyUnit;
unsigned int phyBase;
unsigned int phyReg;
unsigned int phyAddr;
int i;
int numports = 5;
for (i = 0; i < numports - 1; i++) // last one will be wan port
{
ipPhyInfo[i].VLANTableSetting = IP_LAN_PORT_VLAN;
}
ipPhyInfo[i++].VLANTableSetting = IP_WAN_PORT_VLAN;
ipPhyInfo[i].VLANTableSetting = IP_LAN_PORT_VLAN;
ipPhyInfo[i].isEnetPort = FALSE;
ipPhyInfo[i].isPhyAlive = TRUE;
ipPhyInfo[i++].phyAddr = 0x0;
numports = i;
fprintf(stderr, "Reset ICPLUS Phy\n");
for (phyUnit = 0; phyUnit < numports; phyUnit++) {
if (((1 << phyUnit) & portmask)) {
phyAddr = IP_PHYADDR(phyUnit);
setPhy(phyAddr, IP_PHY_CONTROL, IP_CTRL_SOFTWARE_RESET);
}
}
sleep(1);
fprintf(stderr, "Start Autonegotiation\n");
for (phyUnit = 0; phyUnit < numports; phyUnit++) {
if (((1 << phyUnit) & portmask)) {
phyAddr = IP_PHYADDR(phyUnit);
setPhy(phyAddr, IP_AUTONEG_ADVERT, IP_ADVERTISE_ALL);
setPhy(phyAddr, IP_PHY_CONTROL,
IP_CTRL_AUTONEGOTIATION_ENABLE |
IP_CTRL_START_AUTONEGOTIATION);
}
}
int timeout = 5;
for (phyUnit = 0; (phyUnit < numports); phyUnit++) {
if (((1 << phyUnit) & portmask)) {
for (;;) {
phyAddr = IP_PHYADDR(phyUnit);
int phyHwStatus =
getPhy(phyAddr, IP_PHY_STATUS);
if (IP_AUTONEG_DONE(phyHwStatus)) {
fprintf(stderr,
"Port %d, Neg Success\n",
phyUnit);
break;
}
if (timeout == 0) {
fprintf(stderr,
"Port %d, Negogiation timeout\n",
phyUnit);
break;
}
if (--timeout == 0) {
fprintf(stderr,
"Port %d, Negogiation timeout\n",
phyUnit);
break;
}
usleep(150);
}
}
}
fprintf(stderr, "Setup VLANS\n");
/*
* setPhy(29,24,0); setPhy(29,25,0); setPhy(29,26,0); setPhy(29,27,0);
* setPhy(29,28,2); setPhy(29,30,0); setPhy(29,23,0x07c2);
* setPhy(30,1,0x002f); setPhy(30,2,0x0030); setPhy(30,9,0x1089);
*/
unsigned int phy1Reg = 0;
unsigned int phy2Reg = 0;
unsigned int phy23Reg = 0;
unsigned int phy9Reg = 0;
for (phyUnit = 0; phyUnit < numports; phyUnit++) {
if (((1 << phyUnit) & portmask)) {
setPhy(IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_24_REG +
((phyUnit == 5) ? (phyUnit + 1) : phyUnit),
IP_VLAN_TABLE_SETTING(phyUnit));
fprintf(stderr, "write register %d, addr %d with %X\n",
IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_24_REG +
((phyUnit == 5) ? (phyUnit + 1) : phyUnit),
IP_VLAN_TABLE_SETTING(phyUnit));
if (IP_IS_ENET_PORT(phyUnit)) {
if (IP_IS_WAN_PORT(phyUnit)) {
phy2Reg |=
((1 << phyUnit) <<
IP_VLAN2_OUTPUT_PORT_MASK_S);
} else {
phy1Reg |=
((1 << phyUnit) <<
IP_VLAN0_OUTPUT_PORT_MASK_S);
}
phy23Reg =
phy23Reg | ((1 << phyUnit) <<
IP_PORTX_REMOVE_TAG_S);
phy23Reg =
phy23Reg & ~((1 << phyUnit) <<
IP_PORTX_ADD_TAG_S);
} else {
phy1Reg |=
((1 << phyUnit) <<
IP_VLAN0_OUTPUT_PORT_MASK_S);
phy2Reg |=
((1 << phyUnit) <<
IP_VLAN2_OUTPUT_PORT_MASK_S);
phy23Reg = phy23Reg | (1 << IP_PORT5_ADD_TAG_S);
phy23Reg =
phy23Reg & ~(1 << IP_PORT5_REMOVE_TAG_S);
}
}
}
phy9Reg = 0; //getPhy(IP_GLOBAL_PHY30_ADDR,IP_GLOBAL_PHY30_9_REG);
phy9Reg = phy9Reg | TAG_VLAN_ENABLE;
phy9Reg = phy9Reg & ~VID_INDX_SEL_M;
phy9Reg = phy9Reg | 1; //1 vlan group used for lan
phy9Reg = phy9Reg | 1 << 3; //enable smart mac
phy9Reg = phy9Reg | 1 << 12; //port 4 is a wan port (required for smart mac)
fprintf(stderr, "write register %d, addr %d with %X\n",
IP_GLOBAL_PHY29_ADDR, IP_GLOBAL_PHY29_23_REG, phy23Reg);
fprintf(stderr, "write register %d, addr %d with %X\n",
IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG, phy1Reg);
fprintf(stderr, "write register %d, addr %d with %X\n",
IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_2_REG, phy2Reg);
fprintf(stderr, "write register %d, addr %d with %X\n",
IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG, phy9Reg);
setPhy(IP_GLOBAL_PHY29_ADDR, IP_GLOBAL_PHY29_23_REG, phy23Reg);
setPhy(IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG, phy1Reg);
setPhy(IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_2_REG, phy2Reg);
setPhy(IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG, phy9Reg);
//
// echo "echo \"WRITE 29 23 07c2\" > ".$mii_dev."\n";
//
// echo "echo \"WRITE 29 24 0\" > ".$mii_dev."\n"; /* PORT0 Default VLAN ID */
// echo "echo \"WRITE 29 25 0\" > ".$mii_dev."\n"; /* PORT1 Default VLAN ID */
// echo "echo \"WRITE 29 26 0\" > ".$mii_dev."\n"; /* PORT2 Default VLAN ID */
// echo "echo \"WRITE 29 27 0\" > ".$mii_dev."\n"; /* PORT3 Default VLAN ID */
// echo "echo \"WRITE 29 28 2\" > ".$mii_dev."\n"; /* PORT4 Default VLAN ID */
// echo "echo \"WRITE 29 30 0\" > ".$mii_dev."\n"; /* PORT5 Default VLAN ID (CPU) */
// echo "echo \"WRITE 29 23 07c2\" > ".$mii_dev."\n";
// echo "echo \"WRITE 30 1 002f\" > ".$mii_dev."\n"; /* Port 5,3,2,1,0 = VLAN 0 */
// echo "echo \"WRITE 30 2 0030\" > ".$mii_dev."\n"; /* Port 5,4 = VLAN 2 */
// echo "echo \"WRITE 30 9 1089\" > ".$mii_dev."\n";
eval("vconfig", "set_name_type", "VLAN_PLUS_VID_NO_PAD");
eval("vconfig", "add", "eth0", "0");
eval("vconfig", "add", "eth0", "2");
struct ifreq ifr;
int s;
if ((s = socket(AF_INET, SOCK_RAW, IPPROTO_RAW))) {
char eabuf[32];
strncpy(ifr.ifr_name, "eth0", IFNAMSIZ);
ioctl(s, SIOCGIFHWADDR, &ifr);
char macaddr[32];
strcpy(macaddr,
ether_etoa((unsigned char *)ifr.ifr_hwaddr.sa_data,
eabuf));
nvram_set("et0macaddr", macaddr);
// MAC_ADD (macaddr);
ether_atoe(macaddr, (unsigned char *)ifr.ifr_hwaddr.sa_data);
strncpy(ifr.ifr_name, "vlan2", IFNAMSIZ);
ioctl(s, SIOCSIFHWADDR, &ifr);
close(s);
}
eval("ifconfig", "vlan0", "promisc");
eval("ifconfig", "vlan2", "promisc");
}
/******************************************************************************
*
* ip_VLANInit - initialize "port-based VLANs" for the specified enet unit.
*/
LOCAL void
ip_VLANInit(int ethUnit)
{
int phyUnit;
UINT32 phyBase;
UINT32 phyReg;
phyBase = IP_GLOBALREGBASE;
for (phyUnit=0; phyUnit < IP_PHY_MAX; phyUnit++) {
if (IP_ETHUNIT(phyUnit) != ethUnit) {
continue;
}
phyRegWrite(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_24_REG + ((phyUnit == 5) ? (phyUnit + 1) : phyUnit),
IP_VLAN_TABLE_SETTING(phyUnit));
#if CONFIG_VENETDEV
if (IP_IS_ENET_PORT(phyUnit)) {
if (IP_IS_WAN_PORT(phyUnit)) {
/* WAN port */
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG);
phyReg = phyReg & ~((1 << phyUnit) << IP_VLAN1_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG, phyReg);
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN2_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG, phyReg);
} else {
/* LAN ports */
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN1_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG, phyReg);
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG);
phyReg = phyReg & ~((1 << phyUnit) << IP_VLAN2_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG, phyReg);
}
/* WAN & LAN removes VLAN tags */
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_23_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_PORTX_REMOVE_TAG_S);
phyReg = phyReg & ~((1 << phyUnit) << IP_PORTX_ADD_TAG_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_23_REG, phyReg);
} else {
/* CPU port */
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN1_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_1_REG, phyReg);
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN2_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR,
IP_GLOBAL_PHY30_2_REG, phyReg);
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_23_REG);
phyReg = phyReg | (1 << IP_PORT5_ADD_TAG_S);
phyReg = phyReg & ~(1 << IP_PORT5_REMOVE_TAG_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY29_ADDR,
IP_GLOBAL_PHY29_23_REG, phyReg);
}
#else
/* Send all packets to all ports */
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG);
phyReg = phyReg | ((1 << phyUnit) << IP_VLAN1_OUTPUT_PORT_MASK_S);
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_1_REG, phyReg);
#endif
}
phyReg = phyRegRead(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG);
phyReg = phyReg | TAG_VLAN_ENABLE;
phyReg = phyReg & ~VID_INDX_SEL_M;
phyRegWrite(phyBase, IP_GLOBAL_PHY30_ADDR, IP_GLOBAL_PHY30_9_REG, phyReg);
}
