void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth) { u8 eRFPath; struct r8192_priv *priv = rtllib_priv(dev); if (IS_HARDWARE_TYPE_8192SE(dev)) { #if (RTL92SE_FPGA_VERIFY == 0) switch(Bandwidth) { case HT_CHANNEL_WIDTH_20: #if 1 priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]); #else rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01); #endif break; case HT_CHANNEL_WIDTH_20_40: #if 1 priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff)); rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]); #else rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00); #endif break; default: RT_TRACE(COMP_DBG, "PHY_SetRF6052Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth); break; } #endif } else { for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) { switch(Bandwidth) { case HT_CHANNEL_WIDTH_20: break; case HT_CHANNEL_WIDTH_20_40: break; default: RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); break; } } } }
/*----------------------------------------------------------------------------- * Function: PHY_RF6052SetBandwidth() * * Overview: This function is called by SetBWModeCallback8190Pci() only * * Input: PADAPTER dev * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M * * Output: NONE * * Return: NONE * * Note: For RF type 0222D *---------------------------------------------------------------------------*/ void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth) //20M or 40M { u8 eRFPath; struct r8192_priv *priv = ieee80211_priv(dev); if (IS_HARDWARE_TYPE_8192SE(dev)) { #if (RTL92SE_FPGA_VERIFY == 0) switch(Bandwidth) { case HT_CHANNEL_WIDTH_20: rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01); break; case HT_CHANNEL_WIDTH_20_40: rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00); break; default: RT_TRACE(COMP_DBG, "PHY_SetRF6052Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth); break; } #endif } else { for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) { switch(Bandwidth) { case HT_CHANNEL_WIDTH_20: //PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x01); break; case HT_CHANNEL_WIDTH_20_40: //PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x00); break; default: RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); break; } } } }